JPH0314146B2 - - Google Patents

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Publication number
JPH0314146B2
JPH0314146B2 JP56067159A JP6715981A JPH0314146B2 JP H0314146 B2 JPH0314146 B2 JP H0314146B2 JP 56067159 A JP56067159 A JP 56067159A JP 6715981 A JP6715981 A JP 6715981A JP H0314146 B2 JPH0314146 B2 JP H0314146B2
Authority
JP
Japan
Prior art keywords
output voltage
voltage
specimen
multiplication
multiplier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56067159A
Other languages
Japanese (ja)
Other versions
JPS57182181A (en
Inventor
Taketoshi Hasegawa
Tadakatsu Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP6715981A priority Critical patent/JPS57182181A/en
Publication of JPS57182181A publication Critical patent/JPS57182181A/en
Publication of JPH0314146B2 publication Critical patent/JPH0314146B2/ja
Granted legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2688Measuring quality factor or dielectric loss, e.g. loss angle, or power factor
    • G01R27/2694Measuring dielectric loss, e.g. loss angle, loss factor or power factor

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Description

【発明の詳細な説明】 この発明は絶縁物および一般誘導体の誘電正接
および静電容量を自動的に測定する装置に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an apparatus for automatically measuring the dielectric loss tangent and capacitance of insulators and general dielectrics.

従来この種の装置として第1図に示すものがあ
つた。図において、1は周波数なる正弦波の可
変交流電圧、2は供試物、3は供試物の等価直列
損失抵抗、4は供試物の等価直列静電容量、5は
無損失標準コンデンサ、6は検出抵抗器、7は可
変検出抵抗器、8は差動増幅器、9aおよび9b
は整流回路、10は割算器を示す。
A conventional device of this type is shown in FIG. In the figure, 1 is a sinusoidal variable AC voltage that is the frequency, 2 is the specimen, 3 is the equivalent series loss resistance of the specimen, 4 is the equivalent series capacitance of the specimen, 5 is a lossless standard capacitor, 6 is a detection resistor, 7 is a variable detection resistor, 8 is a differential amplifier, 9a and 9b
indicates a rectifier circuit, and 10 indicates a divider.

このように構成された回路において、一般に、
静電容量や誘電正接(tanδ)を測定する場合の供
試物の等価回路は直列抵抗3の抵抗値RXと直列
静電容量4の容量値CXとからなる直列等価回路
で表わされ、この供試物のtanδは次式で表わされ
る。
In a circuit configured in this way, generally,
When measuring capacitance or dielectric loss tangent (tan δ), the equivalent circuit of the specimen is represented by a series equivalent circuit consisting of the resistance value R X of series resistor 3 and the capacitance value C X of series capacitance 4. , tan δ of this sample is expressed by the following formula.

tanδ=ωCXRX ここで、ωは角周波数で2πである。第1図に
おいて可変抵抗器7を差動増幅器8の出力が最小
値になるように調整すると、整流回路9aの出力
電圧e1は次式で表わされる。
tanδ=ωC X R X where ω is the angular frequency and is 2π. In FIG. 1, when the variable resistor 7 is adjusted so that the output of the differential amplifier 8 becomes the minimum value, the output voltage e 1 of the rectifier circuit 9a is expressed by the following equation.

ここで、交流電圧1はE0、標準コンデンサ5
をCS、検出抵抗器6をR1とした。なお、上式は
ωCSR1≪1,ωCXR2≪1の条件を満足する必要が
ある。ここで、R2は可変抵抗器7の抵抗値を示
す。一方、整流回路9bの出力電圧e2は次式で表
わされる。
Here, AC voltage 1 is E 0 , standard capacitor 5
is C S , and the detection resistor 6 is R 1 . Note that the above equation needs to satisfy the conditions ωC S R 1 <<1 and ωC X R 2 <<1. Here, R 2 indicates the resistance value of the variable resistor 7. On the other hand, the output voltage e 2 of the rectifier circuit 9b is expressed by the following equation.

e2=ωCSR1E0 従つて、割算器10の出力電圧e0はtanδ≪1の
場合は次式で与えられる。
e 2 =ωC S R 1 E 0 Therefore, the output voltage e 0 of the divider 10 is given by the following equation when tan δ<<1.

e0=e1/e2tanδ このように、tanδ<30%の場合にはe0は供試物
2の誘電正接(tanδ)に比例した直流電圧が得ら
れる。
e 0 = e 1 /e 2 tan δ In this way, when tan δ < 30%, a DC voltage proportional to the dielectric loss tangent (tan δ) of the specimen 2 is obtained.

一方、供試物2の静電容量CXは次式で与えら
れる。
On the other hand, the capacitance CX of the specimen 2 is given by the following formula.

CXR1/R2CS なお、上式において近似的に成立する条件は
tanδ≪1が満足されない場合である。
C _ _ _
This is a case where tan δ<<1 is not satisfied.

従来のtanδ測定装置は以上のように構成されて
いるために、可変抵抗器7の調整をしなければな
らず、時間と経験が必要で、さらに測定精度に問
題があるなど欠点があつた。また、自動化するた
めに可変抵抗器7をサーボモータ等で自動平衡を
とることも考えられるが、測定時間が長くなるな
どの欠点があつた。
Since the conventional tan δ measuring device is configured as described above, it has disadvantages such as the need to adjust the variable resistor 7, which requires time and experience, and problems with measurement accuracy. Furthermore, in order to automate the process, it is possible to automatically balance the variable resistor 7 using a servo motor or the like, but this has disadvantages such as a longer measurement time.

この発明は上述した従来の欠点を除去するため
になされたもので、演算回路、AGC(自動利得制
御)回路、同期整流回路等を組合わせて比較的簡
単な回路構成により供試物の誘電正接および静電
容量を正確にかつ自動的に測定できる誘電体(絶
縁物)の静電容量・誘電正接測定装置を提供する
ことを目的としている。
This invention was made in order to eliminate the above-mentioned drawbacks of the conventional technology, and uses a relatively simple circuit configuration that combines an arithmetic circuit, an AGC (automatic gain control) circuit, a synchronous rectifier circuit, etc. to improve the dielectric loss tangent of the specimen. Another object of the present invention is to provide a capacitance/dissipation tangent measuring device for dielectrics (insulators) that can accurately and automatically measure capacitance.

以下、この発明の一実施例を図面を用いて説明
する。第2図において、第1図と同一部分は同一
記号を用いている。11および12は演算増幅
器、13および14は抵抗器で11と13および
12と14でそれぞれ電流を電圧に変換する回路
を構成している。15および16は掛算器、17
は整流回路、18は比較器、19はその基準直流
電圧で、15,17,18,19でAGC回路を
構成している。20および21は掛算器、22お
よび23は差動増幅器、24および25は同期整
流回路、26および27は電子式積分器を示して
いる。28は整流回路である。
An embodiment of the present invention will be described below with reference to the drawings. In FIG. 2, the same parts as in FIG. 1 use the same symbols. 11 and 12 are operational amplifiers, 13 and 14 are resistors, and 11 and 13 and 12 and 14 constitute circuits that convert current into voltage, respectively. 15 and 16 are multipliers, 17
1 is a rectifier circuit, 18 is a comparator, 19 is its reference DC voltage, and 15, 17, 18, and 19 constitute an AGC circuit. 20 and 21 are multipliers, 22 and 23 are differential amplifiers, 24 and 25 are synchronous rectifier circuits, and 26 and 27 are electronic integrators. 28 is a rectifier circuit.

第3図は第2図の動作を説明するために用いる
各演算回路の出力電圧をベクトル図で表わしたも
のである。
FIG. 3 is a vector diagram representing the output voltages of each arithmetic circuit used to explain the operation of FIG. 2.

次に動作について説明する。演算増幅器11の
出力電圧Eaは抵抗器13の抵抗値をR3、無損失
標準コンデンサ5をCS、交流電圧1をE0sinωtと
すると次式で表わされる。
Next, the operation will be explained. The output voltage E a of the operational amplifier 11 is expressed by the following equation, where the resistance value of the resistor 13 is R 3 , the lossless standard capacitor 5 is C S , and the AC voltage 1 is E 0 sinωt.

Ea=−ωCSR3E0sin(ωt+π/2) 同様に、演算増幅器12の出力電圧Ebは抵抗
器14の抵抗値をR4、等価直列抵抗3をRX、等
価直列静電容量4をCXとすると次式で表わされ
る。
E a = -ωC S R 3 E 0 sin (ωt + π/2) Similarly, the output voltage E b of the operational amplifier 12 is determined by the resistance value of the resistor 14 being R 4 , the equivalent series resistance 3 being R Letting capacitance 4 be CX , it is expressed by the following formula.

ここで、δは供試物2の損失角を表わす。出力
電圧Eaは掛算器15、整流回路17、比較器1
8および基準直流電圧19で構成されたAGC回
路により、掛算器15の出力電圧Ecは次式で表わ
される。
Here, δ represents the loss angle of the specimen 2. The output voltage E a is determined by the multiplier 15, the rectifier circuit 17, and the comparator 1.
8 and a reference DC voltage 19, the output voltage E c of the multiplier 15 is expressed by the following equation.

Ec=EAsin(ωt+π/2) ここで、EAは基準電圧19によりコントロー
ルされた交流ピーク値を示し、交流電圧1および
供試物2に影響を受けない一定値である。比較器
18の出力電圧(−EA/ωCSR3Eo)は出力電圧Ebと 掛算器16に接続されているから、掛算器16の
出力電圧Edは次式で表わされる。
E c =E A sin(ωt+π/2) Here, E A indicates an AC peak value controlled by the reference voltage 19, and is a constant value that is not affected by the AC voltage 1 and the specimen 2. Since the output voltage (-E A /ωC S R 3 Eo) of the comparator 18 is connected to the output voltage E b and the multiplier 16, the output voltage E d of the multiplier 16 is expressed by the following equation.

次に、出力電圧Edは掛算器20に接続され、
その出力電圧Ee1と出力電圧Ecとが差動増幅器2
2に接続され、その出力電圧Ef1が同期整流回路
24に入力され、Ecの電圧で同期整流された後電
子式積分器26を通して掛算器20にフイードバ
ツクされている。第3図は各出力電圧のベクトル
図を示しているが、掛算器20の出力電圧Ee1
Ecと同期した成分が等しくなるように動作するか
ら、その出力電圧Ee1は次式で表わされる。
The output voltage E d is then connected to a multiplier 20,
The output voltage Ee 1 and the output voltage E c are the differential amplifier 2
The output voltage Ef 1 is input to the synchronous rectifier circuit 24, and after being synchronously rectified with the voltage Ec , it is fed back to the multiplier 20 through the electronic integrator 26. FIG. 3 shows a vector diagram of each output voltage, and the output voltage Ee 1 of the multiplier 20 is
Since it operates so that the component synchronized with E c is equal, its output voltage Ee 1 is expressed by the following equation.

Ee1=√1+2EAsin(ωt+π/2−δ) 従つて、差動増幅器22の出力電圧Ef1は次式
で表わされる。
Ee 1 =√1+ 2 E A sin(ωt+π/2−δ) Therefore, the output voltage E f1 of the differential amplifier 22 is expressed by the following equation.

Ef1=tanδ・EA・cos(ωt+π/2) さらに、Ef1は整流回路28に接続されている
から、その出力電圧eAは次式で表わされる。
E f1 = tan δ· EA ·cos (ωt+π/2) Furthermore, since E f1 is connected to the rectifier circuit 28, its output voltage e A is expressed by the following equation.

eA=|Ef1|=tanδ・EA 従つて、EAは基準電圧19によつてコントロ
ールされた一定値であるから、出力電圧eAは供試
物2の誘電正接(tanδ)に比例した直流電圧が得
られる。
e A = | E f1 | = tan δ・E A Therefore, since E A is a constant value controlled by the reference voltage 19, the output voltage e A is proportional to the dielectric loss tangent (tan δ) of the specimen 2. DC voltage can be obtained.

一方、出力電圧Ecは掛算器21に接続され、そ
の出力電圧Ee2と出力電圧Edとが差動増幅器23
に接続され、その出力電圧Ef2が同期整流回路2
5に入力され、Edの電圧で同期整流された後、
電子式積分器27を通して掛算器21にフイード
バツクされている。第3図のベクトル図におい
て、掛算器21の出力電圧Ee2はEdと同期した成
分が等しくなるように動作するから、その出力電
圧Ee2は次式で表わされる。
On the other hand, the output voltage E c is connected to the multiplier 21, and the output voltage E e2 and the output voltage E d are connected to the differential amplifier 23.
The output voltage E f2 is connected to the synchronous rectifier circuit 2.
5, and after being synchronously rectified with the voltage of E d ,
Feedback is provided to the multiplier 21 through an electronic integrator 27. In the vector diagram of FIG. 3, the output voltage E e2 of the multiplier 21 operates so that the component synchronized with E d becomes equal, so the output voltage E e2 is expressed by the following equation.

Ee2=EA・CXR4/CSR3・sin(ωt+π/2) 従つて、掛算器21に接続されている電子式積
分器27の出力電圧eB=CXR4CSR3 CS,R3,R4は既知でしかも一定値であるから
出力電圧eBは供試物2の静電容量CXに比例した直
流電圧が得られる。
E e2 = E A C _ _ _ Since R 3 C S , R 3 , and R 4 are known and have constant values, the output voltage e B is a DC voltage proportional to the capacitance C X of the specimen 2.

このように、出力電圧eA,eBは交流電圧1およ
び供試物2に影響されずに自動的に測定が行なわ
れるため、高電圧絶縁物および一般の誘電体の誘
電正接(tanδ)および静電容量CXの測定および
それらの電圧特性を得る装置として便利である。
In this way, the output voltages e A and e B are automatically measured without being affected by the AC voltage 1 and the specimen 2, so the dielectric loss tangent (tan δ) and It is useful as a device for measuring capacitances C X and obtaining their voltage characteristics.

なお、上記実施例では高電圧機器絶縁物で慣用
されているtanδおよび静電容量の電圧特性を考慮
したため、可変交流電圧1を用いた場合について
説明したが、一般誘電体の測定では交流定電圧で
測定される場合が多いが、この場合は、15,1
7,18,19から構成されたAGC回路及び1
6は不用で、より簡単な回路構成により、上記実
施例と同様の効果を得ることができる。
In the above example, the voltage characteristics of tan δ and capacitance, which are commonly used in high-voltage equipment insulators, were taken into consideration, so the case where variable AC voltage 1 was used was explained, but when measuring general dielectric materials, constant AC voltage was used. It is often measured at 15,1
AGC circuit composed of 7, 18, 19 and 1
6 is unnecessary, and the same effect as the above embodiment can be obtained with a simpler circuit configuration.

以上説明したように、この発明によれば演算回
路、AGC回路、同期整流回路等を用いて比較的
簡単な回路構成により、従来の測定装置のわずら
わしさおよび測定誤差を除去し、しかも精度よく
かつ自動的に短時間で供試物の誘電正接(tanδ)
および静電容量を測定することができる優れた効
果を有する。
As explained above, according to the present invention, the troublesomeness and measurement errors of conventional measuring devices can be eliminated with a relatively simple circuit configuration using an arithmetic circuit, an AGC circuit, a synchronous rectifier circuit, etc. Automatically calculates the dielectric loss tangent (tanδ) of the specimen in a short time
and has excellent effects in measuring capacitance.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の測定装置を示す回路図、第2図
はこの発明の一実施例による誘電体の静電容量・
誘電正接測定装置を示す回路図、第3図は第2図
の動作を説明するための各部の演算出力電圧のベ
クトル図である。 なお、同一符号は同一または相当部分を示す。 1……可変交流電圧、2……供試物、3……供
試物の等価直列損失抵抗、4……供試物の等価直
列静電容量、5……無損失標準コンデンサ、6…
…検出抵抗器、7……可変検出抵抗器、8……差
動増幅器、9a,9b……整流回路、10……割
算器、11,12……演算増幅器、13,14…
…抵抗器、15,16……掛算器、17……整流
回路、18……比較器、19……基準直流電圧、
20,21……掛算器、22,23……差動増幅
器、24,25……同期整流回路、26,27…
…電子式積分器、28……整流回路。
FIG. 1 is a circuit diagram showing a conventional measuring device, and FIG. 2 is a diagram showing a dielectric capacitance and
FIG. 3 is a circuit diagram showing the dielectric loss tangent measuring device. FIG. 3 is a vector diagram of calculated output voltages of each part to explain the operation of FIG. 2. Note that the same reference numerals indicate the same or equivalent parts. 1... Variable AC voltage, 2... Test object, 3... Equivalent series loss resistance of test piece, 4... Equivalent series capacitance of test piece, 5... Lossless standard capacitor, 6...
...detection resistor, 7... variable detection resistor, 8... differential amplifier, 9a, 9b... rectifier circuit, 10... divider, 11, 12... operational amplifier, 13, 14...
...Resistor, 15, 16... Multiplier, 17... Rectifier circuit, 18... Comparator, 19... Reference DC voltage,
20, 21... Multiplier, 22, 23... Differential amplifier, 24, 25... Synchronous rectifier circuit, 26, 27...
...electronic integrator, 28...rectifier circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 無損失標準コンデンサ及び誘電体より成る供
試物に可変交流電圧を印加する交流電圧源と、無
損失標準コンデンサおよび供試物に流れる電流に
対応した電圧にそれぞれ変換する手段と、上記標
準コンデンサの電圧変換手段の出力電圧を一定に
するAGC回路と、供試物の電圧変換手段の出力
電圧に上記AGC回路の出力信号を乗算して出力
電圧を送出する第1の掛算手段と、供試物を流れ
る電流に対応した上記第1の掛算手段の出力電圧
と同期整流出力電圧とを乗算する第2の掛算手段
と、上記標準コンデンサの電流に対応した上記電
圧変換手段の出力電圧と上記第2の掛算手段の出
力電圧との差の出力電圧を整流して得られる信号
を供試物の誘電正接とする手段と、上記差の出力
電圧を上記標準コンデンサの電流に対応した電圧
変換手段の出力電圧で同期整流して上記第2の掛
算手段への同期整流出力電圧を得る手段と、上記
供試物を流れる電流に対応した第1の掛算手段の
出力電圧と上記標準コンデンサの電流に対応した
電圧変換手段の出力電圧を第3の掛算手段を通し
て得られる出力電圧との差を取出す手段と、この
手段の出力電圧を上記第1の掛算手段の出力電圧
で同期整流する手段と、この同期整流手段の出力
電圧を上記第3の掛算手段にフイードバツクする
と共に供試物の静電容量とする手段とを備えてな
る誘電体の静電容量・誘電正接測定装置。
1. An AC voltage source that applies a variable AC voltage to a test object consisting of a lossless standard capacitor and a dielectric, a means for converting the voltage into a voltage corresponding to the current flowing through the lossless standard capacitor and the test object, and the above-mentioned standard capacitor. an AGC circuit that keeps the output voltage of the voltage conversion means constant; a first multiplication means that multiplies the output voltage of the voltage conversion means of the specimen by the output signal of the AGC circuit and sends out an output voltage; a second multiplication means for multiplying the output voltage of the first multiplication means corresponding to the current flowing through the object by the synchronous rectification output voltage; means for rectifying the output voltage of the difference between the output voltage of the multiplication means and the output voltage of the multiplication means, and using the signal obtained as the dielectric loss tangent of the specimen; means for synchronously rectifying the output voltage to obtain a synchronously rectified output voltage to the second multiplier; and an output voltage of the first multiplier corresponding to the current flowing through the test object and corresponding to the current of the standard capacitor. means for extracting the difference between the output voltage of the voltage converting means and the output voltage obtained through the third multiplication means; means for synchronously rectifying the output voltage of this means with the output voltage of the first multiplication means; A device for measuring capacitance and dielectric loss tangent of a dielectric, comprising means for feeding back the output voltage of the rectifying means to the third multiplication means and using it as the capacitance of the specimen.
JP6715981A 1981-04-30 1981-04-30 Measuring device for electrostatic capacitance and dielectric loss tangent Granted JPS57182181A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6715981A JPS57182181A (en) 1981-04-30 1981-04-30 Measuring device for electrostatic capacitance and dielectric loss tangent

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6715981A JPS57182181A (en) 1981-04-30 1981-04-30 Measuring device for electrostatic capacitance and dielectric loss tangent

Publications (2)

Publication Number Publication Date
JPS57182181A JPS57182181A (en) 1982-11-09
JPH0314146B2 true JPH0314146B2 (en) 1991-02-26

Family

ID=13336830

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6715981A Granted JPS57182181A (en) 1981-04-30 1981-04-30 Measuring device for electrostatic capacitance and dielectric loss tangent

Country Status (1)

Country Link
JP (1) JPS57182181A (en)

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WO2017016431A1 (en) * 2015-07-24 2017-02-02 国网江苏省电力公司常州供电公司 Relative dielectric loss and capacitance tester
CN106483385B (en) * 2016-12-07 2019-04-26 北京四方继保自动化股份有限公司 A kind of dielectric loss measurement system and measurement method based on punching mutual inductor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4940582A (en) * 1972-08-19 1974-04-16
JPS50110370A (en) * 1974-02-06 1975-08-30

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4940582A (en) * 1972-08-19 1974-04-16
JPS50110370A (en) * 1974-02-06 1975-08-30

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JPS57182181A (en) 1982-11-09

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