JPH03120394A - Pretreatment of semiconductor substrate before plating - Google Patents
Pretreatment of semiconductor substrate before platingInfo
- Publication number
- JPH03120394A JPH03120394A JP25826489A JP25826489A JPH03120394A JP H03120394 A JPH03120394 A JP H03120394A JP 25826489 A JP25826489 A JP 25826489A JP 25826489 A JP25826489 A JP 25826489A JP H03120394 A JPH03120394 A JP H03120394A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- semiconductor substrate
- metal plating
- soln
- immersed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 58
- 238000007747 plating Methods 0.000 title claims abstract description 28
- 239000004065 semiconductor Substances 0.000 title claims abstract description 15
- 229910052751 metal Inorganic materials 0.000 claims abstract description 15
- 239000002184 metal Substances 0.000 claims abstract description 15
- 238000007788 roughening Methods 0.000 claims abstract description 3
- 239000000243 solution Substances 0.000 claims description 10
- 238000002203 pretreatment Methods 0.000 claims description 4
- 239000012670 alkaline solution Substances 0.000 claims description 2
- 238000005530 etching Methods 0.000 abstract description 5
- 238000007654 immersion Methods 0.000 abstract description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 12
- 229910052802 copper Inorganic materials 0.000 description 12
- 239000010949 copper Substances 0.000 description 12
- 238000007772 electroless plating Methods 0.000 description 5
- 230000003287 optical effect Effects 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 3
- 229910000365 copper sulfate Inorganic materials 0.000 description 3
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 3
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- YCIMNLLNPGFGHC-UHFFFAOYSA-N catechol Chemical compound OC1=CC=CC=C1O YCIMNLLNPGFGHC-UHFFFAOYSA-N 0.000 description 2
- 229910001431 copper ion Inorganic materials 0.000 description 2
- PIICEJLVQHRZGT-UHFFFAOYSA-N Ethylenediamine Chemical compound NCCN PIICEJLVQHRZGT-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- ing And Chemical Polishing (AREA)
- Electroplating Methods And Accessories (AREA)
Abstract
Description
【発明の詳細な説明】
〔概 要〕
所定形状に加工した半導体基板の金属メッキの前処理方
法に関し、
前記金属メッキが良好に行えるための半導体基板表面の
粗面化が容易にできる方法の提供を目的とし、
所定形状に加工した半導体基板を金属メッキ液〔産業上
の利用分野〕
本発明は所定形状に加工した半導体基板、特にシリコン
（Ｓｉ）基板表面に金属メッキ層が良好に被着するよう
な該基板表面の粗面化処理方法に関する。[Detailed Description of the Invention] [Summary] Regarding a pretreatment method for metal plating of a semiconductor substrate processed into a predetermined shape, the present invention provides a method that can easily roughen the surface of a semiconductor substrate so that the metal plating can be performed satisfactorily. [Industrial Application Field] The present invention provides a method for applying a metal plating solution to a semiconductor substrate processed into a predetermined shape, in particular onto the surface of a silicon (Si) substrate. The present invention relates to a method for roughening the surface of a substrate.
赤外線検知素子に入射する赤外線の視野角を規制するた
めに該検知素子上に設置される光学部品として、本出願
人は以前に特願昭６３〜２６３３８９号公報に於いて、
ｓｉ基板に異方性エツチング液を用いて所定の間隔を隔
てた開口部を設けた構造の光学部品を提案している。As an optical component installed on an infrared sensing element to regulate the viewing angle of infrared rays incident on the sensing element, the present applicant previously proposed in Japanese Patent Application No. 63-263389,
We have proposed an optical component having a structure in which openings are provided at predetermined intervals on a Si substrate using an anisotropic etching solution.
このような光学部品を形成する際、Ｓｉ基板に異方性エ
ツチング液を用いて、所定の間隔を隔てて開口部を形成
した後、該基板に無電解銅メッキを施して基板表面に銅
メッキ層を形成した後、政調メッキ層を化学処理して黒
化処理し、この黒化処理を施した銅メッキ層を反射防止
膜として用いている。When forming such optical components, an anisotropic etching solution is used on a Si substrate to form openings at predetermined intervals, and then electroless copper plating is applied to the substrate to plate the surface of the substrate with copper. After forming the layer, the political plating layer is chemically treated to blacken it, and the blackened copper plating layer is used as an antireflection film.
従来、このような光学部品を形成する際、第３図に示す
ように厚さが０．５ ｔｓ程度の表面ＩＡが（１１０）
面で、該表面を研磨剤、或いは化学処理により鏡面に仕
上げたＳｉ基板１に所定のパターンのレジスト膜（図示
せず）を形成した後、該Ｓｉ基板ｌをエチレンジアミン
（Ｎｆｂ（Ｃｌ□ｈＮｌとピロカテコール（Ｃ，Ｈ，０
，）の混合液よりなる異方性エツチング液に浸漬して該
基板を（１１０）面に対して垂直方向にエツチングして
所定のピッチの開口部２を形成する。Conventionally, when forming such an optical component, the surface IA with a thickness of about 0.5 ts is (110) as shown in FIG.
After forming a resist film (not shown) in a predetermined pattern on the Si substrate 1 whose surface has been mirror-finished by polishing agent or chemical treatment, the Si substrate 1 is coated with ethylenediamine (Nfb(Cl□hNl) and Pyrocatechol (C,H,0
, ), and the substrate is etched in a direction perpendicular to the (110) plane to form openings 2 at a predetermined pitch.
次いでこのように開口部２が形成されたＳｉ基板１を硫
酸銅を主成分とする無電解メッキ液に浸漬して、無電解
メッキにより銅メッキ層を前記開口部を形成した基板に
付着させた後、該基板を化学処理して前記銅メッキ層を
黒化処理して反射防止膜を形成していた。Next, the Si substrate 1 in which the openings 2 were formed in this manner was immersed in an electroless plating solution containing copper sulfate as a main component, and a copper plating layer was adhered to the substrate in which the openings were formed by electroless plating. Thereafter, the substrate was chemically treated to blacken the copper plating layer to form an antireflection film.
ところで上記鏡面加工したＳｉ基板には銅メッキ層の密
着性が悪いために剥離しやすく、銅メッキ層が付着し難
く、反射防止膜が所要の厚さに形成されない問題がある
。However, the mirror-finished Si substrate has the problem that the copper plating layer has poor adhesion and is easily peeled off, making it difficult for the copper plating layer to adhere, and preventing the antireflection film from being formed to the required thickness.
本発明は上記した問題点を除去し、上記した金属メッキ
層がＳｉ基板表面に良好に被着するようにした半導体基
板の金属メッキの前処理方法を目的とする。The object of the present invention is to provide a pretreatment method for metal plating of a semiconductor substrate, which eliminates the above-mentioned problems and allows the above-described metal plating layer to adhere well to the surface of a Si substrate.
上記目的を達成する本発明の半導体基板の金属メッキの
前処理方法は、所定形状に加工した半導体基板を金属メ
ッキ液に浸漬して該基板表面に金属メッキを施す前に、
前記基板をアルカリ性溶液に浸漬して該基板の表面を粗
面化することで構成する。The pretreatment method for metal plating of a semiconductor substrate of the present invention that achieves the above object includes: before immersing a semiconductor substrate processed into a predetermined shape in a metal plating solution and applying metal plating to the surface of the substrate,
It is constructed by immersing the substrate in an alkaline solution to roughen the surface of the substrate.
Ｓｉ基板を水酸化カリウム（ＫＯＩＩ）の水溶液のよう
なアルカリ性の異方性エツチング液に浸漬すると、Ｓｉ
基板表面が等方向にエツチングされないために基板表面
に微細な凹凸が形成され表面が粗面化し、被メッキ基板
のＳｉ基板の表面積が増大する。このように粗面化した
Ｓｉ基板を硫酸銅を主体とする無電解メッキ液中に浸漬
すると、該無電解メッキ液中の銅イオンが上記Ｓｉ基板
表面の凹凸の部分に吸着されやすくなり、この吸着され
た銅イオンが核と成って銅メッキ層がＳｉ基板と密着性
を高めた状態で形成され易くなる。When a Si substrate is immersed in an alkaline anisotropic etching solution such as an aqueous solution of potassium hydroxide (KOII), the Si
Since the substrate surface is not etched in the same direction, fine irregularities are formed on the substrate surface, the surface becomes rough, and the surface area of the Si substrate to be plated increases. When a Si substrate with a roughened surface is immersed in an electroless plating solution mainly containing copper sulfate, copper ions in the electroless plating solution are easily adsorbed to the uneven portions of the surface of the Si substrate. The adsorbed copper ions serve as nuclei, making it easier to form a copper plating layer with enhanced adhesion to the Si substrate.
以下、図面を用いて本発明の一実施例につき詳細に説明
する。Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.
第１図に示すように前記第３図に示すような所定形状の
開口部を形成したＳｉ基板ｌを１００℃の水酸化カリウ
ム（ＫＯＨ）の４０重量％の水溶液１１の内部に１〜１
．５分間浸漬する。As shown in FIG. 1, a Si substrate 1 with an opening in a predetermined shape as shown in FIG.
．． Soak for 5 minutes.
このようにすると前記Ｓｉ基板１の表面には微小な凹凸
が形成され、表面が粗面化する。In this way, minute irregularities are formed on the surface of the Si substrate 1, and the surface becomes rough.
このように表面が粗面化処理されたＳｉ基板を第２図に
示す。FIG. 2 shows a Si substrate whose surface has been roughened in this manner.
この浸漬時間は前記Ｓｉ基板の厚さや、Ｓｉ基板の表面
積の大小によって適宜調節すると良い。このように表面
が粗面化処理されたＳｉ基板を硫酸銅を主体とした無電
解銅メッキ溶液に浸漬すると、従来の表面が鏡面状の場
合に比して、表面積が増大しているために良好に銅メッ
キ層が所要の厚さに被着され、この銅メッキ層を黒化処
理することで良好な反射防止膜が得られる。This immersion time may be appropriately adjusted depending on the thickness of the Si substrate and the surface area of the Si substrate. When a Si substrate whose surface has been roughened in this way is immersed in an electroless copper plating solution containing mainly copper sulfate, the surface area is increased compared to the conventional case where the surface is mirror-like. The copper plating layer is deposited to a desired thickness, and by blackening the copper plating layer, a good antireflection film can be obtained.
なお、本実施例では半導体基板の無電解メッキについて
例を用いて述べたが、本発明は半導体基板の電解メッキ
についても適用できる。Although this embodiment has been described using an example of electroless plating of a semiconductor substrate, the present invention can also be applied to electrolytic plating of a semiconductor substrate.
以上の説明から明らかなように本発明によれば、無電解
銅メッキ層がＳｉ基板に良好に被着形成されるので、良
好な反射防止膜が被着形成された光学部品が得られる効
果がある。As is clear from the above description, according to the present invention, the electroless copper plating layer is well deposited on the Si substrate, so that it is possible to obtain an optical component having a good antireflection film deposited thereon. be.
第１図は本発明の一実施例の説明図、
第２図は本発明の方法で加工した半導体基板の斜視図、
第３図は従来の方法で加工した半導体基板の斜視図であ
る。
図において、
１はＳｔ基板、ＩＡはＳ＋基板表面、２は開口部、１１
はに０１（水溶液を示す。
釘；１ 図FIG. 1 is an explanatory diagram of an embodiment of the present invention, FIG. 2 is a perspective view of a semiconductor substrate processed by the method of the invention, and FIG. 3 is a perspective view of a semiconductor substrate processed by the conventional method. In the figure, 1 is the St substrate, IA is the S+ substrate surface, 2 is the opening, and 11
Hani01 (indicates an aqueous solution. Nail; 1 Figure
Claims (1)
浸漬して該基板表面に金属メッキを施す以前に、 前記基板をアルカリ性溶液（１１）に浸漬して該基板の
表面を粗面化することを特徴とする半導体基板のメッキ
の前処理方法。[Claims] Before a semiconductor substrate (1) processed into a predetermined shape is immersed in a metal plating solution to apply metal plating to the surface of the substrate, the substrate is immersed in an alkaline solution (11) to coat the substrate. A pretreatment method for plating a semiconductor substrate, characterized by roughening the surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25826489A JPH03120394A (en) | 1989-10-02 | 1989-10-02 | Pretreatment of semiconductor substrate before plating |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25826489A JPH03120394A (en) | 1989-10-02 | 1989-10-02 | Pretreatment of semiconductor substrate before plating |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03120394A true JPH03120394A (en) | 1991-05-22 |
Family
ID=17317823
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25826489A Pending JPH03120394A (en) | 1989-10-02 | 1989-10-02 | Pretreatment of semiconductor substrate before plating |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03120394A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0848087A (en) * | 1994-08-08 | 1996-02-20 | Techno Roll Kk | Printing device |
| JP2003081280A (en) * | 2001-09-11 | 2003-03-19 | Hitachi Chemical Filtec Inc | Wrapping film storage case |
| JP2007145576A (en) * | 2005-11-30 | 2007-06-14 | Tanahashi Kogyo Kk | Tape severing structure |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS509666A (en) * | 1973-05-29 | 1975-01-31 |
-
1989
- 1989-10-02 JP JP25826489A patent/JPH03120394A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS509666A (en) * | 1973-05-29 | 1975-01-31 |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0848087A (en) * | 1994-08-08 | 1996-02-20 | Techno Roll Kk | Printing device |
| JP2003081280A (en) * | 2001-09-11 | 2003-03-19 | Hitachi Chemical Filtec Inc | Wrapping film storage case |
| JP2007145576A (en) * | 2005-11-30 | 2007-06-14 | Tanahashi Kogyo Kk | Tape severing structure |
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