JPH0289368A - Solid-state image sensing device - Google Patents
Solid-state image sensing deviceInfo
- Publication number
- JPH0289368A JPH0289368A JP63241778A JP24177888A JPH0289368A JP H0289368 A JPH0289368 A JP H0289368A JP 63241778 A JP63241778 A JP 63241778A JP 24177888 A JP24177888 A JP 24177888A JP H0289368 A JPH0289368 A JP H0289368A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- solid
- selecting
- photoelectric
- switching transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims abstract description 38
- 238000006243 chemical reaction Methods 0.000 claims abstract description 24
- 238000003384 imaging method Methods 0.000 claims description 13
- 238000000605 extraction Methods 0.000 claims description 7
- 239000011229 interlayer Substances 0.000 claims description 4
- 230000035945 sensitivity Effects 0.000 abstract description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 6
- 229910052710 silicon Inorganic materials 0.000 abstract description 6
- 239000010703 silicon Substances 0.000 abstract description 6
- 238000000034 method Methods 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 12
- 239000004065 semiconductor Substances 0.000 description 11
- 239000010408 film Substances 0.000 description 10
- 239000012535 impurity Substances 0.000 description 10
- 230000003321 amplification Effects 0.000 description 9
- 238000003199 nucleic acid amplification method Methods 0.000 description 9
- 239000010409 thin film Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は光電変換素子からの信号を画素毎に増幅して出
力する構造の固体撮像装置に関し、特にその３次元化を
図った固体撮像装置に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a solid-state imaging device having a structure in which a signal from a photoelectric conversion element is amplified and output for each pixel, and in particular to a solid-state imaging device that is three-dimensional. Regarding.
［発明の概要〕
本発明は、光電変換素子からの信号を画素毎に増幅して
出力する構造の固体撮像装置において、充電変換を行う
基板と電気信号を選択するための基板とを別個に形成し
た後、これら各基板を重ねて形成する構造にすることに
より、高感度化や高解像度化等を実現するものである。[Summary of the Invention] The present invention provides a solid-state imaging device having a structure in which a signal from a photoelectric conversion element is amplified and output for each pixel, in which a board for performing charge conversion and a board for selecting an electrical signal are formed separately. After that, by forming a structure in which these respective substrates are stacked one on top of the other, higher sensitivity, higher resolution, etc. can be realized.
最近の撮像技術においては、光電荷信号を低雑音で増幅
して、高感度化や高Ｓ／Ｎ化を図ろうとする技術が検討
されており、例えば「テレビジョン学会誌Ｊ、１９８８
年８月号、７８７頁〜７９３頁（Ｖｏｌ。In recent imaging technology, technologies are being considered that attempt to amplify photoelectric charge signals with low noise to achieve higher sensitivity and higher S/N.
August issue, pp. 787-793 (Vol.
４２、社団法人テレビジョン学会発行）に記載されるよ
うに、その１つに画素の中に増幅回路を入れたＡＭ Ｉ
（Ａｍｐｌｉｆｉｅｄ ＭＯＳ Ｉｎｔｅｌｌｉｇｅ
ｎｔ Ｉｍａｇｅｒ）等の画素内で信号を増幅し、これ
を走査して取り出す装置が知られている。42, published by the Society of Television Engineers), one of them is AM I, which has an amplifier circuit inside the pixel.
(Amplified MOS Intellige
A device such as a nt Imager that amplifies a signal within a pixel and scans and extracts the signal is known.
このような増幅型固体撮像素子を用いることで、小さな
面積で大きなダイナツクレンジを得ることが可能となる
。By using such an amplification type solid-state image sensor, it is possible to obtain a large dynamic range with a small area.
しかしながら、増幅型とするためには、例えばその単位
画素を１つのフォトダイオードと３つのＭＯＳ）ランジ
スタで構成する必要があり、高密度に配置することが困
難となっている。However, in order to use an amplification type, for example, the unit pixel must be composed of one photodiode and three MOS transistors, which makes it difficult to arrange them at high density.
そこで、本発明は高感度化を図ると共にその高密度化も
１テうような固体；心像装置の提供を目的とする。Therefore, an object of the present invention is to provide a solid-state image device that can achieve high sensitivity and high density.
（課題を解決するための手段〕
上述の目的を達成するために、本発明の固体撮像装置は
、光電変換素子の一方の領域から延在するゲート電極を
層間絶縁膜中に形成し、且つそのゲート電極により増幅
された信号を取り出す取り出し部とからなる光電変１０
Ｍ板を有し、その光電変換基板上に、上記取り出し部
からの信号を選択するスイッチングトランジスタを形成
した選択用基板を形成したことを特徴とする。(Means for Solving the Problems) In order to achieve the above object, the solid-state imaging device of the present invention has a gate electrode extending from one region of a photoelectric conversion element formed in an interlayer insulating film, and a gate electrode extending from one region of a photoelectric conversion element. A photoelectric transformer 10 consisting of an extraction section that takes out the signal amplified by the gate electrode.
The present invention is characterized in that it has an M plate, and a selection substrate on which a switching transistor for selecting a signal from the extraction portion is formed is formed on the photoelectric conversion substrate.
ここで、上記光電変換基板における回路構成は、フォト
ダイオード等の光電変換素子に増幅用のトランジスタの
ゲート電極が接続したものとなり、その増幅した信号が
取り出し部に供給される。その回路には所要のリセット
するための素子を設けることもでき、フォトダイオード
のリセットを基板に特定の電位を与え、基板から電荷を
抜き出すように行うこともできる。また、基板の一方の
面に光電変換素子を配列させ、他方の面に取り出し部を
配列させるような構成にすることもできる。Here, the circuit configuration of the photoelectric conversion board is such that a gate electrode of an amplification transistor is connected to a photoelectric conversion element such as a photodiode, and the amplified signal is supplied to the extraction section. The circuit may be provided with a necessary resetting element, and the photodiode may be reset by applying a specific potential to the substrate and extracting the charge from the substrate. Further, it is also possible to adopt a configuration in which photoelectric conversion elements are arranged on one surface of the substrate and take-out portions are arranged on the other surface.
さらに、取り出し部として特に選択成長層を用いるよう
な構成でも良い、選択成長層としては、選択エピタキシ
ャル層や選択シリサイド層２選択タングステン層等の各
種材料を用いることができる。Further, a structure in which a selectively grown layer is particularly used as the extraction portion may be used. As the selectively grown layer, various materials such as a selective epitaxial layer, a selective silicide layer, a selective tungsten layer, etc. can be used.
上記スイッチングトランジスタが形成された基板は、特
に７ｉＪ膜のものとすることができ、その場合にはスイ
ッチングトランジスタを薄膜トランジスタにすることが
できる。The substrate on which the switching transistor is formed can in particular be of a 7iJ film, in which case the switching transistor can be a thin film transistor.
（作用〕
光電変換基板上に選択用基板を形成することで、素子の
構造を３次元化することが可能となる。従って、高密度
化が可能となり、高解像度化を図ることができる。また
、光電変換基板には、スイッチングトランジスタ等が設
けられず、その光電変換基板には信号の選択のための機
構が不要となり、その分だけ光電変換素子の面積等を増
大させて、高感度化を図ることができる。(Function) By forming the selection substrate on the photoelectric conversion substrate, it is possible to make the structure of the element three-dimensional.Therefore, it is possible to increase the density and achieve high resolution. , the photoelectric conversion board is not provided with a switching transistor, etc., and the photoelectric conversion board does not require a mechanism for signal selection, which increases the area of the photoelectric conversion element and increases sensitivity. can be achieved.
（実施例〕 本発明の好適な実施例を図面を参照しながら説明する。(Example〕 Preferred embodiments of the present invention will be described with reference to the drawings.
本実施例の固体撮像装置は、各画素毎に信号の増幅機能
を有した固体撮像装置の例である。The solid-state imaging device of this embodiment is an example of a solid-state imaging device that has a signal amplification function for each pixel.
まず、その模式的な断面構造は、第１図に模式的に示す
ように、主に光電変ＩＡ基板ｌと選択用基（反２が張り
合わされた構造とされている。First, its schematic cross-sectional structure, as schematically shown in FIG. 1, is mainly a structure in which a photoelectric transformer IA substrate 1 and a selection group (2) are pasted together.
まず、光電変換基板１は、ｒＩ型のシリコンｙ！Ｅ阪１
１にｐ型のウェル領域１２が形成された構造を有し、そ
のｐ型のウェル領域１２の主面１２ａには、ｎ−型の不
純物領域１３．チャンネル形成領域１４．ｎ’型の不純
物領域１５．チャンネルストッパー領域１６が形成され
ている。なお、図示を省略するが、ｎ型のシリコン基板
１１の裏面１１ａには遮光膜が形成される。上記ｒ１−
型の不純物領域１３はｐ型のウェル領域１２とｐｎ接合
を形成し、フォトダイオードの一部として機能する。First, the photoelectric conversion substrate 1 is made of rI type silicon y! E-saka 1
The p-type well region 12 has a structure in which a p-type well region 12 is formed in the main surface 12a of the p-type well region 12, and an n-type impurity region 13. Channel forming region 14. n' type impurity region 15. A channel stopper region 16 is formed. Although not shown, a light shielding film is formed on the back surface 11a of the n-type silicon substrate 11. Above r1-
The type impurity region 13 forms a pn junction with the p-type well region 12, and functions as a part of a photodiode.
チャンネル形成領域１４は、増幅用トランジスタのチャ
ンネルとなる領域であり、第２図に示すように、ｎ゛型
の不純物領域１５と電圧Ｖａａが供給されるｎ゛型の不
純′＋！Ａ領域１９の間に延在される。The channel forming region 14 is a region that becomes a channel of the amplification transistor, and as shown in FIG. 2, it is composed of an n' type impurity region 15 and an n' type impurity '+! to which the voltage Vaa is supplied. It extends between the A areas 19.
チャンネルストンパー領域１６は各画素間の分離を行う
ための領域である。上記ｎ−型の不純物領域１３の表面
からは、シリコン酸化膜等の層間絶縁膜１７中にゲート
電極１８が取り出されている。The channel stomper area 16 is an area for separating each pixel. A gate electrode 18 is extracted from the surface of the n-type impurity region 13 into an interlayer insulating film 17 such as a silicon oxide film.
このゲート電極１８は上記チャンネル形成領域１４に！
ｆ！！縁膜を介して臨み、増幅用トランジスタのゲート
として機能する。従って、フォトダイオードに光が入射
することで、ゲート電極１８の電位が高くなり、チャン
ネル形成領域１４にチャンネルが形成され、上記ｎ゛型
の不純物領域１９と上記ｎ゛型の不純物領域１５の間が
導通ずる。そのｎ°型の不純物領域１５の表面には層間
絶縁膜！７を開口してコンタクトホール２１が形成され
、そのコンタクトホール
シリサイド石からなる選択成長層２０が形成されている
。この選択成長層２０は選択用基板２と光電変換基板ｌ
の間の界面１ａまで選択成長により形成され、増幅され
た信号の取り出し部取り出し部として機能する。This gate electrode 18 is located in the channel forming region 14!
f! ! It faces through the edge film and functions as the gate of the amplification transistor. Therefore, when light is incident on the photodiode, the potential of the gate electrode 18 increases, a channel is formed in the channel forming region 14, and a channel is formed between the n-type impurity region 19 and the n-type impurity region 15. is conductive. An interlayer insulating film is formed on the surface of the n° type impurity region 15! A contact hole 21 is formed by opening 7, and a selective growth layer 20 made of silicide stone is formed in the contact hole. This selective growth layer 20 consists of a selective substrate 2 and a photoelectric conversion substrate l.
It is formed by selective growth up to the interface 1a between them, and functions as an extraction portion for the amplified signal.
このような光電変換基板ｌと選択用基板２の間の界面１
ａは極めて平坦な面とされる。そして、上記選択用基板
２は、その界面１ａで張り合わされている。この選択用
基板２の界面ｌａ上にはシリコン薄膜が形成され、一部
がスイッチングトランジスタ（Ｙ選択トランジスタ）の
活性領域として機能する。すなわち、上記選択成長層２
０に接続Ｖる領域にｎ°型の半導体領域２２が形成され
、このｎ゛型の半導体領域２２と隣接してｐ型の半導体
領域２３が設けられる。このｐ型の半導体領域２３の上
部には絶縁膜２４を介してゲート電極２５が形成される
。そのｐ型の半導体領域２３を間に挟んでｎ°型の半導
体領域２２と対向するようにｎ゛型の半導体領域２６が
形成される。これらｎ゛型の半導体領域２２．２６は素
子分離のためのＰ゛型の半導体領域２７に囲まれる。そ
して、これらの各半導体領域２２，２３，２６．２７の
上部には絶縁膜２８が形成され、その絶縁膜２８の上部
には上記ゲート電極２５と接続するアルミ配線層２９が
形成される。このアルミ配線層２９はＹ選択用の信号Φ
Ｙをゲート電極２５に伝え、選択用基板２では、その信
号ΦＹに基づいて薄膜トランジスタからなるスイッチン
グトランジスタが作動することになる。An interface 1 between such a photoelectric conversion substrate 1 and a selection substrate 2
A is an extremely flat surface. The selection substrates 2 are bonded together at the interface 1a. A silicon thin film is formed on the interface la of the selection substrate 2, and a portion thereof functions as an active region of a switching transistor (Y selection transistor). That is, the selective growth layer 2
An n° type semiconductor region 22 is formed in a region connected to V0, and a p type semiconductor region 23 is provided adjacent to this n° type semiconductor region 22. A gate electrode 25 is formed above this p-type semiconductor region 23 with an insulating film 24 interposed therebetween. An n° type semiconductor region 26 is formed to face the n° type semiconductor region 22 with the p type semiconductor region 23 therebetween. These n-type semiconductor regions 22 and 26 are surrounded by a p-type semiconductor region 27 for element isolation. An insulating film 28 is formed above each of these semiconductor regions 22, 23, 26, and 27, and an aluminum wiring layer 29 connected to the gate electrode 25 is formed above the insulating film 28. This aluminum wiring layer 29 is a signal Φ for Y selection.
Y is transmitted to the gate electrode 25, and in the selection substrate 2, a switching transistor made of a thin film transistor is operated based on the signal ΦY.
おおむね上述の如き構成を有する固体撮像装置の各画素
の回路を第３図に示す。１つの画素は１つのフォトダイ
オード３１と２つのＭＯＳトランジスタ３２．３３とか
らなり、ＭＯＳトランジスタ３２は信号の増幅用に用い
られ、ＭＯＳ）ランジスタ３３は画素の選択用に用いら
れる。第１図の対応する部分については、フォトダ・イ
オード３１の一端が上記ｎ゛型の不純物領域１３となり
、これがＭＯＳ）ランジスタ３２のゲートとなるゲート
電１順１８に接続する。２つのＭＯＳトランジスタ３２
．３３の接続点３４は、第１図の選択成長層２０が該当
し、ＭＯＳトランジスタ３３のゲートは上記ゲートｉ極
２５が対応する。」−記ｎ゛型の半導体領域２６がＸ選
択のために用いられる。FIG. 3 shows a circuit of each pixel of a solid-state imaging device having a configuration roughly as described above. One pixel consists of one photodiode 31 and two MOS transistors 32 and 33, the MOS transistor 32 is used for signal amplification, and the MOS transistor 33 is used for pixel selection. Regarding the corresponding portion in FIG. 1, one end of the photodiode 31 becomes the n' type impurity region 13, which is connected to the gate electrode 18 which becomes the gate of the MOS transistor 32. two MOS transistors 32
．． The connection point 33 corresponds to the selectively grown layer 20 in FIG. 1, and the gate of the MOS transistor 33 corresponds to the gate i-pole 25. ''-n'' type semiconductor region 26 is used for X selection.
ここで、本実施例の固体撮像装置が選択用基板２と光電
変換基板１の張り合わせからなるために、上記〜１０Ｓ
トランジスタ３２．３３は、基板の主面に垂直な方向に
重なって配せられることになる。Here, since the solid-state imaging device of this embodiment is composed of the selection substrate 2 and the photoelectric conversion substrate 1, the above ~10S
The transistors 32 and 33 are arranged to overlap in a direction perpendicular to the main surface of the substrate.
このため各画素の面積をそれほど大きく採ることなく増
幅型の素子構成にすることができ、高感度化を図ると同
時に、高密度化，高解像度化を図ることができる。また
、本実施例の固体撮像装置では、画素の回路にリセット
用の素子が設けられないが、フォトダイオード３１のす
七ノドは、ｐ型のウェル領域１２やｎ型のシリコン基１
ｆｉ１１等に所要の電位を与え、電荷を基板側へ引き出
すことで行うことができる。このためリセット用の素子
が設けられない分だけ、素子の面積を有効に用いること
ができ、高密度化．高解像度化を図ることができる。Therefore, an amplification type element structure can be provided without requiring a large area for each pixel, and it is possible to achieve high sensitivity, high density, and high resolution at the same time. Further, in the solid-state imaging device of this embodiment, a reset element is not provided in the pixel circuit, but the seven nodes of the photodiode 31 are connected to the p-type well region 12 and the n-type silicon substrate 1.
This can be done by applying a required potential to fi11 etc. and drawing out the charge to the substrate side. Therefore, since no reset element is provided, the area of the element can be used effectively, resulting in higher density. High resolution can be achieved.
このような固体撮像装置の製逍方法について節単に説明
すれば、フォトダイオードと増幅用トランジスタを有し
た光電変ＩＡ基板１を形成し、その界面１ａを十分に平
坦化する。また、この時ス沢的な成長方法によって、取
り出し部としての選択成長層２０を形成する。十分な平
１！ｌ！化を図った後、シリコン薄膜を有した選択用基
板２を玉り合わせる。この選択用基板２は、通常のウェ
ハをグラ・インディング、ラシピング，ポリッシング、
等を施したようなものであっても良い。そして、その選
択用）ｉ：仮２にスイッチングトランジスタ等を作るこ
とで、スイッチング（・ランジスクはＳＯ［構造となり
、固体ｔｉ像装置の画素の選択用の回路の部分が製造さ
れることになる。To briefly explain the manufacturing method of such a solid-state imaging device, a photoelectric variable IA substrate 1 having a photodiode and an amplification transistor is formed, and its interface 1a is sufficiently flattened. Further, at this time, a selective growth layer 20 as a take-out portion is formed by a slow growth method. Enough Hei 1! l! After this, the selection substrate 2 having a silicon thin film is balled together. This selection substrate 2 can be used for grinding, rasping, polishing, and
It may also be one that has been subjected to such processing. Then, by creating a switching transistor, etc. for the selection) i: temporary 2, the switching transistor becomes an SO[ structure, and the circuit part for selecting the pixel of the solid-state TI image device is manufactured.
本発明の固体撮像装置は、光電変換基板−トに選沢用益
板を形成するため、素子の構造を３次元化することがで
き、従って、高密度化、高感度化。In the solid-state imaging device of the present invention, since the selection plate is formed on the photoelectric conversion substrate, the structure of the element can be made three-dimensional, and therefore, the density and sensitivity can be increased.
高解像度化を図ることができる。また、実施例に説明し
たように、２つのＭＯＳＬランジスタで画素の回路を構
成することもでき、撮像素子の特性向上を図ることがで
きる。High resolution can be achieved. Further, as described in the embodiment, a pixel circuit can be configured with two MOSL transistors, and the characteristics of the image sensor can be improved.
第１図は本発明の固体ｉｉ像装置の一例の模式的な断面
図、第２図はその一例の模式的な平面図、第３図はその
一例の画素の回路構成を示す回路図である。
ｌ・・・光電変換基板
２・・・選択用基板
特許出願人 ソニー株式会社
代理人弁理士 小池 晃（１山２名）FIG. 1 is a schematic cross-sectional view of an example of the solid-state II image device of the present invention, FIG. 2 is a schematic plan view of the example, and FIG. 3 is a circuit diagram showing the circuit configuration of a pixel of the example. . l...Photoelectric conversion board 2...Selection board Patent applicant Akira Koike, patent attorney representing Sony Corporation (2 people per pile)
Claims (1)
層間絶縁膜中に形成し、且つそのゲート電極により増幅
された信号を取り出す取り出し部を有する光電変換基板
上に、上記取り出し部からの信号を選択するスイッチン
グトランジスタを形成した選択用基板を形成してなる固
体撮像装置。A gate electrode extending from one region of the photoelectric conversion element is formed in an interlayer insulating film, and a signal from the extraction portion is placed on a photoelectric conversion substrate having an extraction portion for extracting a signal amplified by the gate electrode. A solid-state imaging device including a selection substrate formed with switching transistors to be selected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63241778A JPH0289368A (en) | 1988-09-27 | 1988-09-27 | Solid-state image sensing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63241778A JPH0289368A (en) | 1988-09-27 | 1988-09-27 | Solid-state image sensing device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0289368A true JPH0289368A (en) | 1990-03-29 |
Family
ID=17079380
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63241778A Pending JPH0289368A (en) | 1988-09-27 | 1988-09-27 | Solid-state image sensing device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0289368A (en) |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5563429A (en) * | 1994-06-14 | 1996-10-08 | Nikon Corp. | Solid state imaging device |
| JP2002246580A (en) * | 2001-02-16 | 2002-08-30 | Sharp Corp | Image sensor and manufacturing method thereof |
| JP2006173351A (en) * | 2004-12-15 | 2006-06-29 | Sony Corp | Rear-incident solid-state imaging apparatus and its manufacturing method |
| JP2007019540A (en) * | 2006-09-20 | 2007-01-25 | Sharp Corp | Image sensor |
| US7332783B2 (en) | 2002-07-17 | 2008-02-19 | Fujifilm Corporation | Semiconductor device with a photoelectric converting portion and a light-shading means |
| WO2009034731A1 (en) * | 2007-09-12 | 2009-03-19 | Unisantis Electronics (Japan) Ltd. | Solid-state imaging element |
| WO2009133957A1 (en) * | 2008-05-02 | 2009-11-05 | 日本ユニサンティスエレクトロニクス株式会社 | Solid-state image pickup element |
| JP2010045843A (en) * | 1996-08-20 | 2010-02-25 | Thomson Licensing | High sensitivity image sensor arrays |
| US8097907B2 (en) | 2008-05-02 | 2012-01-17 | Unisantis Electronics Singapore Pte Ltd. | Solid-state imaging device |
| US8330089B2 (en) | 2007-09-12 | 2012-12-11 | Unisantis Electronics Singapore Pte Ltd. | Solid-state imaging device |
| US8372713B2 (en) | 2008-01-29 | 2013-02-12 | Unisantis Electronics Singapore Pte Ltd. | Semiconductor device and production method therefor |
| JP5350795B2 (en) * | 2007-09-12 | 2013-11-27 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | Solid-state image sensor |
| US8916478B2 (en) | 2011-12-19 | 2014-12-23 | Unisantis Electronics Singapore Pte. Ltd. | Method for manufacturing semiconductor device and semiconductor device |
| US9035384B2 (en) | 2011-12-19 | 2015-05-19 | Unisantis Electronics Singapore Pte. Ltd. | Semiconductor device |
| US9153697B2 (en) | 2010-06-15 | 2015-10-06 | Unisantis Electronics Singapore Pte Ltd. | Surrounding gate transistor (SGT) structure |
-
1988
- 1988-09-27 JP JP63241778A patent/JPH0289368A/en active Pending
Cited By (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5563429A (en) * | 1994-06-14 | 1996-10-08 | Nikon Corp. | Solid state imaging device |
| JP2010045843A (en) * | 1996-08-20 | 2010-02-25 | Thomson Licensing | High sensitivity image sensor arrays |
| JP2002246580A (en) * | 2001-02-16 | 2002-08-30 | Sharp Corp | Image sensor and manufacturing method thereof |
| US7518206B2 (en) | 2002-07-17 | 2009-04-14 | Fujifilm Corporation | Semiconductor device with a photoelectric converting portion and a light-shading means |
| US7332783B2 (en) | 2002-07-17 | 2008-02-19 | Fujifilm Corporation | Semiconductor device with a photoelectric converting portion and a light-shading means |
| US7384812B2 (en) | 2002-07-17 | 2008-06-10 | Fujifilm Corporation | Method of manufacturing a semiconductor device with light shading means |
| US8597972B2 (en) | 2004-12-15 | 2013-12-03 | Sony Corporation | Back-illuminated type solid-state imaging device |
| US8198694B2 (en) | 2004-12-15 | 2012-06-12 | Sony Corporation | Back-illuminated type solid-state imaging device |
| US8198695B2 (en) | 2004-12-15 | 2012-06-12 | Sony Corporation | Back-illuminated type solid-state imaging device |
| US8030720B2 (en) | 2004-12-15 | 2011-10-04 | Sony Corporation | Back-illuminated type solid-state imaging device |
| US8188522B2 (en) | 2004-12-15 | 2012-05-29 | Sony Corporation | Back-illuminated type solid-state imaging device |
| US7795676B2 (en) | 2004-12-15 | 2010-09-14 | Sony Corporation | Back-illuminated type solid-state imaging device |
| JP2006173351A (en) * | 2004-12-15 | 2006-06-29 | Sony Corp | Rear-incident solid-state imaging apparatus and its manufacturing method |
| JP2007019540A (en) * | 2006-09-20 | 2007-01-25 | Sharp Corp | Image sensor |
| JP5350795B2 (en) * | 2007-09-12 | 2013-11-27 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | Solid-state image sensor |
| JP4793493B2 (en) * | 2007-09-12 | 2011-10-12 | 日本ユニサンティスエレクトロニクス株式会社 | Solid-state imaging device, driving method thereof, and solid-state imaging device matrix |
| US7872287B2 (en) | 2007-09-12 | 2011-01-18 | Unisantis Electronics (Japan) Ltd. | Solid-state imaging device |
| WO2009034623A1 (en) * | 2007-09-12 | 2009-03-19 | Unisantis Electronics (Japan) Ltd. | Solid-state image sensor |
| WO2009034731A1 (en) * | 2007-09-12 | 2009-03-19 | Unisantis Electronics (Japan) Ltd. | Solid-state imaging element |
| US8330089B2 (en) | 2007-09-12 | 2012-12-11 | Unisantis Electronics Singapore Pte Ltd. | Solid-state imaging device |
| US8372713B2 (en) | 2008-01-29 | 2013-02-12 | Unisantis Electronics Singapore Pte Ltd. | Semiconductor device and production method therefor |
| US8097907B2 (en) | 2008-05-02 | 2012-01-17 | Unisantis Electronics Singapore Pte Ltd. | Solid-state imaging device |
| WO2009133623A1 (en) * | 2008-05-02 | 2009-11-05 | 日本ユニサンティスエレクトロニクス株式会社 | Solid-state imaging element |
| WO2009133957A1 (en) * | 2008-05-02 | 2009-11-05 | 日本ユニサンティスエレクトロニクス株式会社 | Solid-state image pickup element |
| US9153697B2 (en) | 2010-06-15 | 2015-10-06 | Unisantis Electronics Singapore Pte Ltd. | Surrounding gate transistor (SGT) structure |
| US8916478B2 (en) | 2011-12-19 | 2014-12-23 | Unisantis Electronics Singapore Pte. Ltd. | Method for manufacturing semiconductor device and semiconductor device |
| US9035384B2 (en) | 2011-12-19 | 2015-05-19 | Unisantis Electronics Singapore Pte. Ltd. | Semiconductor device |
| US9245889B2 (en) | 2011-12-19 | 2016-01-26 | Unisantis Electronics Singapore Pte. Ltd. | Method for manufacturing semiconductor device and semiconductor device |
| US9362353B2 (en) | 2011-12-19 | 2016-06-07 | Unisantis Electronics Singapore Pte. Ltd. | Semiconductor device |
| US9478545B2 (en) | 2011-12-19 | 2016-10-25 | Unisantis Electronics Singapore Pte. Ltd. | Method for manufacturing semiconductor device and semiconductor device |
| US9748244B2 (en) | 2011-12-19 | 2017-08-29 | Unisantis Electronics Singapore Pte. Ltd. | Method for manufacturing semiconductor device and semiconductor device |
| US9806163B2 (en) | 2011-12-19 | 2017-10-31 | Unisantis Electronics Singapore Pte. Ltd. | Semiconductor device having an nMOS SGT and a pMOS SGT |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2594992B2 (en) | Solid-state imaging device | |
| JP3410016B2 (en) | Amplification type solid-state imaging device | |
| US6774453B2 (en) | Semiconductor device, image pickup device using the same, and photoelectric conversion device | |
| JPH09246514A (en) | Amplification type solid-state image sensing device | |
| TWI375320B (en) | Image sensor and manufacturing method thereof | |
| JP4304927B2 (en) | Solid-state imaging device and manufacturing method thereof | |
| JPH0289368A (en) | Solid-state image sensing device | |
| JPH0767151B2 (en) | Infrared imaging device | |
| US6278102B1 (en) | Method of detecting electromagnetic radiation with bandgap engineered active pixel cell design | |
| JP2866328B2 (en) | Solid-state imaging device | |
| JPH05235317A (en) | Solid-state image pickup element | |
| JPH08316450A (en) | Multilayer solid-state image pickup device and its manufacture | |
| JP3052560B2 (en) | Charge transfer imaging device and method of manufacturing the same | |
| US8049288B2 (en) | Image sensor and method for manufacturing the same | |
| JPH10209417A (en) | Solid-state radiation detecting device | |
| JP3049930B2 (en) | Non-destructive readout solid-state imaging device | |
| US6232589B1 (en) | Single polysilicon CMOS pixel with extended dynamic range | |
| JP3047965B2 (en) | Solid-state imaging device | |
| JP3857387B2 (en) | Manufacturing method of semiconductor radiation detection apparatus | |
| KR102681913B1 (en) | solid-state imaging device | |
| JPH07297295A (en) | Mos transistor structure and charge transfer device with it | |
| JP2870048B2 (en) | Solid-state imaging device | |
| JP3363528B2 (en) | Photoelectric conversion device and driving method thereof | |
| JPH04130665A (en) | Solid state image sensor | |
| US5593902A (en) | Method of making photodiodes for low dark current operation having geometric enhancement |