JPH0287932A - Power circuit - Google Patents
Power circuitInfo
- Publication number
- JPH0287932A JPH0287932A JP63237738A JP23773888A JPH0287932A JP H0287932 A JPH0287932 A JP H0287932A JP 63237738 A JP63237738 A JP 63237738A JP 23773888 A JP23773888 A JP 23773888A JP H0287932 A JPH0287932 A JP H0287932A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- output
- slave
- voltage
- stabilized power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000006641 stabilisation Effects 0.000 claims description 15
- 238000011105 stabilization Methods 0.000 claims description 15
- 230000001105 regulatory effect Effects 0.000 claims description 13
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000001276 controlling effect Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
Landscapes
- Direct Current Feeding And Distribution (AREA)
- Control Of Voltage And Current In General (AREA)
- Stand-By Power Supply Arrangements (AREA)
- Supply And Distribution Of Alternating Current (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は電源回路に関し、特に並列運転された安定化電
源の電源回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power supply circuit, and particularly to a power supply circuit for stabilized power supplies operated in parallel.
従来のこの種の技術としては、第2図のように、並列に
出力端子が接続された安定化電源7゜8’ 、9’は、
各々電圧制御用シャントレギュレータ28.31をもち
、電圧設定用抵抗24゜25および32.33により各
々の出力電圧が設定され、電圧帰還量制御抵抗26.3
0を通じ出力電圧帰還用フォトカブラ12A・12B、
13A・13Bを通して、スイッチング安定化制御回路
10.11に出力電圧信号が入力され、スイッチング安
定化制御回路10.11により出力電圧が安定化される
。In the conventional technology of this kind, as shown in Fig. 2, stabilized power supplies 7°8' and 9' whose output terminals are connected in parallel are
Each has a voltage control shunt regulator 28.31, each output voltage is set by voltage setting resistors 24, 25 and 32.33, and voltage feedback control resistor 26.3.
0 through output voltage feedback photocoupler 12A/12B,
The output voltage signal is input to the switching stabilization control circuit 10.11 through 13A and 13B, and the output voltage is stabilized by the switching stabilization control circuit 10.11.
ところが、各々の安定化電源の出力電圧の設定には誤差
があり、出力電圧の高い方の電源から負荷に電流が供給
され、その出力電圧の高い方の電源が垂下するまで負荷
に電流を供給しつづける。However, there is an error in the output voltage settings of each stabilized power supply, and current is supplied to the load from the power supply with a higher output voltage, and current is supplied to the load until the power supply with a higher output voltage drops. Keep doing it.
そのため、冷却するには全体の負荷が電源の定格の合計
より小さい場合でも、出力電圧が高い電源に対しては冷
却を強くする必要があり、出力電圧が高い方の電源が垂
下状態の時、入力電圧のリップルが出力に出てしまうと
いう問題がある。Therefore, even if the overall load is smaller than the sum of the power supply ratings, stronger cooling is required for the power supply with a higher output voltage, and when the power supply with a higher output voltage is in a drooping state, There is a problem that ripples in the input voltage appear on the output.
上述した従来の並列運転方式は、垂下方式で、また個々
の安定化電源が各々電圧制御回路を内蔵しているため、
出力設定電圧4の誤差により、出力電圧の高い方の第一
の安定化電源が負荷に電流を供給し、第一の安定化電源
が垂下特性に入り電圧が少し低下し、二番目に出力電圧
が高い第二の安定化電源から負荷に電流を供給し始める
まで、第一の安定化電源から負荷に供給する。従って第
二の安定化電源が立上るまで、実装状態における熱的バ
ランスが偏ることと、垂下状態に入った時に入力のリッ
プル電圧が負荷側に現れるという欠点があった。The conventional parallel operation method described above is a drooping method, and each stabilized power supply has a built-in voltage control circuit, so
Due to the error in the output setting voltage 4, the first regulated power supply with the higher output voltage supplies current to the load, the first regulated power supply enters a drooping characteristic, and the voltage drops slightly, and the second output voltage The first regulated power supply supplies current to the load until the second regulated power supply starts supplying current to the load. Therefore, there are disadvantages that the thermal balance in the mounted state is biased until the second stabilized power source is turned on, and that input ripple voltage appears on the load side when the device enters a drooping state.
本発明の電源回路は、交流または直流を入力し、所要の
安定化直流出力を発生する複数の安定化電源の正負の出
力端子の同極同士を接続して並列運転する電源回路にお
いて、マスターの安定化電源の正側出力端子に出力電圧
帰還用の第1のフォトカブラのアノードと電圧設定用第
1の抵抗の一端とが接続され、前記帰還用フォトカブラ
のカソードに電圧帰還量制御用抵抗の一端が接続され、
前記電圧帰還量制御用抵抗の他端に電圧安定化用シャン
トレギュレータのカソードと複数のスレーブの安定化電
源の電圧帰還量制御用抵抗の一端が接続され、シャント
レギュレータのアノードはマスターの安定化電源の負側
出力端子と電圧設定用第2の抵抗の一端に接続され、前
記電圧設定用第2の抵抗の他端は前記シャントレギュレ
ータのリファレンス端子と前記電圧設定用第1の抵抗の
他端に接続され、前記第1のフォトカプラの出力トラン
ジスタのコレクタおよびエミッタはスイッチング安定化
制御回路に接続され、前記複数のスレーブ側安定化電源
の電圧帰還量制御用抵抗の他端は、スレーブ側安定化電
源帰還用の第2のフォトカプラのカソードに接続され、
前記第2のフォトカプラのアノードは各々のスレーブ側
安定化電源の正側出力端子に接続され、前記フォトカプ
ラBの出力側トランジスタのコレクタおよびエミッタは
、各々スレーブ側安定化電源のスイッチング安定化制御
回路に接続され、マスターまたはスレーブのスイッチン
グ安定化制御回路は、交流または直流と前記第一または
第二のフォトカプラの出力信号とを入力し、安定化直流
を出力して構成される。The power supply circuit of the present invention operates in parallel by connecting the same polarity of the positive and negative output terminals of a plurality of stabilized power supplies that input AC or DC and generate the required stabilized DC output. The anode of a first photocoupler for output voltage feedback and one end of a first voltage setting resistor are connected to the positive output terminal of the stabilized power supply, and a voltage feedback amount control resistor is connected to the cathode of the feedback photocoupler. one end of is connected,
The other end of the voltage feedback control resistor is connected to the cathode of a voltage stabilizing shunt regulator and one end of the voltage feedback control resistor of a plurality of slave stabilized power supplies, and the anode of the shunt regulator is connected to the master stabilized power supply. is connected to the negative output terminal of the shunt regulator and one end of the second voltage setting resistor, and the other end of the second voltage setting resistor is connected to the reference terminal of the shunt regulator and the other end of the first voltage setting resistor. The collector and emitter of the output transistor of the first photocoupler are connected to a switching stabilization control circuit, and the other ends of the voltage feedback amount control resistors of the plurality of slave-side stabilized power supplies are connected to the slave-side stabilization control circuit. Connected to the cathode of the second photocoupler for power return,
The anode of the second photocoupler is connected to the positive output terminal of each slave side regulated power supply, and the collector and emitter of the output side transistor of the photocoupler B are connected to the switching stabilization control of the slave side regulated power supply. A master or slave switching stabilization control circuit connected to the circuit is constructed by inputting alternating current or direct current and the output signal of the first or second photocoupler, and outputting stabilized direct current.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例の構成を示す回路図である。FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention.
1,2はマスターとなる安定化電源7の入力端子で交流
または直流を入力し、スイッチング安定化制御回路10
へ出力し、スイッチング安定化制御回路10は、出力電
圧帰還用フォトカブラの出力トランジスタ12Bのコレ
クタとエミッタとが接続されることによって出力電圧帰
還信号が入力され、出力端子に所定の出力電圧を出力し
、各々並列運転のためスレーブ安定化電源8゜9の出力
端子16.17および1.8.19以下接続されている
スレーブ安定化電源に接続され、負荷供給ライン20.
21を通じて負荷へ供給される。1 and 2 are input terminals of a stabilized power supply 7 serving as a master, into which AC or DC is input, and a switching stabilization control circuit 10
The switching stabilization control circuit 10 receives an output voltage feedback signal by connecting the collector and emitter of the output transistor 12B of the output voltage feedback photocoupler, and outputs a predetermined output voltage to the output terminal. are connected to the output terminals 16.17 and 1.8.19 of the slave regulated power supply 8.9 for parallel operation, respectively, and to the slave regulated power supply connected to the load supply line 20.
21 to the load.
抵抗24.25 (その値をそれぞれR24,R25で
示す)はスレーブの安定化電源出力と接続されているマ
スター側の出力電圧(VREF)を分圧しシャントレギ
ュレータ28の比較入力端子へ接続され、シャン)・レ
ギュレータ28は、その内部の基準電圧と比較し、出力
電圧がV、旺x (R24+R25)/R25になるよ
うにシャントレギュレータ28のカソードは電圧帰還量
制限抵抗26を通して電流吸込量を制御し、直列に接続
された出力電圧帰還用フォトカプラの入力ダイオード1
2Aに流れる電流が制御されることにより出力側トラン
ジスタ12の出力電流が制御される。出力電圧が上昇す
ると、シャントレギュレータ28は吸込電流を大きくし
、結果として出力電圧帰還用フォトカプラの出力トラン
ジスタ12の出力電流が大きくなり、スイッチング安定
化制御回路10は出力電圧を小さくするように制御する
ことにより安定化される。Resistors 24 and 25 (their values are indicated by R24 and R25, respectively) divide the output voltage (VREF) on the master side, which is connected to the stabilized power supply output of the slave, and are connected to the comparison input terminal of the shunt regulator 28. )・The regulator 28 compares it with its internal reference voltage, and the cathode of the shunt regulator 28 controls the amount of current sucked through the voltage feedback amount limiting resistor 26 so that the output voltage becomes V, (R24+R25)/R25. , input diode 1 of the output voltage feedback photocoupler connected in series.
By controlling the current flowing to 2A, the output current of the output side transistor 12 is controlled. When the output voltage increases, the shunt regulator 28 increases the sink current, and as a result, the output current of the output transistor 12 of the output voltage feedback photocoupler increases, and the switching stabilization control circuit 10 controls the output voltage to decrease. It is stabilized by
このシャンl−レギュレータ28のカソードは出力電圧
制御ライン22を通じて、スレーブの安定化電源8の電
圧帰還量制限抵抗30と接続され、マスター側と同様に
スレーブ側の出力電圧帰還用フォトカプララの入力ダイ
オード29は、電圧帰還量制限抵抗30と直列に接続さ
れることにより、マスターと同様に出力電圧帰還用フォ
トカプラの出力トランジスタ13の出力電流がスイッチ
ング安定化制御回路11へ供給されることにより、スイ
ッチング安定化制御回路11は出力端子1617へ直流
を供給する。スレーブ安定化電源9についても、前述の
スレーブ安定化電源8と同様の働きをする。The cathode of this Shan L-regulator 28 is connected to the voltage feedback amount limiting resistor 30 of the slave stabilized power supply 8 through the output voltage control line 22, and is the input of the output voltage feedback photocoupler on the slave side as well as the master side. By connecting the diode 29 in series with the voltage feedback amount limiting resistor 30, the output current of the output transistor 13 of the output voltage feedback photocoupler is supplied to the switching stabilization control circuit 11 in the same way as the master. The switching stabilization control circuit 11 supplies direct current to the output terminal 1617. The slave stabilized power supply 9 also functions in the same manner as the slave stabilized power supply 8 described above.
以上説明したように本発明は、マスター安定化電源の電
圧制御用シャントレギュレータをスレーブ安定化電源の
電圧制御用と共用することにより、並列にした複数の安
定化電源の出力電圧の誤差かなくなり、出力電圧の高い
安定化電源の方から電流が先に流れるなどという偏りが
なく、各々がバランスして電流を供給することができる
ので、熱的分布か平均化されることと垂下状態で運転さ
れることがないため入力電圧のリップルは出力に現われ
ないという効果がある。As explained above, the present invention eliminates errors in the output voltages of a plurality of parallel regulated power supplies by sharing the voltage control shunt regulator of the master regulated power supply with the voltage control of the slave regulated power supplies. There is no bias such as current flowing first from the stabilized power supply with a higher output voltage, and each can supply current in a balanced manner, so the thermal distribution is averaged and the power supply is not operated in a drooping state. This has the effect that input voltage ripple does not appear on the output.
第 1 図
面の簡単な説明
第1図は本発明の一実施例の構成を示す回路図、第2図
は従来の技術による電源回路の一例を示す回路図。1. Brief Description of the Drawings FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is a circuit diagram showing an example of a power supply circuit according to the prior art.
Claims (1)
する複数の安定化電源の正負の出力端子の同極同士を接
続して並列運転する電源回路において、マスターの安定
化電源の正側出力端子に出力電圧帰還用の第1のフォト
カプラのアノードと電圧設定用第1の抵抗の一端とが接
続され、前記帰還用フォトカプラのカソードに電圧帰還
量制御用抵抗の一端が接続され、前記電圧帰還量制御用
抵抗の他端に電圧安定化用シャントレギュレータのカソ
ードと複数のスレーブの安定化電源の電圧帰還量制御用
抵抗の一端が接続され、シャントレギュレータのアノー
ドはマスターの安定化電源の負側出力端子と電圧設定用
第2の抵抗の一端に接続され、前記電圧設定用第2の抵
抗の他端は前記シャントレギュレータのリフアレンス端
子と前記電圧設定用第1の抵抗の他端に接続され、前記
第1のフォトカプラの出力トランジスタのコレクタおよ
びエミッタはスイッチング安定化制御回路に接続され、
前記複数のスレーブ側安定化電源の電圧帰還量制御用抵
抗の他端は、スレーブ側安定化電源帰還用の第2のフォ
トカプラのカソードに接続され、前記第2のフォトカプ
ラのアノードは各々のスレーブ側安定化電源の正側出力
端子に接続され、前記第2のフォトカプラの出力側トラ
ンジスタのコレクタおよびエミッタは、各々スレーブ側
安定化電源のスイッチング安定化制御回路に接続され、
マスターまたはスレーブのスイッチング安定化制御回路
は、交流または直流と前記第一または第二のフォトカプ
ラの出力信号とを入力し、安定化直流を出力して成るこ
とを特徴とする電源回路。In a power supply circuit that operates in parallel by connecting the same polarity of the positive and negative output terminals of multiple stabilized power supplies that input AC or DC and generate the required stabilized DC output, the positive output of the master stabilized power supply The anode of a first photocoupler for output voltage feedback and one end of a first voltage setting resistor are connected to the terminal, one end of a voltage feedback amount control resistor is connected to the cathode of the feedback photocoupler, and the The cathode of the voltage stabilization shunt regulator and one end of the voltage feedback control resistor of the stabilized power supplies of multiple slaves are connected to the other end of the voltage feedback control resistor, and the anode of the shunt regulator is connected to the master stabilized power supply. The negative output terminal is connected to one end of the second voltage setting resistor, and the other end of the second voltage setting resistor is connected to the reference terminal of the shunt regulator and the other end of the first voltage setting resistor. the collector and emitter of the output transistor of the first photocoupler are connected to a switching stabilization control circuit;
The other ends of the voltage feedback amount control resistors of the plurality of slave-side stabilized power supplies are connected to the cathodes of second photocouplers for slave-side stabilized power supply feedback, and the anodes of the second photocouplers are connected to each other. connected to the positive side output terminal of the slave side regulated power supply, and the collector and emitter of the output side transistor of the second photocoupler are respectively connected to the switching stabilization control circuit of the slave side regulated power supply,
A power supply circuit characterized in that a master or slave switching stabilization control circuit inputs an alternating current or a direct current and an output signal of the first or second photocoupler, and outputs a stabilized direct current.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63237738A JP2856403B2 (en) | 1988-09-21 | 1988-09-21 | Power circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63237738A JP2856403B2 (en) | 1988-09-21 | 1988-09-21 | Power circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0287932A true JPH0287932A (en) | 1990-03-28 |
JP2856403B2 JP2856403B2 (en) | 1999-02-10 |
Family
ID=17019742
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63237738A Expired - Fee Related JP2856403B2 (en) | 1988-09-21 | 1988-09-21 | Power circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2856403B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0467724A (en) * | 1990-07-06 | 1992-03-03 | Nagano Japan Radio Co | Power supply interrupter |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5323299U (en) * | 1976-08-05 | 1978-02-27 | ||
JPS59120866A (en) * | 1982-12-27 | 1984-07-12 | Matsushita Electric Ind Co Ltd | Power factor measuring apparatus |
JPS6062839A (en) * | 1983-09-13 | 1985-04-11 | Hitachi Metals Ltd | Rotor and manufacture thereof |
JPS60245427A (en) * | 1984-05-18 | 1985-12-05 | 株式会社ユアサコーポレーション | Equilibrium operating system of power source unit |
JPS61293168A (en) * | 1985-05-17 | 1986-12-23 | Fujitsu Ltd | Current balancing circuit at converter parallel operation time |
JPS62185490U (en) * | 1986-05-12 | 1987-11-25 |
-
1988
- 1988-09-21 JP JP63237738A patent/JP2856403B2/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5323299U (en) * | 1976-08-05 | 1978-02-27 | ||
JPS59120866A (en) * | 1982-12-27 | 1984-07-12 | Matsushita Electric Ind Co Ltd | Power factor measuring apparatus |
JPS6062839A (en) * | 1983-09-13 | 1985-04-11 | Hitachi Metals Ltd | Rotor and manufacture thereof |
JPS60245427A (en) * | 1984-05-18 | 1985-12-05 | 株式会社ユアサコーポレーション | Equilibrium operating system of power source unit |
JPS61293168A (en) * | 1985-05-17 | 1986-12-23 | Fujitsu Ltd | Current balancing circuit at converter parallel operation time |
JPS62185490U (en) * | 1986-05-12 | 1987-11-25 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0467724A (en) * | 1990-07-06 | 1992-03-03 | Nagano Japan Radio Co | Power supply interrupter |
Also Published As
Publication number | Publication date |
---|---|
JP2856403B2 (en) | 1999-02-10 |
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Legal Events
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LAPS | Cancellation because of no payment of annual fees |