JPH0279603A - Oscillation circuit - Google Patents

Oscillation circuit

Info

Publication number
JPH0279603A
JPH0279603A JP23204288A JP23204288A JPH0279603A JP H0279603 A JPH0279603 A JP H0279603A JP 23204288 A JP23204288 A JP 23204288A JP 23204288 A JP23204288 A JP 23204288A JP H0279603 A JPH0279603 A JP H0279603A
Authority
JP
Japan
Prior art keywords
transistor
phase
voltage
setting circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23204288A
Other languages
Japanese (ja)
Inventor
Akira Sawamura
陽 沢村
Toshihiro Tako
田古 敏宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP23204288A priority Critical patent/JPH0279603A/en
Publication of JPH0279603A publication Critical patent/JPH0279603A/en
Pending legal-status Critical Current

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  • Oscillators With Electromechanical Resonators (AREA)

Abstract

PURPOSE:To prevent the making of a circuit into an IC from being disturbed by a phase setting circuit by providing a transistor in which a resistor when being energized changes, corresponding to a voltage value applied on the phase setting circuit is set as a phase deciding element. CONSTITUTION:The title circuit is constituted in such a way that the transistor consisting of an N-channel MOS transistor is connected between the one end of a capacitor 8 and reference potential (ground) as a capacitor means in the phase setting circuit and a DC voltage V is applied on the gate of the transistor 9. The transistor 9 is energized by applying the DC voltage V, and also, since the resistance value of the transistor when being energized changes corresponding to the value of the DC voltage, an oscillation frequency can be controlled by controlling a phase by the DC voltage V. In such a way, since no capacitor for DC cut is required in the phase setting circuit, the occupant area of the phase setting circuit can be reduced, which results in the easy miniaturization of an IC chip.

Description

【発明の詳細な説明】 恵呈上m肛分■ 本発明は発振回路に関するものであり、より特定的には
トランジスタの出力を水晶振動子を介して入力側に正帰
還する形式の発振回路に関する。
[Detailed Description of the Invention] The present invention relates to an oscillation circuit, and more particularly to an oscillation circuit in which the output of a transistor is positively fed back to the input side via a crystal resonator. .

l米■及歪 このような発振回路として第3図に示すようなものがあ
る。該発振回路はトランジスタで形成された増幅器(1
)の出力を水晶振動子(2)を介して、その増幅器(1
)の入力側へ正帰還することにより発振動作を実現する
。尚、MOS−ICの場合、増幅器(1)は単にインバ
ータとして構成される。ここで、入力に対し正帰還信号
の位相がOのときは水晶振動子固有の周波数f、で発振
を行うが、位相がプラス又はマイナスにずれると、発振
周波数もそれに応じてr、からシフトする。このような
正帰還信号のための位相設定回路は第3図の場合、出力
側のコンデンサ(3)と入力側に設けた可変容量ダイオ
ード(4)等より構成される。尚、(5)は直流カット
用のコンデンサであり、0.1μF程度の大きな値をも
つ。
Figure 3 shows an example of such an oscillation circuit. The oscillation circuit includes an amplifier (1
) is passed through the crystal oscillator (2) to its amplifier (1
) to achieve oscillation operation by positive feedback to the input side. Note that in the case of a MOS-IC, the amplifier (1) is simply configured as an inverter. Here, when the phase of the positive feedback signal with respect to the input is O, it oscillates at the frequency f, which is unique to the crystal oscillator, but if the phase shifts to plus or minus, the oscillation frequency shifts from r accordingly. . In the case of FIG. 3, the phase setting circuit for such a positive feedback signal is composed of a capacitor (3) on the output side, a variable capacitance diode (4) provided on the input side, and the like. Note that (5) is a capacitor for cutting direct current, and has a large value of about 0.1 μF.

(6)は抵抗であり、(7)は出力端子である。上記発
振回路では可変容量ダイオード(4)に印加する電圧(
V)によって可変容量ダイオード(4)の容量値が変化
し、それによって位相の微調整が行われるようになって
いる。
(6) is a resistor, and (7) is an output terminal. In the above oscillation circuit, the voltage (
V) changes the capacitance value of the variable capacitance diode (4), thereby finely adjusting the phase.

(°シよ1と る1 しかしながら、第3図の回路はC−MOSの■ ′C基
板に形成しようとすると、可変容量ダイオードの形成自
体がC−MOS基板には不向きであることから、IC化
が非常に困難であるという欠点を有している。また、バ
イポーラIC基板に形成する場合であっても、第3図の
回路は直流カット用コンデンサ(5)を必要とし、しか
も直流カット用コンデンサは一般に容量値が大きいので
大面積を要しICチップの小型化に対し不利な条件とな
る。
However, if the circuit shown in Figure 3 is to be formed on a C-MOS substrate, the formation of a variable capacitance diode itself is not suitable for a C-MOS substrate, so Furthermore, even when formed on a bipolar IC board, the circuit shown in Figure 3 requires a DC cut capacitor (5); Since capacitors generally have a large capacitance value, they require a large area, which is a disadvantage to miniaturization of IC chips.

本発明はこのような点に鑑みなされたものであって位相
設定回路がIC化に妨げとならないようにした発振回路
を提供することを目的とする。
The present invention has been made in view of these points, and it is an object of the present invention to provide an oscillation circuit in which the phase setting circuit does not hinder integration into an IC.

i を”ンするための 上記の目的を達成するため本発明では、増幅器又はイン
バータと、該増幅器又はインバータの出力を入力側に正
帰還するように前記増幅器又はインバータの入出力端子
間に接続された水晶振動子と、前記正帰還信号の位相を
決める位相設定回路とからなる発振回路において、前記
位相設定回路に印加電圧値に応じて変化する導通時抵抗
を位相決定要素とするトランジスタを設けた構成として
いる。
In order to achieve the above-mentioned object of increasing the number of input signals, the present invention provides an amplifier or an inverter connected between the input and output terminals of the amplifier or inverter so as to provide positive feedback of the output of the amplifier or inverter to the input side. In the oscillation circuit, the oscillation circuit includes a crystal resonator and a phase setting circuit that determines the phase of the positive feedback signal, and the phase setting circuit is provided with a transistor whose phase determining element is a resistance when conductive that changes depending on an applied voltage value. It is structured as follows.

作−■ このような構成によると、位相決定要素としてのトラン
ジスタのゲートに直流電圧を印加すると、該トランジス
タが導通し、その導通時の抵抗により位相設定回路の抵
抗値を形成することになる。
According to this configuration, when a DC voltage is applied to the gate of the transistor as a phase determining element, the transistor becomes conductive, and the resistance value of the phase setting circuit is determined by the resistance when the transistor is conductive.

しかも、この抵抗値は前記ゲートに与えられる直流電圧
に応じて変化するので、位相を直流電圧によって制御し
、それによって発振周波数をコントロールすることがで
きる。
Furthermore, since this resistance value changes depending on the DC voltage applied to the gate, the phase can be controlled by the DC voltage, thereby controlling the oscillation frequency.

尖JLJI 以下、本発明の実施例について説明する。Tsubasa JLJI Examples of the present invention will be described below.

本発明を実施した第1図において第3図の従来例と同一
部分には同一の符号を付して重複説明を省略する。本実
施例では位相設定回路における容量手段としてのコンデ
ンサ(8)の一端と基準電位点(この場合、接地点)と
の間にNチャンネルのMOSトランジスタで構成したト
ランジスタ(9)を接続し、このトランジスタ(9)の
ゲートに直流電圧(v)を印加するようになっている。
In FIG. 1, in which the present invention is implemented, the same parts as those in the conventional example shown in FIG. In this embodiment, a transistor (9) composed of an N-channel MOS transistor is connected between one end of a capacitor (8) serving as a capacitance means in a phase setting circuit and a reference potential point (in this case, a ground point). A DC voltage (v) is applied to the gate of the transistor (9).

そして、前記直流電圧(V)の印加によってトランジス
タ(9)はオンすると共に該直流電圧(v)の値に応じ
て、その導通時の抵抗値を変える。この直流電圧はコン
ト。−ル信号発生回路から与えられるコントロール電圧
であってもよく、ICに外付けされる操作手段の操作に
より可変する調整電圧であってもよい。
The transistor (9) is turned on by the application of the DC voltage (V), and its resistance value at the time of conduction is changed depending on the value of the DC voltage (V). This DC voltage is controlled. It may be a control voltage given from a signal generating circuit, or it may be an adjustment voltage that is varied by operating an operating means externally attached to the IC.

コンデンサ(8)は直流カット用ではなく、容量手段と
して機能するものであって、その容量値は出力側のコン
デンサ(3)と同程度の小さな値(例えば数109F程
度)に選ばれる。
The capacitor (8) is not used to cut direct current, but functions as a capacitance means, and its capacitance value is selected to be as small as that of the output side capacitor (3) (for example, about several 109 F).

第2図は、この第1図の回路についての具体的な実施例
をグラフにして表わしたものであって、ここでは水晶振
動子(2)の固有周波数を16MHz、コンデンサ(3
)(8)の値をいずれも47 p F +抵抗(6)を
5.IMΩとした場合に、トランジスタ(9)のゲート
に加える直流電圧(横軸)と発振周波数(縦軸)との関
係を示している。この特性は直流電圧(V)を変えてト
ランジスタ(9)の導通時抵抗を制御することにより正
帰還信号の位相が変化し、それに伴って周波数が変わる
ことによる。
FIG. 2 is a graph showing a specific example of the circuit shown in FIG.
) (8) are both 47 p F + resistance (6) as 5. It shows the relationship between the DC voltage (horizontal axis) applied to the gate of the transistor (9) and the oscillation frequency (vertical axis) when IMΩ is assumed. This characteristic is due to the fact that the phase of the positive feedback signal changes by changing the DC voltage (V) and controlling the resistance when the transistor (9) is turned on, and the frequency changes accordingly.

本実施例では、トランジスタ(9)をNチャンネルのM
OSトランジスタで構成したが、これをPチャンネルの
MOS)ランジスタで構成してもよく、そのようにした
場合にはトランジスタ(9)の一端を第1図のような接
地点でなく、電源ラインに接続するものとする。いずれ
にしても、MO3I−ランジスタで構成する場合にはM
OSのIC基板に形成する。また、トランジスタ(9)
をバイポーラで構成する場合にはバイポーラのIC基板
に形成するとよい。
In this embodiment, the transistor (9) is an N-channel M
Although it is configured with an OS transistor, it may also be configured with a P-channel MOS transistor. In that case, one end of the transistor (9) should be connected to the power line instead of the ground point as shown in Figure 1. shall be connected. In any case, when composed of MO3I-transistors, M
Formed on the OS IC board. Also, transistor (9)
In the case of bipolar configuration, it is preferable to form it on a bipolar IC substrate.

光凱p四果 本発明によれば、位相設定回路に直流カット用コンデン
サを必要としないので、IC化した場合、位相設定回路
の専有面積が小さくなりICチップの小型化に有利とな
る。そして、発振回路をMOSのIC基板に形成する場
合には前記位相決定要素となるトランジスタもMO3I
−ランジスタとしてMOS・IC基板に容易に作成する
ことができ、またバイポーラのIC基板に形成する場合
には位相決定要素用トランジスタをバイポーラトランジ
スタで作成すれば同じように容易に作成できるので、I
C化に好都合である。
According to the present invention, the phase setting circuit does not require a DC cutting capacitor, so when integrated into an IC, the area occupied by the phase setting circuit is reduced, which is advantageous for downsizing the IC chip. When the oscillation circuit is formed on a MOS IC substrate, the transistors serving as the phase determining elements are also MO3I
- It can be easily fabricated as a transistor on a MOS/IC substrate, and if it is formed on a bipolar IC substrate, it can be similarly fabricated by fabricating the phase determining element transistor with a bipolar transistor.
It is convenient for C conversion.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明を実施した発振回路の回路図であり、第
2図はその特性を示す図である。第3図は従来例の回路
図である。 (1)・−・増幅器、 (2)−水晶振動子。 (9)−・トランジスタ。
FIG. 1 is a circuit diagram of an oscillation circuit embodying the present invention, and FIG. 2 is a diagram showing its characteristics. FIG. 3 is a circuit diagram of a conventional example. (1)--Amplifier, (2)--Crystal oscillator. (9)--Transistor.

Claims (1)

【特許請求の範囲】[Claims] (1)増幅器又はインバータと、該増幅器又はインバー
タの出力を入力側に正帰還するように前記増幅器又はイ
ンバータの入出力端子間に接続された水晶振動子と、前
記正帰還信号の位相を決める位相設定回路とからなる発
振回路において、前記位相設定回路に印加電圧値に応じ
て変化する導通時抵抗を位相決定要素とするトランジス
タを設けたことを特徴とする発振回路。
(1) An amplifier or inverter, a crystal oscillator connected between the input and output terminals of the amplifier or inverter so as to provide positive feedback of the output of the amplifier or inverter to the input side, and a phase that determines the phase of the positive feedback signal. 1. An oscillation circuit comprising a setting circuit, wherein the phase setting circuit is provided with a transistor whose phase determining element is a resistance when turned on that changes depending on an applied voltage value.
JP23204288A 1988-09-16 1988-09-16 Oscillation circuit Pending JPH0279603A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23204288A JPH0279603A (en) 1988-09-16 1988-09-16 Oscillation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23204288A JPH0279603A (en) 1988-09-16 1988-09-16 Oscillation circuit

Publications (1)

Publication Number Publication Date
JPH0279603A true JPH0279603A (en) 1990-03-20

Family

ID=16933053

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23204288A Pending JPH0279603A (en) 1988-09-16 1988-09-16 Oscillation circuit

Country Status (1)

Country Link
JP (1) JPH0279603A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5801596A (en) * 1994-07-27 1998-09-01 Citizen Watch Co., Ltd. Temperature compensation type quartz oscillator
US6215370B1 (en) * 1997-01-16 2001-04-10 Nippon Precision Circuits Inc. Crystal oscillator circuit with crystal reducing resistance and integrated circuit therefor
US9705195B2 (en) 2014-06-17 2017-07-11 Kabushiki Kaisha Toshiba Antenna device and wireless device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5801596A (en) * 1994-07-27 1998-09-01 Citizen Watch Co., Ltd. Temperature compensation type quartz oscillator
US6215370B1 (en) * 1997-01-16 2001-04-10 Nippon Precision Circuits Inc. Crystal oscillator circuit with crystal reducing resistance and integrated circuit therefor
US9705195B2 (en) 2014-06-17 2017-07-11 Kabushiki Kaisha Toshiba Antenna device and wireless device

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