JPH0277116A - Manufacture of silicon crystal thin film - Google Patents
Manufacture of silicon crystal thin filmInfo
- Publication number
- JPH0277116A JPH0277116A JP5724289A JP5724289A JPH0277116A JP H0277116 A JPH0277116 A JP H0277116A JP 5724289 A JP5724289 A JP 5724289A JP 5724289 A JP5724289 A JP 5724289A JP H0277116 A JPH0277116 A JP H0277116A
- Authority
- JP
- Japan
- Prior art keywords
- gas
- silicon
- thin film
- film
- crystal thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 55
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 52
- 239000010703 silicon Substances 0.000 title claims abstract description 51
- 239000010409 thin film Substances 0.000 title claims abstract description 49
- 239000013078 crystal Substances 0.000 title claims abstract description 47
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 239000010408 film Substances 0.000 claims abstract description 25
- 238000005530 etching Methods 0.000 claims abstract description 16
- 229910052731 fluorine Inorganic materials 0.000 claims abstract description 14
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims abstract description 13
- 239000011737 fluorine Substances 0.000 claims abstract description 13
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims abstract description 7
- 238000006243 chemical reaction Methods 0.000 claims abstract description 4
- 239000007789 gas Substances 0.000 claims description 46
- 238000000034 method Methods 0.000 claims description 21
- 239000002994 raw material Substances 0.000 claims description 6
- 238000005268 plasma chemical vapour deposition Methods 0.000 claims description 4
- 229910052990 silicon hydride Inorganic materials 0.000 claims description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims 2
- 229910052757 nitrogen Inorganic materials 0.000 claims 1
- 125000001153 fluoro group Chemical group F* 0.000 abstract description 3
- 229910000077 silane Inorganic materials 0.000 abstract description 3
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 abstract description 2
- 230000007704 transition Effects 0.000 abstract description 2
- 239000012495 reaction gas Substances 0.000 description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 12
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 8
- 238000001069 Raman spectroscopy Methods 0.000 description 7
- 229910052739 hydrogen Inorganic materials 0.000 description 7
- 239000001257 hydrogen Substances 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 229910021419 crystalline silicon Inorganic materials 0.000 description 3
- 239000011261 inert gas Substances 0.000 description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 3
- 125000004429 atom Chemical group 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000000354 decomposition reaction Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 230000015654 memory Effects 0.000 description 2
- 230000000737 periodic effect Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000011856 silicon-based particle Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 230000005355 Hall effect Effects 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007865 diluting Methods 0.000 description 1
- 239000003085 diluting agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002003 electron diffraction Methods 0.000 description 1
- 239000000446 fuel Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 238000002128 reflection high energy electron diffraction Methods 0.000 description 1
- 238000010581 sealed tube method Methods 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明はシリコン結晶薄膜の製造方法に関し、特にエツ
チング性ガスとして弗素ガスを使用するシリコン結晶１
１ｉ膜の製造方法に関する。Detailed Description of the Invention (Industrial Application Field) The present invention relates to a method for manufacturing a silicon crystal thin film, and in particular to a method for manufacturing a silicon crystal thin film using fluorine gas as an etching gas.
The present invention relates to a method for manufacturing a 1i film.
（従来の技術）
従来、バイポーラトランジスタ、バイポーラＩＣ，ＭＯ
５ＳＬＳ ｌメモリー等の半導体の製造におけるエピタ
キシャル成長方法としてＣＶＤ法が一般的である。この
ＣＶＤ法によれば、例えば「最新ＬＳＩプロセス技術」
（前田和夫著、工業調査会、１８９〜２０９頁、１９
８３年）に記載されているように、比較的低温でシリコ
ンのエピタキシ中ル成長が可能な５ｉ−１！系を用いた
封管法の場合でも、結晶の成長温度は９００″Ｃ以上で
ある。又、近年結晶の成長温度を下げるために、原料に
Ｓｉ！Ｈ，等の低温で分解する材料を使用する傾向があ
るが、この場合でも成長温度を８００°Ｃ以下とするこ
とは難しく、ＣＶＤ法によりシリコン薄膜を基板上に形
成する場合には、シリコン原子を含有した原料等の反応
ガスや基板温度を８００〜１２００ ’Ｃに設定、保持
する必要があった。(Prior art) Conventionally, bipolar transistor, bipolar IC, MO
CVD is a common epitaxial growth method for manufacturing semiconductors such as 5SLS1 memories. According to this CVD method, for example, "the latest LSI process technology"
(Written by Kazuo Maeda, Kogyo Kenkyukai, pp. 189-209, 19
As described in 1983), 5i-1! enables epitaxial growth of silicon at relatively low temperatures. Even in the case of the sealed tube method using the system, the crystal growth temperature is over 900''C.In recent years, in order to lower the crystal growth temperature, materials that decompose at low temperatures such as Si!H, etc. have been used as raw materials. However, even in this case, it is difficult to keep the growth temperature below 800°C, and when forming a silicon thin film on a substrate by the CVD method, the reaction gas such as the raw material containing silicon atoms and the substrate temperature It was necessary to set and maintain the temperature between 800 and 1200'C.
又、特開昭６１−６５４２１号公報においてはプラズマ
化学気相堆積装置が提案されており、この装置によれば
、通常、基板の温度として５００゛Ｃ程度でシリコン薄
膜が形成し得る旨記載されている。しかしながら、この
公報に開示された発明は基板加熱器の消費電力の低減化
を趣旨とするものであり、シリコンのエピタキシャル成
長の可能性についての示唆は全くない。Furthermore, Japanese Patent Application Laid-Open No. 61-65421 proposes a plasma chemical vapor deposition apparatus, and it is stated that this apparatus can normally form a silicon thin film at a substrate temperature of about 500°C. ing. However, the invention disclosed in this publication is aimed at reducing the power consumption of the substrate heater, and there is no suggestion at all about the possibility of epitaxial growth of silicon.
このような中で最近、容量結合型ＲＦプラズマＣＶＤ装
置を用い、５ｔＨ４と５ｉＨｔＦｚの混合系のグロー放
電分解を行って、約２５０°Ｃ程度の低温で（１００）
Ｓｉ単単結晶板板上表面状態の良好なＳｉ単結晶を成長
させることができることが見い出された（ジャパニーズ
・ジャーナル・オブ・アプライド・フィジックス、２６
巻、Ｌ９５１ −Ｌ９５３ （１９８７））。Under these circumstances, we have recently performed glow discharge decomposition of a mixed system of 5tH4 and 5iHtFz using a capacitively coupled RF plasma CVD device, and have developed a method for decomposing (100) at a low temperature of approximately 250°C.
It has been discovered that it is possible to grow Si single crystals with good surface conditions on Si single crystal plates (Japanese Journal of Applied Physics, 26).
Volumes, L951-L953 (1987)).
本発明者等は、かかる優れた方法を更に発展させるべく
検討する中で、５ｉＨｚＦｚガスはシリコン結晶の成膜
原料であると同時にエツチング性を有するために、高品
質なエピタキシャル成長膜を得るための反応ガスの制御
を難しくしており、結晶の品質の良い薄膜を製造するこ
とが困難である事を見い出すと共に、従来ａ−３ｉ：Ｈ
の成膜に使用していたＳ ｉ Ｈ４とＳ ｉ Ｆ ａの
混合系を大量の水素で希釈することにより、極めて良好
な結果を得ることができることを見い出し、先に特許比
１ｊＪｌを行った。While considering further development of this excellent method, the present inventors discovered that 5iHzFz gas is a raw material for silicon crystal film formation, and at the same time has etching properties. It was discovered that it was difficult to control the gas, making it difficult to produce thin films with good crystal quality.
It was discovered that very good results could be obtained by diluting the mixed system of S i H4 and S i Fa used for film formation with a large amount of hydrogen, and the patent ratio 1jJl was first performed.
一方、多結晶シリコンについては、最近の研究によって
、熱ＣＶＬ）法によって作製した多結晶シリコンは、作
製時の温度が高いためにシリコン粒子間の隙間が多く互
いに密着していない事に加え、結晶粒界のダングリング
ボンドが電気的特性を劣化させることが判明し、斯る不
都合を是正するために結晶粒界を水素でパッシベーショ
ンさせる必要がある事も知られるに至った。On the other hand, with regard to polycrystalline silicon, recent research has shown that polycrystalline silicon produced by the thermal CVL method has many gaps between silicon particles due to the high temperature during production, and the crystals do not adhere to each other. It has been found that dangling bonds at grain boundaries deteriorate electrical characteristics, and it has also come to be known that grain boundaries must be passivated with hydrogen to correct this disadvantage.
このため、最近低温で多結晶シリコン薄膜を製造するこ
とのできるプラズマＣＶＤ法が注目されている（特開昭
６３−１５７８７２号、同６３−１７５４１７号参照）
。これらの方法においては得られた多結晶シリコンは熱
ＣＶＤ法による場合よりシリコン粒子間に水素を含有し
、−度作製した多結晶シリコンを後からパッシベーショ
ンする必要はないという長所を有するが、上記方法によ
り得られた多結晶シリコン薄膜は約２．５原子％以上の
水素を含有し、多結晶シリコン薄膜の性能面で更に改善
の余地があった。For this reason, the plasma CVD method, which can produce polycrystalline silicon thin films at low temperatures, has recently attracted attention (see JP-A-63-157872 and JP-A-63-175417).
. These methods have the advantage that the polycrystalline silicon obtained contains hydrogen between silicon particles compared to the thermal CVD method, and there is no need to passivate the polycrystalline silicon that has been produced afterward. The polycrystalline silicon thin film obtained contained hydrogen in an amount of about 2.5 atomic % or more, and there was room for further improvement in terms of the performance of the polycrystalline silicon thin film.
（発明が解決しようとする課題）
本発明者は、かかる欠点を解決すべく鋭意検討した結果
、エツチング性ガスとして弗素ガスを使用した場合には
、シリコン結晶薄膜を成長させるためのプラズマ化に際
し、成膜性ガス源である５ｉＨｎにのみ高周波電力等の
プラズマ条件を合わせることができ、これによって、シ
リコン哨結晶基板を用いた場合に得られるエピタキシャ
ル薄膜の性能を更に改善するができること及び、シリコ
ン単結晶基板以外の基板を使用した場合には、従来以上
に高品質な多結晶シリコン薄膜を得ることができること
を見いだし本発明に到達した。(Problems to be Solved by the Invention) As a result of intensive studies to solve these drawbacks, the inventor of the present invention found that when fluorine gas is used as an etching gas, during plasma generation for growing a silicon crystal thin film, Plasma conditions such as high-frequency power can be matched only to 5iHn, which is the film-forming gas source, and this can further improve the performance of epitaxial thin films obtained when using silicon sentry crystal substrates. The inventors have discovered that when a substrate other than a crystalline substrate is used, a polycrystalline silicon thin film of higher quality than before can be obtained, and the present invention has been achieved.
従って本発明の第１の目的は、基板温度が７００°Ｃ以
下の低温でシリコン単結晶基板上にエピタキシャル成長
を行わしめ、高品質のシリコン車結晶膜を得るための方
法を提供することにある。Therefore, a first object of the present invention is to provide a method for epitaxially growing on a silicon single crystal substrate at a low substrate temperature of 700° C. or lower to obtain a high quality silicon wheel crystal film.
本発明の第２の目的は、基板温度が７００ ’Ｃ以下の
低温で、シリコン単結晶以外の基板上に、高品質な多結
晶シリコン薄膜を形成せしめる方法を提供することにあ
る。A second object of the present invention is to provide a method for forming a high-quality polycrystalline silicon thin film on a substrate other than silicon single crystal at a low substrate temperature of 700'C or less.
（課題を解決するための手段）
本発明の上記の諸口的は、プラズマＣＶＤ法により、シ
リコン原子を有する原料を含有した反応ガスをプラズマ
化し、加熱基板上にシリコン結晶薄膜を成長せしめる方
法において、該反応ガスが少なくとも成膜性ガスとして
の水素化珪素及び不活性ガスで希釈されたエツチング性
ガスとしての弗素ガスから成る混合ガスであり、前記エ
ツチング性ガスの量が成膜性ガスの量の約０．１〜５０
倍となるように反応室内に前記反応ガスを供給してプラ
ズマを発生せしめ、約ｌＯＯ〜７００ ”Ｃの間の一定
温度に維持した基板上にシリコン結晶薄膜を形成せしめ
ることを特徴とするシリコン結晶薄膜の製造方法によっ
て達成された。(Means for Solving the Problems) The above-mentioned aspects of the present invention provide a method for growing a silicon crystal thin film on a heated substrate by converting a reactive gas containing a raw material having silicon atoms into plasma using a plasma CVD method. The reaction gas is a mixed gas consisting of at least silicon hydride as a film-forming gas and fluorine gas as an etching gas diluted with an inert gas, and the amount of the etching gas is less than the amount of the film-forming gas. Approximately 0.1-50
A silicon crystal thin film is formed on a substrate maintained at a constant temperature between about 100 and 700''C by supplying the reaction gas into a reaction chamber so as to generate plasma. This was achieved by a thin film manufacturing method.
以下に本発明を更に詳細に説明する。The present invention will be explained in more detail below.
本発明において使用する、成膜性ガスとしての水素化珪
素はシリコン薄膜を形成せしめるための原料ガスであり
、具体的にはＳｉ、Ｈ，い、ｚ（ｎ”’１〜４）で表さ
れる。本発明においては、これらの内特にシラン又はジ
シランが好ましい。Silicon hydride used as a film-forming gas in the present invention is a raw material gas for forming a silicon thin film, and is specifically represented by Si, H, i, z (n''1 to 4). In the present invention, silane or disilane is particularly preferred among these.
一方、本発明で使用する弗素ガスは強いエツチング性の
ガスであり、エツチングによって基板表面を常に清浄に
保つと共に、シリコン結晶を形成せしめるに際しプラズ
マ条件を成膜性ガスに対する最適条件とするという点に
本発明の最大の特徴がある。即ち、プラズマ中の弗素原
子は■成長膜中の不純物の除去、■成長膜中の水素除去
、■気相中のシランの重合防止の機能を有すると考えら
れる。このような弗素原子の機能を利用して、成膜とエ
ツチングをバランスさせながらシリコンのエピタキシャ
ル成長をさせるために、本発明においては上記弗素ガス
を前記成膜性ガスの約０． １〜５０倍、好ましくは０
．５〜３０倍とする。又、希釈ガスとして水素ガスを使
用することができる。On the other hand, the fluorine gas used in the present invention is a strong etching gas, and the etching process keeps the substrate surface clean at all times, and the plasma conditions are optimal for the film-forming gas when forming silicon crystals. This is the most important feature of the present invention. That is, fluorine atoms in the plasma are considered to have the functions of (1) removing impurities in the grown film, (2) removing hydrogen from the grown film, and (2) preventing polymerization of silane in the gas phase. In order to perform epitaxial growth of silicon while balancing film formation and etching by utilizing such functions of fluorine atoms, in the present invention, the fluorine gas is used at a concentration of about 0.0% of the film forming gas. 1 to 50 times, preferably 0
．． 5 to 30 times. Additionally, hydrogen gas can be used as the diluent gas.
この場合、使用する水素ガスの量は成膜性ガスの約５０
０倍（容量比）以下、特に３００倍以下とすることが好
ましい。水素ガスを成膜性ガスの５００倍以上とした場
合には、シリコン原子の濃度が低くなり過ぎるのでシリ
コン結晶薄膜の成長速度が遅くなり過ぎる。In this case, the amount of hydrogen gas used is approximately 50% of the film forming gas.
It is preferably 0 times (capacity ratio) or less, particularly 300 times or less. If the amount of hydrogen gas is 500 times or more that of the film-forming gas, the concentration of silicon atoms becomes too low and the growth rate of the silicon crystal thin film becomes too slow.
又、弗素ガスは極めて活性に冨むので、装置の腐食を防
止する上から、弗素ガスをＨｅ、Ａｒ等の不活性ガスで
希釈して使用する。弗素ガスは成膜性ガスの約０． １
倍〜５０倍（容量比）とすることが好ましい。弗素ガス
が成膜性ガスの０． １倍以下であると、シリコン結晶
が成長し易いように基板表面を常に最良の状態に保つこ
とができない一方、５０倍以−Ｆとしては、エツチング
速度が大きくなりすぎてシリコン結晶薄膜の成長速度が
低下する。不活性ガスは、弗素ガスの１〜１５０００倍
、特に５〜１００倍使用することが好ましい。又、反応
ガス中にはドーパントとしてリンやホウ素など公知の物
質を添加することができ、使用するドーパントとして元
素周期律表第■族の化合物を選択するか、又は第Ｖ族の
化合物を選択するかに従って、Ｐ型又はＮ型のシリコン
結晶薄膜を得ることができる。Furthermore, since fluorine gas is extremely active, it is used after being diluted with an inert gas such as He or Ar in order to prevent corrosion of the equipment. Fluorine gas is about 0.0% of the film-forming gas. 1
It is preferable to increase the capacity by 50 times to 50 times (capacity ratio). Fluorine gas is a film-forming gas of 0. If it is less than 1x, the substrate surface cannot always be kept in the best condition to facilitate the growth of silicon crystals, while if it is more than 50x -F, the etching rate becomes too high and the growth rate of the silicon crystal thin film is reduced. decreases. It is preferable to use the inert gas in an amount of 1 to 15,000 times, particularly 5 to 100 times, the amount of fluorine gas. In addition, known substances such as phosphorus and boron can be added as dopants to the reaction gas, and as the dopant to be used, a compound from Group I of the Periodic Table of Elements or a compound from Group V of the Periodic Table of Elements is selected. Depending on the method, a P-type or N-type silicon crystal thin film can be obtained.
本発明においては、上記の条件を満たした約００ｌＴｏ
ｒ ｒｘｌ ５’ｒ’ｏ ｒ ｒの圧力の反応ガスを
、例えば電力密度約Ｏ６１〜５ Ｗ／ｃｄの高周波放電
によってプラズマ化し、約ｉ ｏ ｏ ’ｃ〜７００℃
の間の一定温度に維持した基板上にシリコン結晶薄膜を
形成せしめる。基板としてシリコン単結晶基板を使用し
た場合には、シリコン結晶薄膜はエピタキシャル成長し
、シリコン単結晶薄膜が得られる。一方、シリコン単結
晶以外の基板、例えばガラス、セラミック、金属等の単
結晶シリコン以外の基板を使用した場合にはシリコン単
結晶薄膜を得ることはできないものの、電子移動度が５
〜３０ｃｄ／ボルト・秒、且つ膜中の水素濃度が０．
１〜２．０原子％程度という極めて高品質の多結晶シリ
コン薄膜を得ることができる。In the present invention, about 00lTo which satisfies the above conditions is used.
The reaction gas at a pressure of r rxl 5'r'o r r is turned into plasma by, for example, a high frequency discharge with a power density of about 061 to 5 W/cd, and the reaction gas is turned into plasma at a pressure of about io o'c to 700°C.
A silicon crystal thin film is formed on a substrate maintained at a constant temperature between 1 and 2. When a silicon single crystal substrate is used as the substrate, a silicon crystal thin film is epitaxially grown to obtain a silicon single crystal thin film. On the other hand, if a substrate other than single crystal silicon is used, for example, a substrate other than single crystal silicon such as glass, ceramic, or metal, although it is not possible to obtain a silicon single crystal thin film, the electron mobility is
~30 cd/volt-second and the hydrogen concentration in the film is 0.
A polycrystalline silicon thin film of extremely high quality of about 1 to 2.0 atomic % can be obtained.
弗素ガスによるエツチングの速度はアモルファスシリコ
ンに対する方が、結晶シリコンに対する場合より大きい
から、基板上にアモルファスシリコンが堆積してもすぐ
に取り除かれ、結晶シリコンのみが堆積していくことに
なる。Since the rate of etching with fluorine gas is higher for amorphous silicon than for crystalline silicon, even if amorphous silicon is deposited on the substrate, it is immediately removed and only crystalline silicon is deposited.
上記の如く、シリコン単結晶薄膜又は高品質の多結晶シ
リコン薄膜を得るためには基板温度を約１００°Ｃ〜７
００℃の間に保つ必要があり、特に２００°Ｃ〜５００
°Ｃとすることが好ましい、１に板温度が１００℃より
低いと、シリコンの結晶成長速度が極端に遅くなるので
現実的でない。基板温度が７００℃より高くなると、得
られる結晶の品質が悪化する。As mentioned above, in order to obtain a silicon single crystal thin film or a high quality polycrystalline silicon thin film, the substrate temperature should be set at about 100°C to 7°C.
It is necessary to maintain the temperature between 00°C, especially between 200°C and 500°C.
1. If the plate temperature is lower than 100°C, the silicon crystal growth rate will be extremely slow, which is not practical. When the substrate temperature is higher than 700° C., the quality of the obtained crystal deteriorates.
又、プラズマを発生させるための電力密度及び反応ガス
の圧力は、基板に到着する原子やイオンの運動エネルギ
ーに影響し、従って形成されるシリコン結晶の品質にも
影響する。Furthermore, the power density and the pressure of the reactant gas for generating plasma affect the kinetic energy of atoms and ions arriving at the substrate, and therefore the quality of the silicon crystals formed.
電力密度が０．ＩＷ／ｃｄ以下では反応ガスの分解エネ
ルギーが不足するので生膜速度が遅く、５Ｗ ／ ｃ−
以上ではイオン性分子及び原子によるダメージが大きく
なりシリコン結晶薄膜の品質を高（維持することができ
ないので好ましくない。Power density is 0. Below IW/cd, the decomposition energy of the reaction gas is insufficient, so the biofilm speed is slow, and 5W/c-
This is not preferable because the damage caused by ionic molecules and atoms becomes large and the quality of the silicon crystal thin film cannot be maintained at a high level.
反応ガスの圧力が０．１Ｔｏｒｒ以下であるとシリコン
結晶成長速度が遅く、又１５Ｔｏ ｒ ｒ以上では放電
状態が安定しないので好ましくない。If the pressure of the reaction gas is less than 0.1 Torr, the silicon crystal growth rate will be slow, and if it is more than 15 Torr, the discharge state will not be stable, which is not preferable.
本発明の方法は、従来エピタキシャル成長が行われてい
たあらゆる分野、例えば、バイポーラトランジスタ、バ
イポーラＩＣ，、ＭＯＳ、ＬＳ Ｉ、メモリー等の半導
体素子を初め、太陽電池の製造等に応用することができ
る。The method of the present invention can be applied to all fields in which epitaxial growth has conventionally been performed, such as semiconductor devices such as bipolar transistors, bipolar ICs, MOSs, LSIs, and memories, as well as the production of solar cells.
（発明の効果）
本発明においては低温の基板上に低電力でシリコンのエ
ピタキシャル成長を行わせることができるので、基板中
に含有される不純物がシリコン結晶中へ拡散することを
押さえられ、従って実質的に遷移領域の無いシリコン単
結晶薄膜を得ることができる。又、製品あたりのエネル
ギーコストを下げることができるのみならず、基板の加
熱・冷却に費やす時間も大幅に短縮できるので、生産効
率が高くなり製品コストを下げることができる。(Effects of the Invention) In the present invention, silicon can be epitaxially grown on a low-temperature substrate with low power, so impurities contained in the substrate can be suppressed from diffusing into the silicon crystal, and therefore substantially A silicon single crystal thin film without a transition region can be obtained. Furthermore, not only can the energy cost per product be lowered, but also the time spent heating and cooling the substrate can be significantly shortened, so production efficiency can be increased and product costs can be lowered.
（実施例）
以下に本発明を実施例に従って更に詳述するが、本発明
はこれによって限定されるものではない。(Examples) The present invention will be described in more detail below according to Examples, but the present invention is not limited thereto.
実施例１゜
予め、ｌＸｌ０−”Ｔ’ｏｒｒの高真空にした反応室内
に、ＳｉＨ４：Ｆｚ ：ｌ（！ ：Ｈｅ−１：１０：
１００：８０の混合ガスを反応ガスとして１００３ＣＣ
Ｍで供給し反応ガスの圧力を２．０Ｔｏｒｒに調整した
。次いでこの反応ガスを１３゜５６ＭＨ２の高周波電源
を用いて、電力密度１゜３ＬＷ／ｃｔＡでプラズマ化し
、２００ ’Ｃに加熱されたシリコン単結晶基板上に２
μｍの厚さとなる迄シリコン結晶薄膜を形成させた。Example 1゜SiH4:Fz:l(!:He-1:10:
1003CC with 100:80 mixed gas as reaction gas
The pressure of the reaction gas was adjusted to 2.0 Torr. Next, this reaction gas was turned into plasma at a power density of 1°3LW/ctA using a 13°56MH2 high frequency power source, and was placed on a silicon single crystal substrate heated to 200'C.
A silicon crystal thin film was formed to a thickness of μm.
上記の如（して得られた試料につき、反射高速電子線回
折（ＲＨ巳Ｆ、Ｄ）によってシリコン結晶薄膜の評価を
行ったところ、良好な単結晶であることが判明した。こ
れは、本発明の方法によってシリコンのエピタキシャル
成長が行われた事を実証するものである。When the silicon crystal thin film of the sample obtained as described above was evaluated by reflection high-speed electron diffraction (RH MiF, D), it was found to be a good single crystal. This is to demonstrate that epitaxial growth of silicon was performed by the method of the invention.
得られたｇｉ膜の電子移動度をベトリッツ法を適用した
ホール効果想定装置により求めたところ１゜１００ｃ４
／ボルト・秒であり、極めて良好であることが確認され
た。The electron mobility of the obtained gi film was determined using a Hall effect simulation device applying the Betritz method and was found to be 1°100c4.
/ volt-second, which was confirmed to be extremely good.
比較例１゜ 実施例１で使用した反応ガスの代りにＳ ｉ Ｈ。Comparative example 1゜ SiH was used instead of the reaction gas used in Example 1.
、ＳｉＨ！Ｆ、及びＨ２の混合ガスを反応ガスとし、各
成分ガスを夫々ＩＳＣＣＭ、５ＳＣＣＭ及び１１００５
ｃｃとし、反応ガスの全圧力をＩＴｏｒｒ、高周波電力
密度をＩＷ／ｃ＋Ｉｆとした他は実施例１と同様にして
シリコン薄膜を作製した。ＲＨＥＥＤによって膜の評価
を行ったところ、薄膜が１５００人ではエピタキシャル
成長が確認されたが、３０００人の場合には、リングパ
ターンと若干のスポットが確認できたのみであり、アモ
ルファスシリコン及び多結晶シリコンになっていること
が判明した。, SiH! A mixed gas of F and H2 is used as a reaction gas, and each component gas is ISCCM, 5SCCM and 11005, respectively.
A silicon thin film was produced in the same manner as in Example 1, except that the total pressure of the reaction gas was ITorr, and the high frequency power density was IW/c+If. When the film was evaluated by RHEED, epitaxial growth was confirmed in the case of 1,500 thin films, but only a ring pattern and some spots were observed in the case of 3,000 films, indicating that it was not suitable for amorphous silicon and polycrystalline silicon. It turned out that it was.
実施例２゜
実施例１の成膜条件におけるＦ！／５ｉＨｎの比率を変
化させて得られた膜についてラマン半値幅を測定した。Example 2゜F! under the film forming conditions of Example 1! The Raman half-width of the films obtained by changing the ratio of /5iHn was measured.
ラマン半値幅のＦｔ／ＳｉＨ，依存性は第１図に示す通
りであり、この成膜条件においては、Ｆｇ／ＳｉＨ４の
比が約０．１〜５０で特に良好な結果が得られることが
明らかである。The dependence of the Raman half-width on Ft/SiH is shown in Figure 1, and it is clear that under these film formation conditions, particularly good results can be obtained with a Fg/SiH4 ratio of about 0.1 to 50. It is.
実施例３゜
ＳｉＨ４：Ｆｔ ：Ｈｔ ：Ｈｅ−１：１０：２０
：１００とした他は実施例１と全く同様にしてシリコン
結晶薄膜を成膜した。Example 3゜SiH4:Ft:Ht:He-1:10:20
A silicon crystal thin film was formed in the same manner as in Example 1, except that the thickness was set to 100.
得られた薄膜の電子移動度は１，０５０ｃａ／ボルト・
秒でありＲｆ（ＲＥＤによって単結晶シリコンであるこ
とがｖａｔｅされた。The electron mobility of the obtained thin film was 1,050 ca/volt・
It was determined to be single crystal silicon by Rf (RED).
実施例４゜
実施例１の成膜条件における基板温度を変化させて得ら
れた膜についてラマン半値幅を測定した。Example 4 Raman half-value widths of films obtained by changing the substrate temperature under the film forming conditions of Example 1 were measured.
ラマン半値幅の基板温度依存性は第２図に示す通りであ
った。The dependence of the Raman half-value width on the substrate temperature was as shown in FIG.
実施例５゜
実施例１の成膜条件における電力密度を変化させて得ら
れた膜についてラマン半値幅を測定した結果、電力密度
が約０．１〜５Ｗ／ｃｍ”で良好な結果が得られること
が判明した。Example 5゜As a result of measuring the Raman half-width of films obtained by changing the power density under the film-forming conditions of Example 1, good results were obtained at a power density of about 0.1 to 5 W/cm''. It has been found.
実施例６゜
本発明の方法によって得られるシリコンのエピタキシャ
ル薄膜の電気的特性を測定するために、第３図に示すシ
ョットキーダイオードを作製した。Example 6 In order to measure the electrical characteristics of a silicon epitaxial thin film obtained by the method of the present invention, a Schottky diode shown in FIG. 3 was fabricated.
基板としては、Ｎタイプで抵抗率０．００１５Ω／ｃｍ
の低抵抗シリコン基板を用い、実施例１と同一の条件で
厚さ１．０μｍのノンドープエピタキシャル薄膜を形成
させた。The substrate is N type with a resistivity of 0.0015Ω/cm.
A non-doped epitaxial thin film with a thickness of 1.0 μm was formed under the same conditions as in Example 1 using a low-resistance silicon substrate.
得られたダイオードの整流特性は、第４図に示す如く順
方向ｉｘ流の立ち上がりは急峻であり、ｎ値は約１．
１であった。又、印加電圧０．５Ｖにおける整流比は６
桁強もあった。これらの特性は、理想的な結晶シリコン
ショットキーダイオードの特性とよく一致するものであ
り、本発明によって成長するエピタキシャル薄膜の品質
が極めて良好であることを実証するものである。As shown in FIG. 4, the rectification characteristics of the obtained diode are such that the rise of the forward direction ix current is steep, and the n value is about 1.
It was 1. Also, the rectification ratio at an applied voltage of 0.5V is 6.
There was also a strong order of magnitude. These characteristics closely match those of an ideal crystalline silicon Schottky diode, and demonstrate that the quality of the epitaxial thin film grown by the present invention is extremely good.
実施例７゜
実施例５で得られたショットキーダイオードを用いてＣ
−■法によりエピタキシャル薄膜中の欠陥密度Ｎｄを測
定した所、Ｎｄは約２Ｘ１０１ｓ個／ ｃｆｆｌと掻め
て良好であることが実証された。Example 7゜C using the Schottky diode obtained in Example 5
When the defect density Nd in the epitaxial thin film was measured by the -■ method, it was verified that the defect density Nd was about 2×101s/cffl, which was good.
実施例８゜
基板としてガラスを用いた他は実施例１と全く同じ条件
で２．１μｍのシリコン結晶薄膜を形成させた。ＲＨＥ
ＥＤによる測定の結果、得られた薄膜は多結晶であるこ
とが判明したが電子移動度は１５ｃ＝ｄ／ボルト・秒で
あり、従来の多結晶薄膜の場合より良好であることが確
認された。Example 8 A silicon crystal thin film of 2.1 μm was formed under the same conditions as in Example 1 except that glass was used as the substrate. RHE
As a result of ED measurement, it was found that the obtained thin film was polycrystalline, but the electron mobility was 15c = d/volt-second, which was confirmed to be better than that of conventional polycrystalline thin films. .
第１図はラマン半値幅とＦ！／Ｓ ｉ Ｈ，の比率との
関係を示すグラフである。
第２図はラマン半値幅の基板温度依存性を示すグラフで
ある。
第３図は、実施例５で作製したショットキーダイオード
の概念図である０図中、符号１は基板、２はエピタキシ
ャル薄膜、３はインジウム電極、４は金電極を表す。
第４図は、実施例５で作製したエピタキシャル膜の整流
特性を表わす。図中、・印は電圧を順方向に印加した場
合であり、○印は逆方向に印加した場合である。
特許出願人 東亜燃料工業株式会社Figure 1 shows Raman half-width and F! It is a graph which shows the relationship with the ratio of /S i H. FIG. 2 is a graph showing the dependence of Raman half-width on substrate temperature. FIG. 3 is a conceptual diagram of the Schottky diode produced in Example 5. In FIG. 3, reference numeral 1 represents a substrate, 2 represents an epitaxial thin film, 3 represents an indium electrode, and 4 represents a gold electrode. FIG. 4 shows the rectification characteristics of the epitaxial film produced in Example 5. In the figure, the * mark indicates the case where the voltage is applied in the forward direction, and the ○ mark indicates the case where the voltage is applied in the reverse direction. Patent applicant Toa Fuel Industries Co., Ltd.
Claims (1)
料を含有した反応ガスをプラズマ化し、加熱基板上にシ
リコン結晶薄膜を成長せしめる方法において、該反応ガ
スが少なくとも成膜性ガスとしての水素化珪素及び不活
性ガスで希釈されたエッチング性ガスとしての弗素ガス
から成る混合ガスであり、前記エッチング性ガスの量が
成膜性ガスの量の約０．１〜５０倍となるように反応室
内に前記反応ガスを供給してプラズマを発生せしめ、約
１００〜７００℃の間の一定温度に維持した基板上にシ
リコン結晶薄膜を形成せしめることを特徴とするシリコ
ン結晶薄膜の製造方法。1) In a method of growing a silicon crystal thin film on a heated substrate by converting a reactive gas containing a raw material having silicon atoms into plasma using a plasma CVD method, the reactive gas contains at least silicon hydride and nitrogen as a film-forming gas. It is a mixed gas consisting of fluorine gas as an etching gas diluted with an active gas, and the reaction is carried out in the reaction chamber so that the amount of the etching gas is about 0.1 to 50 times the amount of the film forming gas. A method for producing a silicon crystal thin film, which comprises supplying a gas to generate plasma and forming a silicon crystal thin film on a substrate maintained at a constant temperature between about 100 and 700°C.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5724289A JPH0277116A (en) | 1988-03-09 | 1989-03-09 | Manufacture of silicon crystal thin film |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5687988 | 1988-03-09 | ||
| JP63-56879 | 1988-03-09 | ||
| JP5724289A JPH0277116A (en) | 1988-03-09 | 1989-03-09 | Manufacture of silicon crystal thin film |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0277116A true JPH0277116A (en) | 1990-03-16 |
Family
ID=26397875
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5724289A Pending JPH0277116A (en) | 1988-03-09 | 1989-03-09 | Manufacture of silicon crystal thin film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0277116A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005203638A (en) * | 2004-01-16 | 2005-07-28 | Semiconductor Energy Lab Co Ltd | Semiconductor film, its deposition method, semiconductor device and its fabrication process |
-
1989
- 1989-03-09 JP JP5724289A patent/JPH0277116A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005203638A (en) * | 2004-01-16 | 2005-07-28 | Semiconductor Energy Lab Co Ltd | Semiconductor film, its deposition method, semiconductor device and its fabrication process |
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