JPH025693A - Picture quality improving circuit and chroma difference extracting circuit - Google Patents
Picture quality improving circuit and chroma difference extracting circuitInfo
- Publication number
- JPH025693A JPH025693A JP63156089A JP15608988A JPH025693A JP H025693 A JPH025693 A JP H025693A JP 63156089 A JP63156089 A JP 63156089A JP 15608988 A JP15608988 A JP 15608988A JP H025693 A JPH025693 A JP H025693A
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- signal
- input
- equalizer
- output
- subtracter
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- 238000000605 extraction Methods 0.000 claims abstract description 21
- 230000006872 improvement Effects 0.000 claims description 21
- 239000002131 composite material Substances 0.000 claims description 8
- 230000003321 amplification Effects 0.000 claims description 2
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 2
- 238000012937 correction Methods 0.000 abstract description 14
- 238000010586 diagram Methods 0.000 description 33
- 238000001514 detection method Methods 0.000 description 6
- 230000002596 correlated effect Effects 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 230000002238 attenuated effect Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000000875 corresponding effect Effects 0.000 description 2
- 230000003111 delayed effect Effects 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 230000004069 differentiation Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
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- Processing Of Color Television Signals (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野１
本発明はカラーテレビジョン信号の色信号処理に閃し、
特に輝度信号と色信号からそれぞれ作られた２つの輪郭
信号を用いた画質改善回路及びこれに用いるクロマ差分
抽出回路に関する。[Detailed Description of the Invention] [Industrial Application Field 1] The present invention is directed to color signal processing of color television signals;
In particular, the present invention relates to an image quality improvement circuit using two contour signals respectively generated from a luminance signal and a chrominance signal, and a chroma difference extraction circuit used therefor.
［従来の技術１
複合カラーテレビジョン信号から分離された輝度信号と
色信号からそれぞれ輪郭を表す輝度輪郭信号と色輪郭信
号を作り、これらを用いて再生画像の輪郭部における色
にじみの発生を防止する画質改善回路として米国特許第
４，５０４，８５３号に示されるものがある。[Prior art 1] A luminance contour signal and a color contour signal representing the contour are created from the luminance signal and color signal separated from a composite color television signal, respectively, and these are used to prevent the occurrence of color blurring in the contour portion of the reproduced image. There is an image quality improvement circuit shown in US Pat. No. 4,504,853.
この従来の回路の要部を第２０図に示す１色信号入力端
子１１に入来した色信号Ａ゛は色信号位相イコライザを
含む帯域フィルタ第２により群遅延特性のイコライズを
受けた信号Ｂ゛となる０次にこの信号Ｂ゛は第１加算器
１８によってカラーサブでキャリアの１７２周期に相当
する時間だけ遅延させた（ｉ号り゛と加Ｗ、された信号
Ｅ“となる、この信号処理は色信号の微分に相当する。The main part of this conventional circuit is shown in FIG. 20. A color signal A' inputted to a color signal input terminal 11 is a signal B' whose group delay characteristics are equalized by a second bandpass filter including a color signal phase equalizer. This signal B' is delayed by the first adder 18 by a time corresponding to 172 cycles of the carrier in the color sub. The processing corresponds to differentiation of color signals.
一方、ベースバンド輝度信号Ｆは輝度信号入力端子１３
から低域フィルタ２４に入力されて帯域が制限された信
号Ｇとなり、この信号Ｇは微分回路２６にて微分された
信号Ｈとなる。この信号Ｈは輝度信号Ｆの立ち上りと立
ち下りで逆極性となるが両者を同一極性にするために全
波整流回路２３にて全波整流を行なう、全波整流された
信号Ｊを微分回路３０にて再び微分し、この微分した信
号Ｋをリミッタ３２に与えて振幅を制限した信号りとす
る０次にこの信号りを波形整形回路３４にて波形成形し
て信号Ｍを得る。On the other hand, the baseband luminance signal F is transmitted to the luminance signal input terminal 13.
The signal G is input to the low-pass filter 24 and becomes a band-limited signal G, which is differentiated by the differentiating circuit 26 to become a signal H. This signal H has opposite polarity at the rising and falling edges of the luminance signal F, but in order to make both of them the same polarity, full-wave rectification is performed in the full-wave rectifier circuit 23. The differentiated signal K is again differentiated at , and the differentiated signal K is given to a limiter 32 to produce a signal with limited amplitude. This zero-order signal is waveform-shaped by a waveform shaping circuit 34 to obtain a signal M.
ここで信号ＭとＥは画面上で同一エツジとなる色信号Ａ
゛と輝度信号Ｆから生成されたものである。信号ＭとＥ
’は第２１図にあるようにタイミング合せが行われてい
る必要がある。乗算の結果得られた信号Ｎは遅延回路１
４にてタイミング合わせの行われた色信号Ｃ゛に第２加
算器２２にて加算され、出力信号Ｏとなる。Here, the signals M and E are the color signal A that has the same edge on the screen.
It is generated from the luminance signal F and the luminance signal F. Signals M and E
' needs to be aligned as shown in FIG. The signal N obtained as a result of the multiplication is sent to the delay circuit 1.
The second adder 22 adds the color signal C' whose timing has been adjusted in step 4, and becomes the output signal O.
このようにして例えば低域変換記録方式を行うＶＴＲの
再生信号のように色信号の帯域が狭くなり色工７シの過
渡時間が劣化した色信号に対して、色信号と輝度信号の
相関性を利用することによって、輪郭補正が行われる。In this way, for example, the correlation between the color signal and the luminance signal can be improved for a color signal where the band of the color signal is narrow and the transition time of the color processing is deteriorated, such as the reproduction signal of a VTR that uses the low frequency conversion recording method. Contour correction is performed by using .
［発明が解決しようとする課題１
次に上記従来の画質改善回路の動作における問題点を第
２２図、及Ｖ第２３図を用いて説明する０図中、■、■
は、それぞれ入力される輝度信号波形、搬送色信号波形
およびそれらのタイミングを示す。[Problem to be Solved by the Invention 1] Next, problems in the operation of the conventional image quality improvement circuit described above will be explained using FIGS. 22 and 23.
show the luminance signal waveform, the carrier color signal waveform, and their timings, respectively, which are input.
また、第２２図は輝度と色信号が相関性をもった絵柄、
第２３図は輝度と色信号が無相関でありしかも輝度信号
の変化の近傍で色信号の変化が起こるような絵柄を想定
した波形である。第２２図に示されるような波形が入来
した時は＄２０図の従来回路は米国特許第４，５０４，
８５３号に示されるように動作し、回路出力波形■は色
にじみの補正された信号になる。In addition, Fig. 22 shows a pattern in which luminance and color signals have a correlation.
FIG. 23 shows waveforms assuming a picture in which the brightness and color signals are uncorrelated and the color signal changes in the vicinity of the change in the brightness signal. When a waveform like that shown in FIG. 22 comes in, the conventional circuit shown in FIG.
The circuit operates as shown in No. 853, and the circuit output waveform (2) becomes a signal with color fringing corrected.
しかし従来回路に第２３図のような波形が入来すると、
図中、■および■に示されるような微分波形のタイミン
グとなり、本来は無関係である輝度信号の二ツノ情報で
色信号のエツジ情報が変調される。この変調信号■が入
力信号■に合成されて■に示されるような色信号の疑似
輪郭が発生してしまう、従って従来回路では輪郭強調量
を少なく設定せざるを得ながった。However, when a waveform like that shown in Figure 23 enters the conventional circuit,
In the figure, the timing of the differential waveform is as shown by ■ and ■, and the edge information of the color signal is modulated by the two pieces of information of the luminance signal, which are originally unrelated. When this modulation signal (2) is combined with the input signal (2), a pseudo contour of the color signal as shown in (2) is generated.Therefore, in the conventional circuit, the amount of contour enhancement must be set to a small value.
萌述のように従来の回路では、色の輪郭を補正するため
の乗算（２号として輝度信号を使っているために色信号
と輝度信号が相関性を持たない時に上記問題が発生する
。これを防ぐためには、色信号自身で輪郭補正を行うこ
とも可能でありこの場合は疑似輪郭は発生しないが、帯
域特性の劣化している色信号の高域信号はＳ／Ｎ比が悪
いために輪郭補正によって色信号のＳ／Ｎ比が劣化して
しまうという問題が発生する。As mentioned in Moe, in conventional circuits, the above problem occurs when the color signal and the luminance signal have no correlation because the luminance signal is used as the multiplication (No. 2) to correct the color outline. In order to prevent this, it is possible to perform contour correction on the color signal itself, and in this case false contours will not occur, but since the high frequency signal of the color signal with deteriorated band characteristics has a poor S/N ratio, A problem arises in that the S/N ratio of the color signal deteriorates due to contour correction.
かかる従来の問題を解決すべく本出願人は先に色信号の
疑似輪郭が発生することなく、輪郭補正による色信号の
Ｓ／Ｎ比の劣化の少ない画質改善回路を開発し特許出願
している（特願昭６３−１０７８４１）。In order to solve such conventional problems, the present applicant has developed an image quality improvement circuit that does not generate false contours of color signals and has less deterioration of S/N ratio of color signals due to contour correction, and has filed a patent application. (Patent application No. 63-107841).
上記光の特許出願では輝度信号から作った輪郭信号と色
信号から作った輪郭信号を比較し、両者が相関性を持た
ない部分を検出する構成とし、相関性のないときは輝度
信号から作った輪郭信号の非相関成分を減衰させ、輝度
信号から作った輪郭信号の非相関部分が減衰された信号
を乗算器に入力し色信号をＶ＆分した信号にＭＷして輪
郭補正を行う、このように先の特許出願の画質改善回路
では非相関性の検出を行うので色の疑似輪郭の発生をお
さえることができ、またＳ／Ｎ比の良い輝度信号を使用
するために輪郭補正による色信号のＳ／Ｎ比の劣化が少
ないという特徴がある。In the optical patent application mentioned above, a contour signal made from a luminance signal and a contour signal made from a color signal are compared, and parts where there is no correlation between the two are detected, and when there is no correlation, a contour signal made from the luminance signal is used. In this method, the uncorrelated components of the contour signal are attenuated, and the signal in which the uncorrelated portion of the contour signal created from the luminance signal is attenuated is input to a multiplier, and the chrominance signal is MW-divided into a signal obtained by dividing V& to perform contour correction. The image quality improvement circuit of the earlier patent application detects non-correlation, so it is possible to suppress the occurrence of false color contours, and in order to use a luminance signal with a good S/N ratio, it is possible to improve the color signal by contour correction. It is characterized by little deterioration of the S/N ratio.
上記光の特許出願の画質改善回路は、色信号から輪郭信
号を作るため遅延回路（Ｎ Ｔ Ｓ Ｃ方式ではカラー
サブキャリア信号周期の１／２、すなわち約１４０ｎｓ
の遅延時間）と加算器からなるクロマ差分抽出回路を必
要とし、更にこのクロマ差分抽出回路の前段に群遅延等
化を行うイコライザを設ける必要があった。又クロマ差
分抽出回路の後段には遅延時間を補償する遅延補償回路
を必要とする。The image quality improvement circuit of the optical patent application mentioned above uses a delay circuit (1/2 of the color subcarrier signal period in the NTS C system, or about 140 ns) to create a contour signal from the color signal.
It was necessary to provide a chroma difference extraction circuit consisting of a delay time (delay time of Further, a delay compensation circuit for compensating for delay time is required at the subsequent stage of the chroma difference extraction circuit.
更に遅延回路と加算器からなるクロマ差分抽出回路は、
その調整範囲が狭く、これを広くすることが困難である
。Furthermore, the chroma difference extraction circuit consisting of a delay circuit and an adder is
The adjustment range is narrow and it is difficult to widen it.
従って本発明は、時間合わせのために用いられる遅延補
償回路を必要とせず、差分調整の範囲を比較的容易に得
ることのできる画質改善回路を提供することを目的とす
る。Therefore, an object of the present invention is to provide an image quality improvement circuit that does not require a delay compensation circuit used for time adjustment and can relatively easily obtain a range of differential adjustment.
［課題を解決するための手段及び作用１本発明は上記目
的を達成するため、画質改善回路におけるクロマ差分の
抽出のため縦列に接続された第１〜第３のイコライザと
２つの減算器を用いる構成とし、第２、第３のイコライ
ザの群遅延量を第１のイコライザより少なく設定し、輝
度輪郭信号と論理演算するための色輪郭信号と、論理演
算の結果得られた信号と乗算する色輪郭信号を異なる態
様のものとしている。[Means and Effects for Solving the Problems 1] In order to achieve the above object, the present invention uses first to third equalizers and two subtractors connected in series to extract a chroma difference in an image quality improvement circuit. The configuration is such that the group delay amount of the second and third equalizers is set smaller than that of the first equalizer, and a color contour signal is used for logical operation with the brightness contour signal, and a color is multiplied by the signal obtained as a result of the logical operation. The contour signals are of different types.
すなわち本発明によれば複合力ラーテレビノヨン信号か
ら分離された又はこれを構成する色信号を微分して画像
中の輪郭を表示する信号を作る第１手段と、前記複合カ
ラーテレピノシン信号から分離された又はこれを構成す
る輝度信号から画像中の輪郭を表示する信号を作る第２
手段と、前記第１手段と第２手段からの出力信号を乗算
する手段と、前記乗算する手段の出力信号に前記色信号
を加算する手段とからなる画質改善回路において、前記
第１手段が縦列に接続された第１、第２、第３のイコラ
イザと、第１と第２の減算器を有し、前記色信号がｉｉ
ｊ記ｔ５１のイコライザの入力と、１１ｑ記第１の減算
器の加算入力に与えられ、前記第２のイコライザの出力
信号が前記第１の減算器の減算入力と前記第３のイコラ
イザの入力に与えられ、前記第１のイコライザの出力が
前記第２のイコライザの入力と前記第２の減算器の加算
入力に与えられ、前記第３のイコライザの出力が前記第
２の減算器の減算入力に与えられる構成とし、前記第２
の滅Ｘ器の出力を前記第１手段の出力信号として前記乗
算する手段に与える構成とし、前記第１手段の前記第１
の減算器の出力信号を検波した後微分する第３手段を設
け、前記第２手段からの信号と前記第１の減算器の出力
信号に応答し、両信号の極性が同一のときは前記ｔｔＩ
Ｊ２手段からの信号を出力し、一方両信号の極性が同一
でないときは前記第２手段からの信号の振幅より小さい
振幅の信号を出力する第４手段を前記第２手段と前記乗
算する手段の間に設け、前記第４手段の出力信号を萌記
釆ヰする手段に供給して前記第１手段の前記第２の減算
器からの出力信号と乗算する構成としたことを特徴とす
る画質改善回路が提供される。That is, according to the present invention, a first means for differentiating a color signal separated from or constituting a composite color terrestrial signal to produce a signal for displaying an outline in an image; A second step that generates a signal that displays the contour in the image from the separated or constituent luminance signals.
means for multiplying the output signals from the first means and the second means, and means for adding the color signal to the output signal of the multiplication means, wherein the first means are arranged in a column. and first, second, and third equalizers connected to ii
The output signal of the second equalizer is applied to the input of the equalizer in t51 of j and the addition input of the first subtracter of 11q, and the output signal of the second equalizer is applied to the subtraction input of the first subtractor and the input of the third equalizer. the output of the first equalizer is applied to the input of the second equalizer and the addition input of the second subtractor, and the output of the third equalizer is applied to the subtraction input of the second subtractor. With the configuration given, the second
The output of the annihilator is applied to the multiplier as an output signal of the first means, and
A third means for detecting and then differentiating the output signal of the subtracter is provided, and is responsive to the signal from the second means and the output signal of the first subtracter, and when the polarities of both signals are the same, the ttI
a fourth means for outputting a signal from the J2 means, and outputting a signal with an amplitude smaller than the amplitude of the signal from the second means when the polarities of both signals are not the same; Image quality improvement characterized in that the image quality improvement is characterized in that the output signal of the fourth means is provided between the recording means and the output signal of the fourth means is supplied to the recording means and multiplied by the output signal from the second subtracter of the first means. A circuit is provided.
なお上記構成の画質改善回路に用いるクロマ差分抽出回
路は上記第４手段を有さない第２０図に示した前述の米
国特許の画質改善回路等、池の構成にも用いることがで
きる。すなわち、本発明によれば複合カラーテレピノシ
ン信号から分離された又はこれを構成する色信号を微分
して画像中の輪郭を表示する信号を作るクロマ差分抽出
回路において、前記クロマ差分抽出回路が縦列に接続さ
れた第１、第２、第３のイコライザと、第１と第２の減
算器を有し、前記色信号が前記第１のイコライザの入力
と、前記第１の滅ｊＸ、器の加算入力に与えられ、前記
第２のイコライザの出力信号が前記第１の滅揶器の減算
入力と前記第３のイコライザの入力に与えられ、前記第
１のイコライザの出力が前記ｔｔｒＪ２のイコライザの
入力と前記第２の減算器の加算入力に与えられ、ｉ肖記
第３のイコライザの出力が前記第２の減算器の滅が入力
に与えられる４！７成としとことを特徴とするクロマ差
分抽出回路が提供される。Note that the chroma difference extraction circuit used in the image quality improvement circuit having the above configuration can also be used in a similar configuration, such as the image quality improvement circuit of the above-mentioned US patent shown in FIG. 20, which does not include the fourth means. That is, according to the present invention, in a chroma difference extraction circuit that differentiates a color signal separated from or constituting a composite color terepinosine signal to generate a signal for displaying an outline in an image, the chroma difference extraction circuit comprises: It has first, second, and third equalizers connected in series, and first and second subtractors, and the color signal is input to the input of the first equalizer and the first subtractor. The output signal of the second equalizer is applied to the subtraction input of the first equalizer and the input of the third equalizer, and the output of the first equalizer is applied to the equalizer of ttrJ2. and an addition input of the second subtractor, and the output of the third equalizer is 4!7, and the output of the third equalizer is given to the input of the second subtractor. A chroma difference extraction circuit is provided.
［実施例１
以下本発明の実施例について図面と共に説明す第１図は
本発明の画質改善回路の１実施例を示すブロック図であ
り、第２図および第３図はその動作を示す波形図である
。１４度信号（Ｙ）入力端子１３に与えられた輝度信号
Ｙ■は低域フィルタ（ＬＰＦ）２４を介して微分回路２
６に与えられ、その出力信号は両波整流回路２８を介し
て第２の微分回路３０に与えられ、その出力信号■はリ
ミッタ３２を介して論理回路４０に与えられる。一方、
色信号（Ｃ）入力端子１１に与えられた色信号■は縦列
接続された３つのイコライザ１７ａ、 １７ｂ、 １７
ｃと、これらに接続された２つの減算器１９ａ、 １９
ｂからなるクロマ差分抽出回路９０の入力に与えられる
。このクロマ差分抽出回路９０が色信号を微分して画像
中の輪郭を表示する信号を作る第１手段に相当する。こ
のクロマ差分抽出回路９０の構成によれば、入力の色信
号が第１のイコライザ１７ａの入力と、第１の滅ｎ器１
９ａの加算入力に与えられ、第２のイコライザ１７ｂの
出力信号が第１の減算器１９ａの減算入力とＰｔ４３の
イコライザ１７ｃの入力に与えられ、第１のイコライザ
＋７ａの出力が第２のイコライザ１７ｂの入力と第２の
減算器１９ｂの加算入力に与えられ、第３のイコライザ
１７ｃの出力が第２の減算器１９ｂの減算入力に与えら
れる構成とし、第２の減算器１９ｂの出力がクロマ差分
抽出回路の１つの出力信号として乗算器２０の一方の入
力に与えられると共に、第１の減算器１９ａの出力がＡ
Ｍ検波回路３６及び微分回路３８を介して論理回路４０
に与えられる。[Embodiment 1] Hereinafter, embodiments of the present invention will be explained with reference to the drawings. Fig. 1 is a block diagram showing one embodiment of the image quality improvement circuit of the present invention, and Figs. 2 and 3 are waveform diagrams showing its operation. It is. The luminance signal Y given to the 14 degree signal (Y) input terminal 13 is passed through a low pass filter (LPF) 24 to a differentiating circuit 2.
6, its output signal is applied to the second differentiating circuit 30 via the double-wave rectifier circuit 28, and its output signal 2 is applied to the logic circuit 40 via the limiter 32. on the other hand,
The color signal (C) applied to the color signal (C) input terminal 11 is transmitted through three equalizers 17a, 17b, 17 connected in series.
c and two subtractors 19a, 19 connected to these
It is applied to the input of the chroma difference extraction circuit 90 consisting of This chroma difference extraction circuit 90 corresponds to a first means for differentiating the color signal and producing a signal for displaying the outline in the image. According to the configuration of this chroma difference extraction circuit 90, the input color signal is the input of the first equalizer 17a and the input of the first equalizer 17a.
The output signal of the second equalizer 17b is applied to the subtraction input of the first subtracter 19a and the input of the equalizer 17c of Pt43, and the output of the first equalizer +7a is applied to the second equalizer 17b. and the addition input of the second subtractor 19b, the output of the third equalizer 17c is provided to the subtraction input of the second subtractor 19b, and the output of the second subtractor 19b is the chroma difference It is given to one input of the multiplier 20 as one output signal of the extraction circuit, and the output of the first subtractor 19a is A
Logic circuit 40 via M detection circuit 36 and differentiation circuit 38
given to.
第２図及び第３図の波形における番号■、■、■・・・
はｔ５１図のそれ１こ対応しており、第２図は輝度信号
Ｙと色信号Ｃが相関している場合を、第３図は両者間に
相関がない場合をそれぞれ示している。なお第１〜第３
図において■°、■゛は第２３図の■、■と異なる信号
であるためダッシュを付しである。Numbers ■, ■, ■... in the waveforms of Figures 2 and 3
corresponds to that in diagram t51, and FIG. 2 shows a case where the luminance signal Y and color signal C are correlated, and FIG. 3 shows a case where there is no correlation between them. Note that the first to third
In the figure, ■° and ■゛ are different signals from ■ and ■ in FIG. 23, so they are marked with a dash.
クロマ差分抽出回路９０の第１のイコライザ１７ａは、
例元ぼ約５００ｎｓの遅ｙ、量を与えるものであり、ク
ロマ差分抽出回路９０の前段に設けられる図示しない帯
域フィルタ（ＢＰＦ）等で生ずるサイドバンドの遅延量
の増加をキャンセルする方向に働くものである。第４ａ
図はこの様子を示す図であり第４ｂ図はＢＰＦと第１の
イコライザ１７ａの合成特性を示す図である。The first equalizer 17a of the chroma difference extraction circuit 90 is
For example, it provides a delay amount of approximately 500 ns, and works to cancel the increase in sideband delay amount that occurs in a bandpass filter (BPF, not shown), etc. provided at the front stage of the chroma difference extraction circuit 90. It is. 4th a
The figure shows this situation, and FIG. 4b is a diagram showing the composite characteristics of the BPF and the first equalizer 17a.
第１−第３のイコライザ１７ａＳ１７ｂ、 １７ｃは例
えば第５ａ図のように２つのトランノスタＴＩ、Ｔ２と
フィルＬ、コンデンサＣ１抵抗Ｒを組み合わせることに
より構成される。第５ｂ図は第１〜第３のイコライザ１
７ａ、１７ｂ、 １７ｃの周波数対ダイン特性及び周波
数対遅延時間特性を示すグラフであり、第５ｃ図は、第
１〜第３のイコライザ１７ａ、１７ｂ、１７ｃの周波数
対位相特性を示すグラフである。The first to third equalizers 17aS17b, 17c are constructed by combining two trannostars TI and T2, a fill L, a capacitor C1, and a resistor R, as shown in FIG. 5a, for example. Figure 5b shows the first to third equalizers 1
7a, 17b, and 17c are graphs showing frequency versus dyne characteristics and frequency versus delay time characteristics, and FIG. 5c is a graph showing frequency versus phase characteristics of the first to third equalizers 17a, 17b, and 17c.
各イコライザＬ７ａ、 Ｌ７ｂ、 １７ｃはカラーサブ
キャリア周波数ｆｓｃで入出力特性が１８０°変化して
逆位相となるように、すなわち内部のＬＣを調整して共
振周波数がｆｓｃになるようにしている。又、第２及び
第３のイコライザ１７ｂ、 １７ｃの遅延量は第１のイ
コライザ１７ａに比して少なく設定される。これは第２
及び第３のイコライザ１７ｂ、 ＋７ｃと第２の減算器
１９ｂで構成するクロマ差分回路は色信号をエンハンス
するために用いられる信号を作る部分であるからである
。一方、第１及び第２のイコライザ１７ａ、１７ｂと第
１の減算器１９ａ″Ｃ″−構成されるクロマ差分回路は
色輪郭（クロマエツノ）の検出感度を向上させるために
は、遅延量を大きくして、より離れｒこ２点間で差分を
検出することが得策であるので、＠１のイコライザ１７
ａの遅延量は大きく設定されるのである。かかる遅延量
の設定は、前述のＢＰＦ等の群遅延を等化する目的と矛
盾することなく融合するのである。Each of the equalizers L7a, L7b, and 17c is configured such that the input/output characteristics change by 180° at the color subcarrier frequency fsc and have opposite phases, that is, the internal LC is adjusted so that the resonance frequency becomes fsc. Further, the delay amounts of the second and third equalizers 17b and 17c are set to be smaller than that of the first equalizer 17a. This is the second
This is because the chroma difference circuit composed of the third equalizers 17b and +7c and the second subtracter 19b is a part that generates a signal used to enhance the color signal. On the other hand, the chroma difference circuit composed of the first and second equalizers 17a and 17b and the first subtractor 19a"C" has a large delay amount in order to improve the detection sensitivity of color contours. Since it is a good idea to detect the difference between two points that are further apart, the equalizer 17 of @1
The delay amount of a is set large. Setting such a delay amount is compatible with the purpose of equalizing the group delay of the BPF and the like described above.
上記論理回路４０は位相比較器４２、電圧比較器４４、
遅延回路４６、選択スイッチ４８からなる。この位相比
較器４２、及び選択スイッチ４８はそれぞれ第６ａ図及
び第６ｂ図に示す回路購成のものを使用することができ
る。第６Ｃ図は論理回路４０の真理値表を示すものであ
り、リミッタ３２の出力信号をＡ、微分回路３８の出力
をＢとし、各々が正の値（ａ、 ｂ）のとき、０のとさ
、負の値（−ａ、 −ｂ）のと外に得られる出力信号Ｃ
°°の内容を示している。The logic circuit 40 includes a phase comparator 42, a voltage comparator 44,
It consists of a delay circuit 46 and a selection switch 48. As the phase comparator 42 and the selection switch 48, the circuits shown in FIGS. 6a and 6b, respectively, can be used. FIG. 6C shows a truth table of the logic circuit 40, where the output signal of the limiter 32 is A, the output of the differentiator 38 is B, and when each has a positive value (a, b), the value of 0 and Then, the output signal C obtained outside of the negative values (-a, -b)
Indicates the contents of °°.
第２図及び第３図の波形図で、ＩＪ ミッタ３２の出力
信号■は輝度信号■から作られた輪郭信号であリ、輝度
輪郭信号と呼ぶ。又微分回路３８の出力信号■゛は微分
された搬送色信号■をＡＭ検波してベースバンド信号に
した後に微分したものであり、色信号から作られた輪郭
信号であり、色輪郭信号と呼ぶ。In the waveform diagrams of FIGS. 2 and 3, the output signal (2) of the IJ transmitter 32 is a contour signal created from the luminance signal (2), and is called a brightness contour signal. The output signal ``'' of the differentiating circuit 38 is the differentiated carrier chrominance signal ■ which is differentiated after being converted into a baseband signal by AM detection, and is a contour signal made from the chrominance signal, and is called a color contour signal. .
本実施例ではこの２つの輪郭信号■、■゛を第１図に示
すように位相比較器４２に入力し、非相関部分の検出を
行うようになっている１位相比較器４２は、例えば第６
ａ図に示される構成のものを使用することができる０位
相比較器４２は２つの入力信号■、■゛が同極性の時に
は動作点に対して正の電圧を、２人力が異なる極性の時
は動作１代に対して負の電圧を出力する構成となってい
る。第２図及び第３図の［相］の波形は位相比較器４２
の出力を示す。図示されているように、位相比較器４２
の出力は、輝度と色の輪郭が相関性を持つ時は正、非相
関の時は負の値になる０次に位相比較器４２の出力は電
圧比較器４４によってスライスされて非相関の時のみＨ
レベルとなるパルス信号となる。In this embodiment, these two contour signals ■ and ■'' are input to the phase comparator 42 as shown in FIG. 6
The zero-phase comparator 42, which can use the configuration shown in Figure a, outputs a positive voltage with respect to the operating point when the two input signals ■ and ■ have the same polarity, and when the two input signals have different polarities. is configured to output a negative voltage for the first generation of operation. The waveform of [phase] in FIGS. 2 and 3 is from the phase comparator 42.
shows the output of As shown, phase comparator 42
The output of the 0-order phase comparator 42 is sliced by the voltage comparator 44, and the output is positive when the brightness and color contours are correlated, and negative when they are uncorrelated. Only H
It becomes a pulse signal with a certain level.
また、輝度信号から作られた輪郭信号■は、非相関の検
出回路の遅れと同程度の遅延時間を持つ遅延回路４６を
通った後に選択スイッチ４８に供給される。ここで選択
スイッチ４８は、非相関パルスがＨレベルである期間は
出力をミュートし、相関時には輝度信号■から作った輪
郭信号■を出力する。Further, the contour signal (2) created from the luminance signal is supplied to the selection switch 48 after passing through a delay circuit 46 having a delay time comparable to that of the non-correlation detection circuit. Here, the selection switch 48 mutes the output during the period when the non-correlation pulse is at the H level, and outputs the contour signal ■ created from the luminance signal ■ during the correlation period.
選択スイッチ回路４８は例えば第６ｂ図に示す構成のも
のを使用することができる０選択スイッチ回路４８の出
力には、第２及び第３図の■に示されるように、輝度輪
郭信号■と色輪郭信号■゛の極性が異なる部分が減衰さ
れた輝度輪郭信号が得られる。For example, the selection switch circuit 48 may have the configuration shown in FIG. A brightness contour signal is obtained in which the portions of the contour signal {circle around (2)} having different polarities are attenuated.
前述のように、色の疑似輪郭は本来無関係である輝度の
輪郭が色の輪郭の近傍に存在していて、無関係である輝
度輪郭信号■と色微分信号■が同時刻に乗算器２０に入
力される期間がある時に発生する。このような時には色
輪郭と輝度輪郭には位置（時間）のずれがあるので２つ
の輪郭信号（第２図及び第３図の■と■゛）のゼロクロ
ス点の位置にも必ずずれが存在する。従って両者が異極
性になる期間が必ず存在する。この期間の輝度輪郭信号
■をそのまま乗算器２０に入力すると、従来回路につい
て説明したように本来はキャンセルされるはずの色にじ
みが逆極性に変調されて強調されてしまい疑似輪郭が発
生することになる。本発明では、２つの輪郭信号■、■
゛が異極性になる時には輝度輪郭信号■より振幅の小さ
い信号を乗算器２０へ送出するので疑似輪郭を防止した
輪郭補正な竹うことがでさ、従来の問題が解決されるの
である。As mentioned above, the luminance contour, which is originally unrelated to the color false contour, exists in the vicinity of the color contour, and the unrelated luminance contour signal ■ and color differential signal ■ are input to the multiplier 20 at the same time. Occurs when there is a period in which In such a case, there is a position (time) shift between the color contour and the brightness contour, so there is always a shift in the position of the zero cross point of the two contour signals (■ and ■゛ in Figures 2 and 3). . Therefore, there is always a period when the two have different polarities. If the luminance contour signal (■) of this period is input as is to the multiplier 20, as explained for the conventional circuit, the color fringing that should originally be canceled will be modulated to the opposite polarity and emphasized, resulting in the generation of false contours. Become. In the present invention, two contour signals ■, ■
When the polarity of the luminance contour signal (2) is different, a signal having a smaller amplitude than the luminance contour signal (2) is sent to the multiplier 20, so that contour correction can be performed to prevent false contours, and the conventional problem is solved.
第６ｃ図の真理値表から明らかなように、論理回路４０
は２つの入力信号Ａ、Ｂ（それぞれ■、■゛に対応）の
値に応じて入力信号Ａの値ａ、−ａ又は０を出力Ｃ＋
＋として出力する構成となっている。従って第１図の論
理回路４０に代えて他の構成とすることも可能である。As is clear from the truth table of FIG. 6c, the logic circuit 40
outputs the value a, -a, or 0 of the input signal A according to the values of the two input signals A and B (corresponding to ■ and ■゛, respectively)C+
It is configured to output as +. Therefore, other configurations may be used in place of the logic circuit 40 in FIG. 1.
第７図は第１図の論理回路４０に代えて用いることので
きる論理回路５０の構成を示すブロック図であり、この
論理回路５０を用いた回路構成は本発明の第２の実施例
を構成する。第７図において５１は増幅器により構成さ
れる係数器、５２．５４は最大値選択回路（Ｍ Ａ Ｘ
）、５８．５８は最小値選択回路（ＭＩＮ）であり、
６０は加算器である。最大値選択回路５２．５４は、そ
の２人力中の大きい方の信号を選択して出力する回路で
あり、例えば第８図に示す回路構成のものを用いること
ができる。又最小値選択回路５６．５８は、その２人力
中の小さい方の信号を選択して出力する回路であり、例
えば第９図に示す回路構成のものを使用することができ
る。FIG. 7 is a block diagram showing the configuration of a logic circuit 50 that can be used in place of the logic circuit 40 in FIG. 1, and a circuit configuration using this logic circuit 50 constitutes a second embodiment of the present invention. do. In FIG. 7, 51 is a coefficient unit constituted by an amplifier, 52.54 is a maximum value selection circuit (M A
), 58.58 is the minimum value selection circuit (MIN),
60 is an adder. The maximum value selection circuits 52 and 54 are circuits that select and output the larger signal of the two input signals, and may have the circuit configuration shown in FIG. 8, for example. The minimum value selection circuits 56 and 58 are circuits that select and output the smaller signal of the two input signals, and for example, a circuit having the circuit configuration shown in FIG. 9 can be used.
なお係数器５１はＡ、Ｂの２つの入力が同極性のときに
、Ａ入力を優先的に出力させるためＢ入力をＡ入力と同
程度に増幅するために用いられている。Note that the coefficient multiplier 51 is used to amplify the B input to the same extent as the A input in order to output the A input preferentially when the two inputs A and B have the same polarity.
第１０図は論理回路５０の真理値表である。この中でＭ
Ｉ Ｎ（ａ、 ｂ）、ＭＡＸ（−ａ、−ｂ）は、それ
ぞれ括弧内の信号のうち小さい方又は大きい方を出力す
ることを意味する１本実施例は、第１図の実施例のよう
に位相比較器４２、電圧比較器４４等を必要としないの
で比較的少ない回路部品で安定な動作が得られるという
特長を持つ。FIG. 10 is a truth table of the logic circuit 50. Among these, M
I N (a, b) and MAX (-a, -b) mean outputting the smaller or larger one of the signals in parentheses, respectively. This embodiment is the same as the embodiment shown in FIG. Since the phase comparator 42, the voltage comparator 44, etc. are not required, stable operation can be achieved with a relatively small number of circuit components.
第１１図は本発明の第３実施例を示すブロック図であり
、第７図の第２実施例の変形例である。すなわち、第７
図と異なるのはへ入力がインバータ５３を介して最大値
選択回路５２と最小値選択回路５６にそれぞれ与えられ
ていること、加算器６０の出力とＡ入力を加算する池の
加算器６２が設けられていることである。第第２図は第
１１図の論理回路６４の真理値表である。FIG. 11 is a block diagram showing a third embodiment of the present invention, which is a modification of the second embodiment shown in FIG. That is, the seventh
What differs from the diagram is that the input is given to the maximum value selection circuit 52 and the minimum value selection circuit 56 through an inverter 53, and that an adder 62 is provided to add the output of the adder 60 and the A input. This is what is happening. FIG. 2 is a truth table of logic circuit 64 of FIG. 11.
第１３図は本発明の第４実施例を示すブロック図である
６本実施例ではＡ、Ｂの２人力に応答する論理回路８２
が２つの係数器８４．８８と加算器８６から構成されて
いる。係数器８４．８８は増幅度が所定の係数に見合う
ように設定された増幅器であり、係数器８４の係数はＢ
入力の振幅がへ入力の振幅とほぼ等しくなるまでＢ入力
を増幅する値に設定される。係数器８４の出力Ｂ゛は加
算器８６に与えられてＡ入力と加にされ、その和信号Ｓ
が係数器８８を介して出力Ｃ゛として乗算器２０へ与え
られる。係数器８４の係数を上記のように設定したので
、へ入力、すなわち輝度輪郭信号■とＢ入力、すなわち
色輪郭信号■゛の極性が異なる部分、すなわち非相関時
には加算器８６の出力信号Ｓの振幅はほぼゼロとなり疑
似輪郭が防止される。一方、両者に相関のあるとさはへ
入力とＢ入力を所定係数倍した信号Ｂ゛が互いに加算さ
れ信号Ｓの振幅は元のへ入力、Ｂ入力より大となり輪郭
補正が行われる。FIG. 13 is a block diagram showing a fourth embodiment of the present invention.6 In this embodiment, a logic circuit 82 that responds to two human inputs, A and B.
is composed of two coefficient units 84 and 88 and an adder 86. The coefficient multipliers 84 and 88 are amplifiers whose amplification degree is set to match a predetermined coefficient, and the coefficient of the coefficient multiplier 84 is B.
It is set to a value that amplifies the B input until the input amplitude becomes approximately equal to the input amplitude. The output B' of the coefficient unit 84 is given to the adder 86 and added to the A input, and the sum signal S
is provided to the multiplier 20 via the coefficient unit 88 as an output C′. Since the coefficients of the coefficient unit 84 are set as described above, the output signal S of the adder 86 is The amplitude becomes almost zero and false contours are prevented. On the other hand, if there is a correlation between the two, the signal B' which is obtained by multiplying the input signal and the input signal B by a predetermined coefficient is added together, and the amplitude of the signal S becomes larger than the original input signal and the input signal B, and contour correction is performed.
第１４図、＠１５図は相関時と非相関時の第１３図の実
施例の各部の信号波形を示す図である。このように、本
実施例は極めて簡単な回路構成で疑似輪郭の発生を効果
的に防止することができる。FIGS. 14 and 15 are diagrams showing signal waveforms at various parts of the embodiment of FIG. 13 during correlation and non-correlation. In this way, this embodiment can effectively prevent the occurrence of false contours with an extremely simple circuit configuration.
第１６図は本発明の第５実施例を示すブロック図である
。論理回路６６としては第１図、１８７図、第１１図、
ＰＩｆＪｌａ図の論理回路４０．５０．６２．８２のい
ずれを用いてもよい０本実施例では入力Ｂと論理回路６
６の出力Ｃ°°のうち振幅の大きい方の信号を出力する
絶対値最大値選択回路７０を介して乗算器２０へ出力す
る構成となっている。今までの実施例では、輝度輪郭と
色輪郭の非相関の部分では輪郭補正を行わない構成とし
ているが、本実施例では、絶対値最大値選択回路７０を
追加することによって、非相関部分の補正（ｇ号として
色信号を使用し、相関時には輝度輪郭信号を使用する構
成としている。FIG. 16 is a block diagram showing a fifth embodiment of the present invention. The logic circuit 66 is shown in FIGS. 1, 187, 11,
Any of the logic circuits 40, 50, 62, and 82 in the PIfJla diagram may be used. In this example, input B and logic circuit 6
The output signal is output to the multiplier 20 via an absolute maximum value selection circuit 70 which outputs a signal having a larger amplitude among the outputs C°.6. In the embodiments so far, contour correction is not performed in the uncorrelated portions of the brightness contour and color contour, but in this embodiment, by adding the maximum absolute value selection circuit 70, the uncorrelated portions are corrected. A color signal is used as the correction (g), and a luminance contour signal is used during correlation.
これによって非相関時の補正を行うことができる。This allows correction at the time of non-correlation.
なお、Ｂ入力はノイズ除去回路６８を介してＡａＮ値最
大値選択回路７０へ入力する構成としているが、このノ
イズ除去回路６８はＳ／Ｎ比の悪い色信号を扱うときに
は必要となるが、Ｓ／Ｎ比がさほど悪くない色信号の場
合には不要である。ノイズ除去回路６８としては第１７
図に示す構成のものを用いることができる。The B input is configured to be input to the AaN maximum value selection circuit 70 via the noise removal circuit 68. Although this noise removal circuit 68 is necessary when handling color signals with a poor S/N ratio, the S This is not necessary in the case of a color signal whose /N ratio is not so bad. As the noise removal circuit 68, the 17th
The structure shown in the figure can be used.
第１８図は絶対値最大値選択回路７０の具体的構成の一
例を示すブロック図である。７１は係数器、７２．７４
は最大値選択回路（Ｍ Ａ Ｘ ）、７６．７８は最小
値選択回路（ＭＩＮ）、８０は加算器である。第１９図
はＡ入力とＢ入力が非相関のときの信号波形図である。FIG. 18 is a block diagram showing an example of a specific configuration of the maximum absolute value selection circuit 70. 71 is a coefficient unit, 72.74
is a maximum value selection circuit (M A X ), 76.78 is a minimum value selection circuit (MIN), and 80 is an adder. FIG. 19 is a signal waveform diagram when the A input and B input are uncorrelated.
ここで信号Ｅは乗算５２０の他の入力、すなわち第１図
の遅延回路１９の出力信号である。Here signal E is the other input of multiplier 520, ie the output signal of delay circuit 19 of FIG.
なお、上記各実施例においては、各信号波形は処理回路
により若干の遅延を受けるので、実際にはこれを補償す
る必要があるが、上記説明ではかかる遅延及びその補償
は省略している。又色信号Ｃとしてはベースバンド信号
でも搬送色信号でもよい。In each of the above embodiments, each signal waveform is slightly delayed by the processing circuit, so it is actually necessary to compensate for this, but such delay and its compensation are omitted in the above description. Further, the color signal C may be a baseband signal or a carrier color signal.
なお＃述のように第１図に示したタクマ差号抽出回路９
０は第２０図に示した従来例にも応用できるものであり
、上記実施例の画質改善回路の構成に限られるものでは
ない。In addition, as mentioned in #, the Takuma difference signal extraction circuit 9 shown in FIG.
0 can also be applied to the conventional example shown in FIG. 20, and is not limited to the configuration of the image quality improvement circuit of the above embodiment.
［効果］
以上詳細に説明したところから明らかなように、本発明
の画質改善回路を用いれば輝度信号と色信号の間で相関
性を有さない絵柄の画像であっても疑似輪郭が発生する
ことがない。従って従来上りも輪郭強調量を多くするこ
とができ、より適切な輪郭補正により画質を向上するこ
とができるという特長がある。[Effects] As is clear from the detailed explanation above, if the image quality improvement circuit of the present invention is used, false contours will occur even in images with patterns that have no correlation between the luminance signal and the color signal. Never. Therefore, the conventional method has the advantage that the amount of edge enhancement can be increased in the upstream direction, and the image quality can be improved by more appropriate edge correction.
更に本発明では従来回路のごとく遅延時間補償用の遅延
回路を必要とせず構成が簡単であると共に、差分調整の
範囲を比較的広くとることができるので調整が容易であ
るという特長もある。又、３つのイコライザはすべてオ
ールバスフィルタで構成できるのでＩＣ化に適し、コン
パクト化及びコスト低域に寄与するものである。Further, the present invention has the advantage that it does not require a delay circuit for delay time compensation as in conventional circuits, and has a simple configuration, and that the range of differential adjustment can be relatively wide, making adjustment easy. Furthermore, since all three equalizers can be configured with all-bus filters, they are suitable for IC implementation, contributing to compactness and low cost.
第１図は本発明の画質改善回路の第１の実施例を示すブ
ロック図、第２図、第３図は＃ｔＪ１図の回路の動作を
説明する波形図、第４ａ図、第４ｂ図は第１図のイコラ
イザの特性を示す図、第５ａ図は同イコライザの構成を
示す図、ＰＩＩＪＳｂ図、第５ｃ図は同イコライザの他
の特性を示す図、第６ａ図、第６ｂ図はそれぞれＰｌｆ
Ｊｉ図の位相比較器と選択スイッチ回路の構成例を示す
図、第６ｃ図は第１図中の論理回路の真理値表を示す図
、第７図は本発明の第２実施例の１部を示すブロック図
、第８図、第９図は第７図中の最大値選択回路及び最小
値選択回路の構成をそれぞれ示す図、第１０図は第７図
の論理回路の真理値表を示す図、第１１図は本発明の第
３実施例の要部を示すブロック図、第第２図は第１１図
の論理回路の真理値表を示す図、第１３図は本発明の第
４実施例の要部を示すブロック図、ｔｊＩＪ１４図、第
１５図は第１３図の実施例の動作を説明する波形図、第
１６図は第５実施例の要部を示すブロック図、第１７図
、第１８図はそれぞれ＠１６図中のノイズ除去回路、絶
対値最大値選択回路の構成例を示す図、第１９図は第１
６図の実施例の動作を説明する波形図、第２０図は従来
の画質改善回路を示すブロック図、第２１図、第２２図
、第２３図は第２０図の従来回路の動作を説明する波形
図である。
第２・・・帯域フィルタ ４６・・・遅延回路１７ａ
、１７ｂ、１７ｃ、２６．３０，３８・・・微分回路１
９ａ、 １９ｂ・・・減算器 ２０・・・乗算器２２
．６０．６２．８０，８８・・・加算器 ２４・・・
低域フィルタ２８・・・両波整流回路 ３２・・・リ
ミッタ３６・・・ＡＭ検波回路 ４０．５０，６４，６
Ｂ、８２・・・論理回路４２・・・位相比較器 ４４
・・・電圧比較器４８・・・選択スイッチ ５１．７
１．８４．８８・・・係数器５２．５４．７２．７４・
・・最大値選択回路５３・・・インバータ
５６．５８．７６．７８・・・最小値選択回路６８・・
・ノイズ除去回路
７０・・・絶対値最大値選択回路
９０・・・クロマ差分抽出回路
第
図
ＶＣ相関時
リミッタ出力■
一〇い−
■
ＡＭ検検波
−一／＼−一
■
第４８
図
ｓｃ
周波数
第４ｂ
図
ｓｃ
周波数
第
図
Ｙ、Ｃ非相関時
↑ＳＣ
第６ａ図
第」１
図
第第２図
第
図
第１３
図
第１４図
ＹＩＣ相関時
第１５図
Ｙ、Ｃ非相関時
ＮＦ
Ｃ″−Ｆ−ｍ−、／−
第
図
東ｊｉ［ｔＩ２０へ
第２２
図
第２３図
Ｙ、Ｃ相関時
Ｙ、Ｃ非相関時
第２１
図
［〔コ
昭和
６３年
１１月
日FIG. 1 is a block diagram showing the first embodiment of the image quality improvement circuit of the present invention, FIGS. 2 and 3 are waveform diagrams explaining the operation of the circuit shown in #tJ1, and FIGS. 4a and 4b are FIG. 1 is a diagram showing the characteristics of the equalizer, FIG. 5a is a diagram showing the configuration of the same equalizer, PIIJSb diagram and FIG. 5c are diagrams showing other characteristics of the same equalizer, and FIGS. 6a and 6b are Plf
FIG. 6c is a diagram showing a truth table of the logic circuit in FIG. 1, and FIG. 7 is a part of a second embodiment of the present invention. 8 and 9 are diagrams showing the configurations of the maximum value selection circuit and minimum value selection circuit in FIG. 7, respectively, and FIG. 10 shows the truth table of the logic circuit in FIG. 7. 11 is a block diagram showing the main part of the third embodiment of the present invention, FIG. 2 is a diagram showing the truth table of the logic circuit of FIG. 11, and FIG. 13 is a block diagram showing the main part of the third embodiment of the present invention. A block diagram showing the main part of the example, tjIJ14 diagram, FIG. 15 is a waveform diagram explaining the operation of the embodiment of FIG. 13, FIG. 16 is a block diagram showing the main part of the fifth embodiment, FIG. 17, Figure 18 is a diagram showing a configuration example of the noise removal circuit and the absolute value maximum value selection circuit in Figure @16, respectively, and Figure 19 is a diagram showing the configuration example of the noise removal circuit and the absolute value maximum selection circuit in Figure @16.
6 is a waveform diagram explaining the operation of the embodiment, FIG. 20 is a block diagram showing a conventional image quality improvement circuit, and FIGS. 21, 22, and 23 are explaining the operation of the conventional circuit shown in FIG. 20. FIG. 2nd...Band filter 46...Delay circuit 17a
, 17b, 17c, 26.30, 38... Differential circuit 1
9a, 19b...subtractor 20...multiplier 22
．． 60.62.80,88... Adder 24...
Low-pass filter 28...Double-wave rectifier circuit 32...Limiter 36...AM detection circuit 40.50, 64, 6
B, 82...Logic circuit 42...Phase comparator 44
...Voltage comparator 48...Selection switch 51.7
1.84.88... Coefficient unit 52.54.72.74.
...Maximum value selection circuit 53...Inverter 56.58.76.78...Minimum value selection circuit 68...
・Noise removal circuit 70...Absolute value maximum value selection circuit 90...Chroma difference extraction circuit Fig. VC correlation limiter output ■ 10 - ■ AM detection -1/\-1 ■ Fig. 48 sc Frequency Fig. 4b Fig. sc Frequency chart Y, C uncorrelated ↑ SC Fig. 6a Fig. 1 Fig. 2 Fig. 13 Fig. 14 YIC correlated Fig. 15 Y, C uncorrelated NF C''- F-m-, /- Fig. East ji [To tI20 Fig. 22 Fig. 23 When Y, C are correlated Y, C when uncorrelated Fig. 21 [〔November 1988
Claims (4)
これを構成する色信号を微分して画像中の輪郭を表示す
る信号を作る第１手段と、前記複合カラーテレビジョン
信号から分離された又はこれを構成する輝度信号から画
像中の輪郭を表示する信号を作る第２手段と、前記第１
手段と第２手段からの出力信号を乗算する手段と、前記
乗算する手段の出力信号に前記色信号を加算する手段と
からなる画質改善回路において、前記第１手段が縦列に
接続された第１、第２、第３のイコライザと、第１と第
２の減算器を有し、前記色信号が前記第１のイコライザ
の入力と、前記第１の減算器の第１の入力に与えられ、
前記第２のイコライザの出力信号が前記第１の減算器の
第２の入力と前記第３のイコライザの入力に与えられ、
前記第１のイコライザの出力が前記第２のイコライザの
入力と前記第２の減算器の第１の入力に与えられ、前記
第３のイコライザの出力が前記第２の減算器の第２の入
力に与えられる構成とし、前記第２の減算器の出力を前
記第１手段の出力信号として前記乗算する手段に与える
構成とし、前記第１手段の前記第１の減算器の出力信号
を検波した後微分する第３手段を設け、前記第２手段か
らの信号と前記第１の減算器の出力信号に応答し、両信
号の極性が同一のときは前記第２手段からの信号を出力
し、一方両信号の極性が同一でないときは前記第２手段
からの信号の振幅より小さい振幅の信号を出力する第４
手段を前記第２手段と前記乗算する手段の間に設け、前
記第４手段の出力信号を前記乗算する手段に供給して前
記第１手段の前記第２の減算器からの出力信号と乗算す
る構成としたことを特徴とする画質改善回路。(1) a first means for differentiating a color signal separated from or constituting the composite color television signal to produce a signal for displaying an outline in an image; a second means for generating a signal for displaying an outline in an image from a luminance signal constituting the first means;
and means for multiplying an output signal from the second means, and means for adding the color signal to the output signal of the multiplication means, wherein the first means is connected to a first , comprising second and third equalizers and first and second subtracters, the color signal being applied to an input of the first equalizer and a first input of the first subtractor,
an output signal of the second equalizer is provided to a second input of the first subtracter and an input of the third equalizer;
An output of the first equalizer is provided to an input of the second equalizer and a first input of the second subtracter, and an output of the third equalizer is provided to a second input of the second subtracter. and the output of the second subtracter is given to the multiplying means as an output signal of the first means, and after detecting the output signal of the first subtracter of the first means. third means for differentiating is provided, responsive to the signal from the second means and the output signal of the first subtracter, outputting the signal from the second means when the polarities of both signals are the same; a fourth means for outputting a signal having an amplitude smaller than the amplitude of the signal from the second means when the polarities of both signals are not the same;
means is provided between the second means and the multiplying means, and the output signal of the fourth means is supplied to the multiplying means to be multiplied by the output signal from the second subtracter of the first means. An image quality improvement circuit characterized by having the following configuration.
これを構成する色信号を微分して画像中の輪郭を表示す
る信号を作る第１手段と、前記複合カラーテレビジョン
信号から分離された又はこれを構成する輝度信号から画
像中の輪郭を表示する信号を作る第２手段と、前記第１
手段と第２手段からの出力信号を乗算する手段と、前記
乗算する手段の出力信号に前記色信号を加算する手段と
からなる画質改善回路において、前記第１手段が縦列に
接続された第１、第２、第３のイコライザと、第１と第
２の減算器を有し、前記色信号が前記第１のイコライザ
の入力と、前記第１の減算器の第１の入力に与えられ、
前記第２のイコライザの出力信号が前記第１の減算器の
第２の入力と前記第３のイコライザの入力に与えられ、
前記第１のイコライザの出力が前記第２のイコライザの
入力と前記第２の減算器の第１の入力に与えられ、前記
第３のイコライザの出力が前記第２の減算器の第２の入
力に与えられる構成とし、前記第２の減算器の出力を前
記第１手段の出力信号として前記乗算する手段に与える
構成とし、前記第１手段の前記第１の減算器の出力信号
を検波した後微分する第３手段を設け、前記第２手段か
らの信号と前記第１の減算器の出力信号に応答し、両信
号の極性が同一のときは前記第２手段からの信号を出力
し、一方両信号の極性が同一でないときは前記第２手段
からの信号の振幅より小さい振幅の信号を出力する第４
手段を設け、前記第３手段の出力信号と前記第４手段の
出力信号に応答し、両信号中の振幅の大きい方の信号を
選択して出力する第５手段を設け、前記第５手段の出力
信号を前記乗算する手段に供給して前記第１手段の前記
第２の減算器からの出力信号と乗算する構成としたこと
を特徴とする画質改善回路。(2) a first means for differentiating a color signal separated from or constituting the composite color television signal to produce a signal for displaying an outline in an image; a second means for generating a signal for displaying an outline in an image from a luminance signal constituting the first means;
and means for multiplying an output signal from the second means, and means for adding the color signal to the output signal of the multiplication means, wherein the first means is connected to a first , comprising second and third equalizers and first and second subtracters, the color signal being applied to an input of the first equalizer and a first input of the first subtractor,
an output signal of the second equalizer is provided to a second input of the first subtracter and an input of the third equalizer;
An output of the first equalizer is provided to an input of the second equalizer and a first input of the second subtracter, and an output of the third equalizer is provided to a second input of the second subtracter. and the output of the second subtracter is given to the multiplying means as an output signal of the first means, and after detecting the output signal of the first subtracter of the first means. third means for differentiating is provided, responsive to the signal from the second means and the output signal of the first subtracter, outputting the signal from the second means when the polarities of both signals are the same; a fourth means for outputting a signal having an amplitude smaller than the amplitude of the signal from the second means when the polarities of both signals are not the same;
further comprising a fifth means for responding to the output signal of the third means and the output signal of the fourth means and selecting and outputting a signal having a larger amplitude among both signals; An image quality improvement circuit characterized in that the output signal is supplied to the multiplication means and multiplied by the output signal from the second subtracter of the first means.
これを構成する色信号を微分して画像中の輪郭を表示す
る信号を作る第１手段と、前記複合カラーテレビジョン
信号から分離された又はこれを構成する輝度信号から画
像中の輪郭を表示する信号を作る第２手段と、前記第１
手段と第２手段からの出力信号を乗算する手段と、前記
乗算する手段の出力信号に前記色信号を加算する手段と
からなる画質改善回路において、前記第１手段が縦列に
後続された第１、第２、第３のイコライザと、第１と第
２の減算器を有し、前記色信号が前記第１のイコライザ
の入力と、前記第１の減算器の第１の入力に与えられ、
前記第２のイコライザの出力信号が前記第１の減算器の
第２の入力と前記第３のイコライザの入力に与えられ、
前記第１のイコライザの出力が前記第２のイコライザの
入力と前記第２の減算器の第１の入力に与えられ、前記
第３のイコライザの出力が前記第２の減算器の第２の入
力に与えられる構成とし、前記第２の減算器の出力を前
記第１手段の出力信号として前記乗算する手段に与える
構成とし、前記第１手段の前記第１の減算器の出力信号
を検波した後微分する第３手段と、前記第３手段からの
信号を所定の増幅度で増幅する係数器と、前記係数器の
出力信号を前記第２手段からの信号に加算する加算器を
設け、前記加算器の出力信号を前記乗算する手段に供給
して前記第１手段の前記第２の減算器からの出力信号と
乗算する構成としたことを特徴とする画質改善回路。(3) a first means for differentiating a color signal separated from or constituting the composite color television signal to produce a signal for displaying an outline in an image; a second means for generating a signal for displaying an outline in an image from a luminance signal constituting the first means;
an image quality improvement circuit comprising: means for multiplying an output signal from a second means; and means for adding the color signal to the output signal of the multiplication means; , comprising second and third equalizers and first and second subtracters, the color signal being applied to an input of the first equalizer and a first input of the first subtractor,
an output signal of the second equalizer is provided to a second input of the first subtracter and an input of the third equalizer;
An output of the first equalizer is provided to an input of the second equalizer and a first input of the second subtracter, and an output of the third equalizer is provided to a second input of the second subtracter. and the output of the second subtracter is given to the multiplying means as an output signal of the first means, and after detecting the output signal of the first subtracter of the first means. a third means for differentiating, a coefficient multiplier for amplifying the signal from the third means with a predetermined amplification degree, and an adder for adding the output signal of the coefficient multiplier to the signal from the second means; 1. An image quality improvement circuit characterized in that the output signal of the subtracter is supplied to the multiplier and multiplied by the output signal from the second subtracter of the first means.
これを構成する色信号を微分して画像中の輪郭を表示す
る信号を作るクロマ差分抽出回路において、前記クロマ
差分抽出回路が縦列に接続された第１、第２、第３のイ
コライザと、第１と第２の減算器を有し、前記色信号が
前記第１のイコライザの入力と、前記第１の減算器の第
１の入力に与えられ、前記第２のイコライザの出力信号
が前記第１の減算器の第２の入力と前記第３のイコライ
ザの入力に与えられ、前記第１のイコライザの出力が前
記第２のイコライザの入力と前記第２の減算器の第１の
入力に与えられ、前記第３のイコライザの出力が前記第
２の減算器の第２の入力に与えられる構成としとことを
特徴とするクロマ差分抽出回路。(4) In a chroma difference extraction circuit for differentiating color signals separated from or constituting a composite color television signal to generate a signal for displaying an outline in an image, the chroma difference extraction circuits are connected in series. the color signal is applied to an input of the first equalizer and a first input of the first subtractor; an output signal of the second equalizer is applied to a second input of the first subtracter and an input of the third equalizer, and an output of the first equalizer is applied to an input of the second equalizer. A chroma difference extraction circuit characterized in that the chroma difference extraction circuit is configured such that a first input of the second subtractor is supplied, and an output of the third equalizer is supplied to a second input of the second subtractor.
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63156089A JPH0683464B2 (en) | 1988-06-24 | 1988-06-24 | Image quality improvement circuit and chroma difference extraction circuit |
| DE68919431T DE68919431T2 (en) | 1988-04-30 | 1989-04-27 | Circuit to improve the picture quality. |
| EP89107704A EP0340648B1 (en) | 1988-04-30 | 1989-04-27 | Picture-quality improving circuit |
| US07/344,874 US5038206A (en) | 1988-04-30 | 1989-04-28 | Picture-quality improving circuit |
| KR1019890005787A KR920002543B1 (en) | 1988-04-30 | 1989-04-29 | Picture-quality improving circuit |
| US07/561,650 US5053865A (en) | 1988-04-30 | 1990-08-02 | Picture-quality improving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63156089A JPH0683464B2 (en) | 1988-06-24 | 1988-06-24 | Image quality improvement circuit and chroma difference extraction circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH025693A true JPH025693A (en) | 1990-01-10 |
| JPH0683464B2 JPH0683464B2 (en) | 1994-10-19 |
Family
ID=15620066
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63156089A Expired - Lifetime JPH0683464B2 (en) | 1988-04-30 | 1988-06-24 | Image quality improvement circuit and chroma difference extraction circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0683464B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5205349A (en) * | 1991-05-23 | 1993-04-27 | Zexel Corporation | Heat exchanger bracket mounting structure |
| US5404180A (en) * | 1992-04-09 | 1995-04-04 | Mitsubishi Electric Engineering Company Limited | Waveform shaping method, waveform shaping apparatus and apparatus for correcting contour of carrier chrominance signal |
-
1988
- 1988-06-24 JP JP63156089A patent/JPH0683464B2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5205349A (en) * | 1991-05-23 | 1993-04-27 | Zexel Corporation | Heat exchanger bracket mounting structure |
| US5404180A (en) * | 1992-04-09 | 1995-04-04 | Mitsubishi Electric Engineering Company Limited | Waveform shaping method, waveform shaping apparatus and apparatus for correcting contour of carrier chrominance signal |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0683464B2 (en) | 1994-10-19 |
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