JPH025312B2 - - Google Patents
Info
- Publication number
- JPH025312B2 JPH025312B2 JP13203181A JP13203181A JPH025312B2 JP H025312 B2 JPH025312 B2 JP H025312B2 JP 13203181 A JP13203181 A JP 13203181A JP 13203181 A JP13203181 A JP 13203181A JP H025312 B2 JPH025312 B2 JP H025312B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- light
- wiring pattern
- reflected light
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000007547 defect Effects 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 19
- 238000007689 inspection Methods 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 15
- 230000001678 irradiating effect Effects 0.000 claims description 10
- 230000003287 optical effect Effects 0.000 claims description 6
- 238000002845 discoloration Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 238000012795 verification Methods 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000000605 extraction Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 238000003384 imaging method Methods 0.000 description 3
- 230000002950 deficient Effects 0.000 description 2
- 239000011888 foil Substances 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000011179 visual inspection Methods 0.000 description 1
Landscapes
- Length Measuring Devices By Optical Means (AREA)
- Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
Description
【発明の詳細な説明】
本発明は、印刷配線板に形成された配線パター
ン（以下、回路パターンと云うこともある）の欠
陥を検査する方法および装置に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method and apparatus for inspecting a wiring pattern (hereinafter also referred to as a circuit pattern) formed on a printed wiring board for defects.
一般的な印刷配線板の外観、構造を第１図、第
２図に示すが、第１図は印刷配線板１の配線面２
と３のうち２から見た平面図であり、第２図は第
１図におけるＡ−A′線に沿つた断面図である。
これら図に於て、４，５は銅等の導体箔からなる
配線パターン、６は裏の配線面３との間で電気的
接続を行なうためのスルーホール、７は絶縁基
材、１３，１４はグランド層、電源層として使わ
れる内層パターンで、配線パターン４，５と同じ
く、銅等の導体箔からなるものである。第１図に
示す配線パターンは、一般に第１図の４，５等で
示すパターンを、写真原版（マスク）によりエツ
チングレジストパターンとして銅箔上に写しと
り、これをエツチング処理することにより形成さ
れる。この形成過程で、写真原版にゴミが付着し
たり、写真原版に傷が生じたりするとパターンの
微小付着８、微小欠け９、微小突起１０が生じ、
エツチング不足ではパターンの太り１１が生じ、
エツチング過多ではパターンの細り１２が生じ
る。これらの欠陥があると、微小欠け９、細り１
２では回路抵抗増、電流容量減、印刷配線板取扱
い時の接触程度で断線する等、微小付着８、微小
突起１０、太り１１では、回路の短絡、半田付け
時の半田ブリツジが発生する等、印刷配線板本来
の正しい配線路を構成することができなくなつて
しまう。これらの欠陥は、特に最近のように高密
度実装が徹底して行なわれ、例えば、パターン巾
が0.1mm程度になつてくると、わずかな欠陥があ
つても正確に見逃すことなく検査されなければな
らず、もはや目視検査では不可能である。従つて
かような検査を機械で行なわせようとするため
に、第３図に示す如く、例えば被検査印刷配線板
１と、別に設けられた比較照合用印刷配線板１′
との各々の配線面からの反射光を光学像として捕
え比較照合する方法がある。以下にこの従来方法
について説明する。なお第３図は、従来の印刷配
線板の回路パターン検査装置を示す模式図であ
る。 The appearance and structure of a general printed wiring board are shown in Figs. 1 and 2. Fig. 1 shows the wiring surface 2 of the printed wiring board 1.
2 is a plan view seen from 2 of 3, and FIG. 2 is a sectional view taken along the line A-A' in FIG.
In these figures, 4 and 5 are wiring patterns made of conductive foil such as copper, 6 is a through hole for electrical connection with the back wiring surface 3, 7 is an insulating base material, 13, 14 is an inner layer pattern used as a ground layer and a power supply layer, and like the wiring patterns 4 and 5, it is made of conductive foil such as copper. The wiring pattern shown in Fig. 1 is generally formed by copying the patterns shown by 4, 5, etc. in Fig. 1 onto copper foil as an etching resist pattern using a photographic master plate (mask), and then etching this. . During this formation process, if dust adheres to the photographic original plate or scratches occur on the photographic original plate, minute adhesion 8, minute chipping 9, minute protrusion 10 of the pattern will occur.
Insufficient etching will cause the pattern to become thick 11,
Excessive etching causes thinning of the pattern 12. If these defects exist, microchips 9, thinning 1
In case 2, circuit resistance increases, current capacity decreases, and wires break due to contact when handling the printed wiring board, etc. In case of minute adhesion 8, minute protrusion 10, and thickness 11, circuit short circuit, solder bridging occurs during soldering, etc. It becomes impossible to construct the correct wiring path that the printed wiring board should have. These defects must be inspected accurately and without missing even the slightest defects, especially as high-density packaging has become more thorough these days, for example, with pattern widths of around 0.1 mm. visual inspection is no longer possible. Therefore, in order to perform such an inspection by machine, as shown in FIG.
There is a method of capturing and comparing the reflected light from each wiring surface as an optical image. This conventional method will be explained below. Note that FIG. 3 is a schematic diagram showing a conventional printed wiring board circuit pattern inspection apparatus.
第３図に於いて、電気信号比較照合装置２７を
除き、同じ構成のものが左右に配置されており、
左側（被検査印刷配線板側）の各部分に対応する
右側の各部分には同一符号でダツシユを付したも
のが付してある。従つて、右側の各部分の機能、
動作の説明は、左側の各部分の機能動作の説明中
の符号にダツシユを付加して代えられるものであ
るので、左側の説明のみを代表として行なう。さ
て印刷配線板１の配線面２の上方には側方から与
えられる光源２１の光を反射して配線面２に照射
し、該配線面２からの反射光を上方へ通過せしめ
るハーフミラー２３と、該ミラー２３から上方に
通過した光を集め光学像を結ぶレンズ２４と該光
学像が結ばれる位置に、該像の明暗を多数の電気
信号２６に変換するイメージセンサ２５が設けら
れており、左側のイメージセンサ２５から得られ
る電気信号２６と右側のイメージセンサ２５′か
ら得られる電気信号２６′とを配線パターンとし
て認識し、比較照合する比較照合装置２７が設け
られており、この比較照合装置２７により、欠隔
部分の有無内至欠陥箇所の指摘がなされる。例え
ば、第４図ａに示す如き断面構造をもつ印刷配線
板を検査する場合、第３図の光源２１から出た光
はレンズ２２を通して、ミラー２３で下方に向き
を変えられ、第４図ａの光源３１，３２，３３と
して印刷配線板１の配線面２の各部分に照射され
る。光源３１は絶縁基材７の低反射率により低レ
ベルの反射光４１を生じ、光線３２は銅等の金属
でなる配線パターン５の高反射率により高レベル
の反射光４２を生じ、光線３３はスルーホール６
即ち貫通孔を通して裏の配線面３に通過するため
反射光は生じない。このようにして上方に反射さ
れた光線４１，４２は、第３図のハーフミラー２
３、レンズ２４を介してイメージセンサ２５上に
光学像として結ばれる。イメージセンサ２５は多
数の微小受光素子を一直線上に配列したもので、
例えば13mmの長さに1024ケの素子を並べたもの等
がある。第４図ｂはかようなイメージセンサ２５
面に第４図ａの前記反射光４１，４２が像形成さ
れた時現われる電気信号を、全受光素子について
プロツトしたものであり、縦軸に電気信号レベル
Ｉをとり、横軸にイメージセンサの素子位置を示
してある。同図に於いて、I1は貫通孔位置の電気
信号レベルを示し、配線面２からの反射光が殆ど
ないため低レベルである。I2は、絶縁基材７から
の反射光４１が電気信号に変換されたもので、I1
よりは高いがやはり低レベルである。I3は、配線
パターン５からの反射光４２が電気信号に変換さ
れたもので高レベルである。かような各種レベル
を比較照合し易くするために、明レベルと暗レベ
ルの２種、即ち２値に変換する必要がある。この
ため第４図ｂに示す如く、電気信号レベルがしき
い値レベルISより高いときを明レベル、それ以下
を暗レベルとするように例えば電圧比較器からな
る２値化回路２８により変換を行なうと、配線パ
ターン５は明レベル（２進“１”）、絶縁基材７、
スルーホール６は暗レベル（２進“０”）の２値
信号に変換される。この様にして得られた２値信
号はイメージセンサ２５の受光面が線形であるた
め、線情報（第１図のパターンをＡ−A′線で見
たような線状の情報）となつている。従つて、印
刷配線板を該配線面に沿つて平行移動し乍ら、前
記２値信号をメモリ２９に記憶して行くことによ
り、該メモリ２９に面情報が得られる。しかる後
該メモリ２９に記憶された左右２組の面情報を、
パターン比較回路３０で比較照合し、一致しない
部分を欠陥として表示する。 In FIG. 3, devices with the same configuration are placed on the left and right, except for the electric signal comparison and verification device 27.
Each part on the right side corresponding to each part on the left side (on the side of the printed wiring board to be inspected) is labeled with the same reference numeral and a dash. Therefore, the functions of each part on the right,
The explanation of the operation can be replaced by adding a dash to the reference numerals in the description of the function and operation of each part on the left side, so only the explanation on the left side will be given as a representative. Now, above the wiring surface 2 of the printed wiring board 1, there is a half mirror 23 that reflects the light from the light source 21 applied from the side and irradiates it onto the wiring surface 2, and allows the reflected light from the wiring surface 2 to pass upward. , a lens 24 that collects the light passing upward from the mirror 23 and forms an optical image, and an image sensor 25 that converts the brightness of the image into a large number of electrical signals 26 at the position where the optical image is formed. A comparison and verification device 27 is provided which recognizes and compares and compares the electrical signal 26 obtained from the left image sensor 25 and the electrical signal 26' obtained from the right image sensor 25' as wiring patterns. 27, the presence or absence of the gap portion and the defective location are pointed out. For example, when inspecting a printed wiring board having a cross-sectional structure as shown in FIG. 4a, the light emitted from the light source 21 in FIG. The light sources 31, 32, and 33 irradiate each portion of the wiring surface 2 of the printed wiring board 1. The light source 31 generates a low level of reflected light 41 due to the low reflectance of the insulating base material 7, the light ray 32 generates a high level of reflected light 42 due to the high reflectance of the wiring pattern 5 made of metal such as copper, and the light ray 33 Through hole 6
That is, since the light passes through the through hole to the wiring surface 3 on the back, no reflected light is generated. The light rays 41 and 42 reflected upward in this way are reflected by the half mirror 2 in FIG.
3. The image is formed as an optical image on the image sensor 25 via the lens 24. The image sensor 25 is composed of a large number of microscopic light-receiving elements arranged in a straight line.
For example, there is one in which 1024 elements are lined up in a length of 13 mm. Figure 4b shows such an image sensor 25.
The electric signals that appear when the reflected lights 41 and 42 of FIG. 4a are formed on the surface are plotted for all light receiving elements, with the electric signal level I on the vertical axis and the image sensor level on the horizontal axis. Element positions are shown. In the figure, I 1 indicates the electrical signal level at the through hole position, which is at a low level because there is almost no reflected light from the wiring surface 2. I 2 is the reflected light 41 from the insulating base material 7 converted into an electrical signal, and I 1
Although it is higher than that, it is still at a low level. I 3 is the reflected light 42 from the wiring pattern 5 converted into an electrical signal and is at a high level. In order to facilitate comparison and verification of these various levels, it is necessary to convert them into two types, a bright level and a dark level, that is, into binary values. For this reason, as shown in FIG. 4b, conversion is performed by a binarization circuit 28 consisting of a voltage comparator, for example, so that when the electric signal level is higher than the threshold level I S , it is a bright level, and when it is lower than that, it is a dark level. When this is done, the wiring pattern 5 is at a bright level (binary "1"), the insulating base material 7,
The through hole 6 is converted into a binary signal at a dark level (binary "0"). Since the light-receiving surface of the image sensor 25 is linear, the binary signal obtained in this way becomes line information (linear information such as when the pattern in Fig. 1 is viewed along line A-A'). There is. Therefore, surface information can be obtained in the memory 29 by storing the binary signals in the memory 29 while moving the printed wiring board in parallel along the wiring surface. After that, the two sets of left and right surface information stored in the memory 29 are
A pattern comparison circuit 30 compares and verifies the patterns, and displays a portion that does not match as a defect.
以上に説明した様な従来の検査装置によれば第
５図ａに示すごとく配線パターン４，５の表面に
変色或いは汚れ１５が存在した場合、第４図ｂに
見られる如き、その部分の入射光３４に対する反
射光４４は極端に弱くなり、第５図ｃに示すごと
く、イメージセンサの全受光素子についてプロツ
トした電気信号レベルでは上記配線面２のＢ−
B′断面の変色、汚れ１５に対応する部分の電気
信号レベルが低レベルI3になり、２値化回路２８
によつて、本来明レベルに変換されるべきものが
暗レベルに変換されることになり、単なる配線パ
ターンの変色や汚れであるにもかかわらず、欠陥
と見誤る判定が下される結果となる。それ故に従
来の検査装置のごとき配線面からの反射光をとら
えて配線パターンの欠陥を検出する構成に於いて
は、欠陥でもないのに欠陥と誤判定するという問
題があつた。 According to the conventional inspection apparatus as described above, when there is discoloration or dirt 15 on the surface of the wiring patterns 4 and 5 as shown in FIG. 5a, the incident on that part as shown in FIG. The reflected light 44 with respect to the light 34 becomes extremely weak, and as shown in FIG.
The electric signal level of the part corresponding to the discoloration and dirt 15 on the cross section B' becomes low level I3 , and the binarization circuit 28
As a result, what should originally be converted to a bright level is converted to a dark level, and even though it is simply a discolored or dirty wiring pattern, it is mistakenly judged as a defect. . Therefore, in a conventional inspection device configured to detect a defect in a wiring pattern by capturing reflected light from a wiring surface, there is a problem in that a defect is incorrectly determined even though it is not a defect.
本発明の目的とするところは上記欠点を除去
し、配線パターンの変色、汚れ等の疑似欠陥を真
の欠陥と区別し、真の欠陥のみを欠陥として検出
することのできる印刷配線板のパターン検査方法
および装置を提供することにある。 The purpose of the present invention is to perform pattern inspection of printed wiring boards that eliminates the above-mentioned defects, distinguishes false defects such as discoloration and dirt from wiring patterns from true defects, and detects only true defects as defects. An object of the present invention is to provide a method and apparatus.
本発明の要点は、標準となる印刷配線板の回路
パターンに対して輝線状の光を照射し、その反射
光像から回路パターンの形状を、少なくも配線板
の絶縁基材面と導体からなる回路パターン面との
相対的高さ位置のずれを明確に識別しながら認識
して記憶しておき、被検査対象となる印刷配線板
の回路パターンに対しても同様の操作をほどこし
てその形状を同様に認識、記憶しておき、両記憶
内容を比較することにより被検査対象の回路パタ
ーンの欠陥を検出するようにした点にある。 The key point of the present invention is to irradiate a circuit pattern of a standard printed wiring board with bright line-shaped light, and from the reflected light image, determine the shape of the circuit pattern, which consists of at least the insulating base material surface of the wiring board and the conductor. The deviation in height position relative to the circuit pattern surface is clearly identified and memorized, and the same operation is performed on the circuit pattern of the printed wiring board to be inspected to determine its shape. The defect in the circuit pattern to be inspected can be detected by similarly recognizing and storing the data and comparing the stored contents.
次に図を参照して本発明の実施例を説明する。
第６図は本発明の一実施例を示す模式図である。 Next, embodiments of the present invention will be described with reference to the drawings.
FIG. 6 is a schematic diagram showing an embodiment of the present invention.
第６図に於いて５１，５１′は光源、５２，５
２′はレンズ、５４，５４′はハーフミラーであ
り、５３，５３′は配線面２，２′にスリツト光
（輝線状の光）を照射するためのスリツトである。
ただし光源５１，５１′、レンズ５２，５２′、ス
リツト５３，５３′、ハーフミラー５４，５４′の
構成はこの場合、配線面２に対して上方からスリ
ツト光を照射するための配置をとるものとして示
したもので、その照射方向は上方からに制限され
るものではない。またスリツト光を照射するとい
う目的を別の手段、例えばプリズムや鏡を使用し
て達成可能ならばそれでも良い。５５，５５′は
カメラ５６，５６′上に結像するためのレンズ、
５６，５６′はカメラである。このカメラは第３
図に示した線形のイメージセンサ２５と印刷配線
板の平行移動あるいはイメージセンサ２５そのも
のの平行移動によつても代用可能であるし受光面
が面状である別のイメージセンサで代用すること
もできる。５７，５７′はスリツト光による配線
面の切断線抽出回路であり、５８，５８′は該切
断線抽出回路５７，５７′から出力される電気信
号である。他の部分２７，２８，２８′，２９，
３０は第３図の同一符号部分と同じものであるた
め、ここでの説明は省略する。第７図は第６図に
おける要部の構成を判り易く示した斜視図であ
り、これを用いてその動作を説明する。なお第６
図に於いて同一符号はダツシユを付したものの構
成は、付してないものの構成と同じであり、その
機能動作もダツシユの付加していないものと同じ
であるため第７図では説明を省略する。 In Fig. 6, 51, 51' are light sources, 52, 5
2' is a lens, 54, 54' are half mirrors, and 53, 53' are slits for irradiating slit light (bright line-shaped light) onto the wiring surfaces 2, 2'.
However, in this case, the light sources 51, 51', lenses 52, 52', slits 53, 53', and half mirrors 54, 54' are arranged to irradiate the wiring surface 2 with slit light from above. The irradiation direction is not limited to from above. Further, if the purpose of irradiating the slit light can be achieved by using another means, such as a prism or a mirror, that is fine. 55, 55' are lenses for forming images on cameras 56, 56';
56, 56' are cameras. This camera is the third
It can be replaced by parallel movement of the linear image sensor 25 and the printed wiring board shown in the figure, or by parallel movement of the image sensor 25 itself, or it can be replaced by another image sensor whose light-receiving surface is planar. . Reference numerals 57 and 57' designate cutting line extraction circuits for the wiring surface using slit light, and reference numerals 58 and 58' designate electrical signals output from the cutting line extraction circuits 57 and 57'. Other parts 27, 28, 28', 29,
Since 30 is the same as the part with the same reference numeral in FIG. 3, the explanation here will be omitted. FIG. 7 is a perspective view clearly showing the configuration of the main parts in FIG. 6, and its operation will be explained using this. Furthermore, the sixth
In the figure, the same reference numerals have the same numbers as the ones without the dashes, and their functions and operations are the same as those without the dashes, so explanations are omitted in Figure 7. .
さて第７図において、光源５１から出た光はレ
ンズ５２、スリツト５３を通過してスリツト光
（輝線状の光）になつた後、ハーフミラー５４に
よつて印刷配線板１の配線面２の上方から照射さ
れる。従つて、スリツト光の明線１６は配線面２
の配線パターン５の面と絶縁基材７の面により構
成される段違い的な凹凸に従つた位置に存在し、
この明線１６を斜方から、結像レンズ５５を介し
てカメラ５６でとらえると配線パターン５の面上
の明線１６とそれより一段低い位置にある絶縁基
材７の面上の明線１６とは段差を生じた不連続な
明線としてとらえられる。カメラ５６にとらえら
れる配線パターン５の面上の該明線１６は、スリ
ツト光が明暗の強いコントラストを構成する輝線
であるため、配線パターンの変色、汚れには殆ん
ど影響されることなしに、確実に検出されるもの
である。従つて第５図ａと同様な図である第８図
ａの配線面２に於ける配線パターンの変色、汚れ
１５を含むＢ−B′線上に明線１６が存在すると
し、これを第７図に示したごとき構成のカメラ５
６でとらえると、第８図ｃに示したごとき第８図
ｂの断面図に示す配線面２の凹凸状況を忠実に表
わした画像が得られる。第８図ｃに示した不連続
な横線は、スリツト光の明線を示し、レンズL1
に相当するのが配線パターン５の面を示す明線で
あり、レベルL2に相当するのが絶縁基材７の面
を示す明線であり、レンズL3に相当するのがス
ルーホール６を示す明線である。ここでカメラの
ラスタスキヤン方向に明レンズの頻度分布をとる
と第８図ｄに示すような頻度分布が得られる。す
なわち本ｄ図に於いて、レンズL1に相当する明
線の出現する頻度の山と、レンズL2に相当する
明線の出現する頻度の山の間にしきい値レベルIS
を設け、それ以上のレンズの信号を配線パターン
を表わす信号とすれば、スリツト光が存在した第
８図ａの配線面２におけるＢ−B′線上の配線パ
ターン位置を正確に定義づけることができる。こ
のことから、スリツト光を第８図ａに示した配線
面２上の全面に設け、これをカメラ５６でとらえ
れば、配線面２の配線パターンを正確に得ること
ができる。 Now, in FIG. 7, the light emitted from the light source 51 passes through a lens 52 and a slit 53 to become slit light (bright line-shaped light), and then is applied to the wiring surface 2 of the printed wiring board 1 by a half mirror 54. Illuminated from above. Therefore, the bright line 16 of the slit light is on the wiring surface 2.
exists at a position following the unevenness formed by the surface of the wiring pattern 5 and the surface of the insulating base material 7,
When this bright line 16 is captured obliquely by the camera 56 through the imaging lens 55, the bright line 16 on the surface of the wiring pattern 5 and the bright line 16 on the surface of the insulating base material 7 located one level lower than the bright line 16 are captured by the camera 56 through the imaging lens 55. can be seen as a discontinuous bright line with steps. The bright line 16 on the surface of the wiring pattern 5 captured by the camera 56 is a bright line in which the slit light forms a strong contrast between light and dark, so it is hardly affected by discoloration or dirt on the wiring pattern. , which can be reliably detected. Therefore, it is assumed that a bright line 16 exists on the line B-B' including the discoloration and dirt 15 of the wiring pattern on the wiring surface 2 of FIG. 8a, which is a similar view to FIG. Camera 5 configured as shown in the figure
6, an image as shown in FIG. 8c is obtained that faithfully represents the unevenness of the wiring surface 2 shown in the cross-sectional view of FIG. 8b. The discontinuous horizontal line shown in Figure 8c indicates the bright line of the slit light, and the lens L 1
The line corresponding to the level L2 is the bright line indicating the surface of the wiring pattern 5, the line corresponding to the level L2 is the bright line indicating the surface of the insulating base material 7, and the line corresponding to the lens L3 is the line indicating the surface of the through hole 6. This is the bright line shown. If the frequency distribution of the bright lens is taken in the raster scan direction of the camera, a frequency distribution as shown in FIG. 8d is obtained. In other words, in this figure d, there is a threshold level I
If a signal from a lens beyond that is used as a signal representing the wiring pattern, it is possible to accurately define the position of the wiring pattern on the line B-B' on the wiring surface 2 of FIG. 8a where the slit light was present. . Therefore, if the slit light is provided over the entire surface of the wiring surface 2 shown in FIG. 8a and captured by the camera 56, the wiring pattern on the wiring surface 2 can be accurately obtained.
本発明によれば、配線パターンの変色、汚れに
影響を受けず、正確に配線パターンの形状を検出
することが可能であるが、反射光による従来の検
査方法に比べ、スリツト光を用いる本発明の検査
方法は検出速度が非常に遅いので配線パターン全
面を検査する方法としては不向きな場合もあるの
で、そのときは反射光による従来の方法と併用す
るのがよい。すなわち、先ず従来の反射光による
検査方法を実施し、その結果、欠陥有と判定され
た配線パターンについてのみ、本発明によるスリ
ツト光を用いた検査方法を実施し、それが単なる
変色や汚れでなく、本当の欠陥であるか否かを調
べるのがよい。 According to the present invention, it is possible to accurately detect the shape of a wiring pattern without being affected by discoloration or dirt on the wiring pattern. However, compared to the conventional inspection method using reflected light, the present invention using slit light Since the detection speed of the above inspection method is very slow, it may not be suitable as a method for inspecting the entire wiring pattern, so in that case, it is better to use it together with the conventional method using reflected light. That is, first, a conventional inspection method using reflected light is carried out, and only for those wiring patterns that are determined to have defects, the inspection method using slit light according to the present invention is carried out to confirm that the defects are not simply discolored or dirty. , it is better to check whether it is a real defect or not.
このような場合、検査装置としては、第３図に
示した如き従来装置と第６図に示した如き本発明
による装置との双方を備えれば問題はないが、両
装置は相互に共通した部分が多いので、一方の一
部を省略して他方のそれで兼用することもでき
る。例えば、第６図における光源５１，５１′、
レンズ５２，５２′、ハーフミラー５４，５４′等
は第３図における光源２１，２１′、レンズ２２，
２２′、ハーフミラー２３，２３′と兼用でもよ
く、この場合には、光源からの光線をスリツトに
通してスリツト光にしたり、或いはスリツトを通
さずに配線面に直接投射したりするために光路の
切換手段を設けることが必要になるが、このよう
な切換手段は容易に設備することができる。 In such a case, there will be no problem if the inspection device is equipped with both the conventional device as shown in FIG. 3 and the device according to the present invention as shown in FIG. Since there are many parts, you can omit part of one and use it for the other. For example, the light sources 51, 51' in FIG.
Lenses 52, 52', half mirrors 54, 54', etc. are the light sources 21, 21', lenses 22, 54', etc. in FIG.
22' and half mirrors 23 and 23'. In this case, the optical path is changed to pass the light from the light source through the slit to form a slit light, or to directly project it onto the wiring surface without passing through the slit. Although it is necessary to provide a switching means, such a switching means can be easily installed.
以上述べた如く、本発明によれば次の効果が期
待できる。 As described above, according to the present invention, the following effects can be expected.
(1) まず反射光による従来法で配線回路の欠陥を
検出し、異常パターンが摘出されるところのみ
本発明によりスリツト光を用いて確認すること
もできるので検査速度はあまり遅くならない。(1) First, defects in the wiring circuit are detected using the conventional method using reflected light, and only the areas where abnormal patterns are extracted can be confirmed using the slit light according to the present invention, so the inspection speed is not slowed down so much.
(2) スリツト光の明線を検出する本発明の方法お
よび装置により配線回路の変色、汚れによる誤
つた欠陥の指摘がなくなる。(2) The method and device of the present invention for detecting bright lines of slit light eliminates the possibility of incorrectly pointing out defects due to discoloration or dirt in wiring circuits.
(3) スリツト光発生のためのスリツト構造物を新
たに設けるだけで、あとは従来の反射光による
検査装置を利用して、配線回路の欠陥を確実に
検出する本発明の装置が構成できるので、コス
ト的に低廉化が可能である。(3) By simply providing a new slit structure for generating slit light, the device of the present invention can be configured to reliably detect defects in wiring circuits by using a conventional inspection device using reflected light. , it is possible to reduce the cost.
第１図は一般的な印刷配線板の一部拡大平面
図、第２図は第１図におけるＡ−A′線に沿つた
断面図、第３図は従来の印刷配線板の回路パター
ン検査装置を示す模式図、第４図は同装置におけ
る検査原理の説明図、第５図は配線パターンに変
色、汚れが存在した場合に欠陥と誤判定される過
程の説明図、第６図は本発明の一実施例を示す模
式図、第７図は第６図における要部の構成を判り
易く示した斜視図、第８図は配線パターンに変
色、汚れが存在しても本発明により欠陥と誤判定
されない過程の説明図、である。
符号説明 １，１……印刷配線板、２，３……
配線面、４，５……配線パターン、７……絶縁基
材、１５……変色、汚れ、１６……スリツト光の
明線、５１，５１′，２１，２１……光源、５２，
５２′，２２，２２′……レンズ、５４，５４′，
２３，２３′……ハーフミラー、５５，５５′，２
４，２４′……結像レンズ、２５，２５′……イメ
ージセンサ、５８，５８′，２６，２６′……電気
信号出力、２７……比較照合装置、２８，２８′
……２値化回路、２９……メモリ、３０……パタ
ーン比較回路、３１〜３５……入射光、４１〜４
４……反射光、５３，５３′……スリツト、５６，
５６′……カメラ、５７，５７′……切断線抽出回
路。
Figure 1 is a partially enlarged plan view of a typical printed wiring board, Figure 2 is a sectional view taken along line A-A' in Figure 1, and Figure 3 is a conventional printed wiring board circuit pattern inspection device. FIG. 4 is an explanatory diagram of the inspection principle of the same device, FIG. 5 is an explanatory diagram of the process by which a wiring pattern is incorrectly determined to be defective when there is discoloration or dirt, and FIG. 6 is an explanatory diagram of the present invention. FIG. 7 is a schematic diagram showing one embodiment. FIG. 7 is a perspective view showing the configuration of the main part in FIG. 6 in an easy-to-understand manner. FIG. FIG. 2 is an explanatory diagram of a process in which no determination is made. Explanation of symbols 1, 1...Printed wiring board, 2, 3...
Wiring surface, 4, 5... Wiring pattern, 7... Insulating base material, 15... Discoloration, dirt, 16... Bright line of slit light, 51, 51', 21, 21... Light source, 52,
52', 22, 22'...lens, 54, 54',
23, 23'...Half mirror, 55, 55', 2
4, 24'...Imaging lens, 25, 25'...Image sensor, 58, 58', 26, 26'...Electric signal output, 27...Comparison and verification device, 28, 28'
... Binarization circuit, 29 ... Memory, 30 ... Pattern comparison circuit, 31-35 ... Incident light, 41-4
4...Reflected light, 53, 53'...Slit, 56,
56'... Camera, 57, 57'... Cutting line extraction circuit.
Claims (1)
異にして配置されている配線パターン５と絶縁基
材７に対してスリツト光を照射し、その照射面に
対する斜方向からその反射光を取り込むことによ
り、前記配線パターン５と絶縁基材７との段差に
応じてレベルを異にするレベル的に不連続な明線
としての前記反射光を取り込み２値化して記憶す
る段階と、被検査対象としての印刷配線板上で同
様にスリツト光を照射し、その照射面に対する斜
方向からその反射光を取り込み２値化して記憶す
る段階と、前記二つの記憶結果を比較することに
より被検査対象としての印刷配線板上の配線パタ
ーンの欠陥を検出する段階と、から成ることを特
徴とする印刷配線板の回路パターン検査方法。 ２ 標準となる印刷配線板上の配線面２に対して
光を照射することにより、明暗の光学像としての
前記反射光を取り込み２値化して記憶する段階
と、被検査対象としての印刷配線板上の配線面に
対して同様に光を照射してその反射光を取り込み
２値化して記憶する段階と、前記二つの記憶結果
を比較することにより被検査対象としての印刷配
線板上の配線パターンの欠陥を検出する段階と、
から成る第１の配線パターン検査方法と、 標準となる印刷配線板上で段違い的に高さを異
にして配置されている配線パターン５と絶縁基材
７に対してスリツト光を照射し、その照射面に対
する斜方向からその反射光を取り込むことによ
り、前記配線パターン５と絶縁基材７との段差に
応じてレベルを異にするレベル的に不連続な明線
としての前記反射光を取り込み２値化して記憶す
る段階と、被検査対象としての印刷配線板上で同
様にスリツト光を照射し、その照射面に対する斜
方向からその反射光を取り込み２値化して記憶す
る段階と、前記二つの記憶結果を比較することに
より被検査対象としての印刷配線板上の配線パタ
ーンの欠陥を検出する段階と、から成る第２の印
刷配線板の配線パターン検査方法と、 前記第１の配線パターン検査方法を実施して欠
陥を検出された印刷配線板に対して前記第２の配
線パターン検査方法を実施する段階と、から成る
ことを特徴とする印刷配線板の回路パターン検査
方法。 ３ 標準となる印刷配線板上で段違い的に高さを
異にして配置されている配線パターン５と絶縁基
材７に対してスリツト光を照射する手段と、その
照射面に対する斜方向からその反射光を取り込む
ことにより、前記配線パターン５と絶縁基材７と
の段差に応じてレベルを異にするレベル的に不連
続な明線としての前記反射光を取り込み２値化し
て記憶する手段と、被検査対象としての印刷配線
板上で同様にスリツト光を照射し、その照射面に
対する斜方向からその反射光を取り込み２値化し
て記憶する手段と、前記二つの記憶手段における
記憶結果を比較することにより被検査対象として
の印刷配線板上の配線パターンの欠陥を検出する
手段と、から成ることを特徴とする印刷配線板の
回路パターン検査装置。[Claims] 1. Slit light is irradiated onto the wiring pattern 5 and the insulating base material 7, which are arranged at different heights on a standard printed wiring board, and the slit light is irradiated at an angle to the irradiated surface. By capturing the reflected light from the direction, the reflected light is captured as a level-discontinuous bright line whose level varies depending on the level difference between the wiring pattern 5 and the insulating base material 7, and is binarized and stored. and the step of similarly irradiating the printed wiring board as the object to be inspected with the slit light, capturing the reflected light from an oblique direction to the irradiated surface, converting it into binary data, and storing it, and comparing the two storage results. 1. A circuit pattern inspection method for a printed wiring board, comprising the steps of: detecting defects in a wiring pattern on a printed wiring board as an object to be inspected. 2. A step of capturing the reflected light as a bright and dark optical image by irradiating the wiring surface 2 on the standard printed wiring board, binarizing it and storing it, and printing the printed wiring board as the object to be inspected. The wiring pattern on the printed wiring board as the object to be inspected is determined by irradiating light onto the upper wiring surface in the same way and capturing the reflected light, converting it into binary data, and storing it. By comparing the two storage results, the wiring pattern on the printed wiring board to be inspected is determined. detecting defects in the
A first wiring pattern inspection method consisting of: irradiating a slit light onto the wiring pattern 5 and the insulating base material 7, which are arranged at different heights on a standard printed wiring board; By capturing the reflected light from an oblique direction with respect to the irradiation surface, the reflected light is captured as a level-wise discontinuous bright line that varies in level depending on the level difference between the wiring pattern 5 and the insulating base material 7. the step of digitizing and storing it as a value; the step of similarly irradiating the slit light onto the printed wiring board as the object to be inspected, capturing the reflected light from an oblique direction with respect to the irradiated surface, converting it into a binary value and storing it; a second method for inspecting a wiring pattern on a printed wiring board, the method comprising: detecting defects in a wiring pattern on a printed wiring board as an object to be inspected by comparing stored results; and the first method for inspecting a wiring pattern. A method for inspecting a circuit pattern of a printed wiring board, comprising the step of carrying out the second wiring pattern inspection method on the printed wiring board on which a defect has been detected. 3. A means for irradiating slit light onto the wiring pattern 5 and the insulating base material 7, which are arranged at different heights on a standard printed wiring board, and a means for irradiating the slit light from an oblique direction with respect to the irradiation surface. means for taking in the reflected light as level-discontinuous bright lines whose levels differ according to the level difference between the wiring pattern 5 and the insulating base material 7 by taking in the light, converting the reflected light into binarization, and storing the binarized light; A means for similarly irradiating a printed wiring board as an object to be inspected with slit light and capturing the reflected light from an oblique direction with respect to the irradiated surface, converting it into a binary value and storing it, and comparing the storage results in the two storage means. 1. A circuit pattern inspection apparatus for a printed wiring board, comprising: means for detecting defects in a wiring pattern on a printed wiring board as an object to be inspected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13203181A JPS5833890A (en) | 1981-08-24 | 1981-08-24 | Method and device for inspecting circuit pattern of printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13203181A JPS5833890A (en) | 1981-08-24 | 1981-08-24 | Method and device for inspecting circuit pattern of printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5833890A JPS5833890A (en) | 1983-02-28 |
| JPH025312B2 true JPH025312B2 (en) | 1990-02-01 |
Family
ID=15071873
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13203181A Granted JPS5833890A (en) | 1981-08-24 | 1981-08-24 | Method and device for inspecting circuit pattern of printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5833890A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6119750U (en) * | 1984-07-10 | 1986-02-05 | 三菱重工業株式会社 | Press mark detection device |
| DE19849574B8 (en) * | 1998-10-27 | 2010-02-11 | Valeo Klimatechnik Gmbh & Co. Kg | Pipe connection between a collector of a motor vehicle heat exchanger and an outer pipe for the internal heat exchange fluid |
-
1981
- 1981-08-24 JP JP13203181A patent/JPS5833890A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5833890A (en) | 1983-02-28 |
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