JPH02502227A - How to process various computer requests depending on their priorities - Google Patents
How to process various computer requests depending on their prioritiesInfo
- Publication number
- JPH02502227A JPH02502227A JP50696587A JP50696587A JPH02502227A JP H02502227 A JPH02502227 A JP H02502227A JP 50696587 A JP50696587 A JP 50696587A JP 50696587 A JP50696587 A JP 50696587A JP H02502227 A JPH02502227 A JP H02502227A
- Authority
- JP
- Japan
- Prior art keywords
- priority
- request
- requests
- priorities
- computer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
- G06F9/4818—Priority circuits therefor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
- Computer And Data Communications (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるため要約のデータは記録されません。 (57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】 計算機の種々の要求を優先度に依存して処理する方法産業上の利用分野 本発明は、請求の範囲第1項に記載の上位概念に記載の計算機の種々の要求を優 先度に依存して処理する方法に関する。[Detailed description of the invention] Method for processing various computer requests depending on priorities Industrial applications The present invention satisfies various requirements of a computer according to the generic concept set forth in claim 1. Concerning how to process depending on the prior.
従来の技暫 特定や計算機プログラム又は特定の計算機ルーチンの処理の間に、割込みと呼ば れ多かれ少なかれ早急に計算機により処理されなげればならない種々の要求が発 生することがある。これらの要求に、相応して高い又は低い優先度を割当てるこ とが可能であり、その際に優先゛度割当ては計算機のノ1−ドクエア構成により 定められることが可能でるる。このような優先度割当てはしかし融通性がなく計 算機の動作中に優先度を変更することすなわち優先度の整合は可能でない。Traditional techniques Interrupts occur during the processing of a particular computer program or a particular computer routine. Various requests are generated that must be processed more or less quickly by computers. It may occur. Assign these requests a correspondingly higher or lower priority. is possible, and in that case, the priority assignment is determined by It is possible to determine. However, such priority assignments are inflexible and unpredictable. It is not possible to change the priorities while the computer is running, that is, to match the priorities.
発明の利点 請求の範囲第1項に記載の愕徴部分に記載の特徴を有する、計算慎の種々の要求 を優先度に依存して処理する方法はこnに対して、緊急度の異なる要求を相応し て異なる優先度に割当てることができる利点をπし、その−に優先度割当てを計 算−動作中に必要に応じて、変化する条件に整合し変更することが可能でるる。Advantages of invention Various requests for careful calculations having the features described in the shocking part of claim 1 In contrast, the priority-based processing method handles requests with different degrees of urgency accordingly. Let π be the advantage that can be assigned to different priorities, and then calculate the priority assignment to − The calculations can be modified as necessary during operation to accommodate changing conditions.
この場合、部分要求すなわちセグメントがそれらの優先度に相応して待ち行列に おける異なる位置に割当てられるように、異なる優先度を有するセグメントに要 求を分割すると特に有利でるる。このようにして待ち行列の処理は順次に行われ る。最高の優先度を有する要求が現nた場合、この要求は、待ち行列の最上位置 にすでに同一の優先度を有する要求が配ytすれていない〃1ぎりそこに配置さ れる。この際にその他の要求は1つの位置だけ下にシフトされる。In this case, partial requests or segments are queued according to their priority. segments with different priorities so that they are assigned to different positions in the It is especially advantageous to divide the demand into parts. In this way, the queues are processed sequentially. Ru. If a request with the highest priority is present, this request is placed at the top of the queue. There is no request with the same priority already placed there. It will be done. Other requests are then shifted down one position.
図 面 次に本発明を、図面に示されているフローチャートに基づき詳しく説明する。drawing Next, the present invention will be explained in detail based on the flowcharts shown in the drawings.
計算機がプログラムHiCあり位置H1で要求lNT1が現れるとこれによりマ ーキングM1は″1″にセットされる。Mう1でろると要求1.NT1が処理さ れ、その際に主プログラムはこのために中断される。When the request lNT1 appears at position H1 where the computer has program HiC, this causes the computer to The marking M1 is set to "1". Request 1. NT1 handles The main program is then interrupted for this purpose.
今、第2の要求I NT2が現nるとこれによりマーキングM2がセットさnる が、マーキングM2はしかしプログラムエNTlと同一の優先度金有する。lN TlとINT2の優先には等しいので要求工NT2は動作中のプログラムlNT lの中断をしない。工NTiが処理されたら初めてマーキングM2が慣出されこ のようにして要求INT2が処理される。Now, when the second request I NT2 is present, marking M2 is set. However, marking M2 has the same priority as programmer NTl. lN Since the priorities of Tl and INT2 are equal, the requesting program NT2 is the running program 1NT. Do not interrupt l. Marking M2 will not be used until the NTi has been processed. Request INT2 is processed as follows.
今、INTXより高い優先度を有する要求が現れこれに対応するマーキングMX がセットされると仮定する。ここではより高い要求に関することであるのでまず 初めに少なくとも要求I NTXの時間的にクリティカルな部分がただちに処理 される。ついで、中断された要求INT2の後続の処理が、この要求が完全に処 理し終りマーキングM2−0がセットされるまで続行される。Now, a request with a higher priority than INTX appears and the corresponding marking MX Assume that is set. Since we are talking about higher requirements here, first Initially, at least the time-critical portion of the request I NTX is processed immediately. be done. Subsequent processing of the interrupted request INT2 then ensures that this request is completely processed. The processing continues until the processing end marking M2-0 is set.
高い優先度を有する要求XNTXが、異なる優先度を有する2つのセグメントか ら成ると仮定すると、マーキングMXii有するよりクリティカルでないセグメ ン) X NTXが処理されることが可能である。このセグメン)INTXIが 完全に処理し終り識別子MXに〇がセットされると搏び主プログラムに戻すこと が可能でるる。Is the request XNTX with a higher priority in two segments with different priorities? The less critical segment with marking MXii )XNTX can be processed. This segment) INTXI When the process is completed and 〇 is set in the identifier MX, return it to the master program. It is possible.
破滅により囲まnている処理区間Bt−その都度のプログラム構成に依存して任 意に割込みプログラム区間に付加することが可能でめる。Processing interval Bt surrounded by destruction - optional depending on the respective program configuration It can be added to the interrupt program section at will.
マーキングMl、M2.MXは対応する要求I N T 1 tINT2.IN TXが、種々の要求のために設けられている待ち行列における対応する位置にセ ットされることが可能なように侵先度識別子會含むことができる。Marking Ml, M2. MX makes the corresponding request INT1 tINT2. IN TX is set in the corresponding position in the queue provided for the various requests. It can include an aggressiveness identifier so that it can be accessed.
この際に待ち行列における優先度に相応して高い優先度を有する要Xは上位に、 低い優先産金Mする要求は下位に配置される。従って計算機により、待ち行列に おいてその都度に上位に位置する要求が、途中でより高い優先度を有する要求が 現れないかぎり処理される。At this time, the requirement X that has a high priority corresponding to the priority in the queue is placed at the top, Requests for lower priority gold M are placed lower. Therefore, the computer allows The requests that are ranked higher in each case are the requests that have a higher priority in the middle. It will be processed unless it appears.
これに対応して要求を1種々の優先を有するセグメントの中に分配することが可 能でるり、その鍬に個々のセグメントはそれらの優先度に相応して待ち行列の甲 に配置さnる〇 国際調査報告Correspondingly, requests can be distributed among segments with different priorities. In this case, the individual segments are placed in the front of the queue according to their priority. Placed in 〇 international search report
Claims (4)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE3705577.1 | 1987-02-21 | ||
DE19873705577 DE3705577A1 (en) | 1987-02-21 | 1987-02-21 | METHOD FOR PRIORITY-DEPENDENT PROCESSING OF DIFFERENT REQUIREMENTS OF A COMPUTER |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02502227A true JPH02502227A (en) | 1990-07-19 |
Family
ID=6321472
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50696587A Pending JPH02502227A (en) | 1987-02-21 | 1987-11-23 | How to process various computer requests depending on their priorities |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0345255A1 (en) |
JP (1) | JPH02502227A (en) |
DE (1) | DE3705577A1 (en) |
WO (1) | WO1988006317A1 (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR910006851A (en) * | 1989-09-01 | 1991-04-30 | 원본미기재 | Real-time computer rescue device and method |
US5287434A (en) * | 1991-10-28 | 1994-02-15 | Monarch Marking Systems, Inc. | Barcode identification system spooler |
EP0706126A1 (en) * | 1994-10-07 | 1996-04-10 | International Business Machines Corporation | Multi-priority level scheduler |
US6253260B1 (en) * | 1998-10-22 | 2001-06-26 | International Business Machines Corporation | Input/output data access request with assigned priority handling |
US6615302B1 (en) * | 1999-09-15 | 2003-09-02 | Koninklijke Philips Electronics N.V. | Use of buffer-size mask in conjunction with address pointer to detect buffer-full and buffer-rollover conditions in a CAN device that employs reconfigurable message buffers |
US6510479B1 (en) | 1999-09-15 | 2003-01-21 | Koninklijke Philips Electronics N.V. | Transmit pre-arbitration scheme for a can device and a can device that implements this scheme |
GB0423094D0 (en) | 2004-10-18 | 2004-11-17 | Ttp Communications Ltd | Interrupt control |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2012084B (en) * | 1978-01-09 | 1982-03-17 | Honeywell Inf Systems | Data processing systems |
DE3376995D1 (en) * | 1982-10-20 | 1988-07-14 | Hitachi Ltd | Control method for internal combustion engines |
DE3439560A1 (en) * | 1983-10-28 | 1985-05-23 | Ricoh Kk | Interrupt-processing method using a microcomputer |
-
1987
- 1987-02-21 DE DE19873705577 patent/DE3705577A1/en not_active Withdrawn
- 1987-11-23 EP EP19870907505 patent/EP0345255A1/en not_active Withdrawn
- 1987-11-23 WO PCT/DE1987/000543 patent/WO1988006317A1/en not_active Application Discontinuation
- 1987-11-23 JP JP50696587A patent/JPH02502227A/en active Pending
Also Published As
Publication number | Publication date |
---|---|
WO1988006317A1 (en) | 1988-08-25 |
EP0345255A1 (en) | 1989-12-13 |
DE3705577A1 (en) | 1988-09-01 |
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