JPH0236231U - - Google Patents
Info
- Publication number
- JPH0236231U JPH0236231U JP11454088U JP11454088U JPH0236231U JP H0236231 U JPH0236231 U JP H0236231U JP 11454088 U JP11454088 U JP 11454088U JP 11454088 U JP11454088 U JP 11454088U JP H0236231 U JPH0236231 U JP H0236231U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- output
- attenuator
- control signal
- comparator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims 2
- 239000000284 extract Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Amplifiers (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Analogue/Digital Conversion (AREA)
Description
第1図は本考案に係る信号発生装置の一実施例
を示す図、第2図は第1図装置の動作波形を示す
図、第3図は従来例を示す図、第4図は本考案で
得ようとする信号波形を示す図である。
11……正弦波発生器、12……アツテネータ
、13……オフセツト調整器、14……ピークホ
ールド回路、15……コンパレータ。
FIG. 1 is a diagram showing an embodiment of the signal generating device according to the present invention, FIG. 2 is a diagram showing operating waveforms of the device shown in FIG. 1, FIG. 3 is a diagram showing a conventional example, and FIG. 4 is a diagram showing the present invention. FIG. 2 is a diagram showing a signal waveform to be obtained. 11... Sine wave generator, 12... Attenuator, 13... Offset adjuster, 14... Peak hold circuit, 15... Comparator.
Claims (1)
りこの振幅を調整し、この制御信号の状態が変化
した時点の減衰量を維持するアツテネータと、 設定された2つの電圧(VRA,VRB)間の
中心電圧を取出す抵抗分圧回路の分圧点にコンデ
ンサの一端を接続し、このコンデンサの他端に前
記アツテネータの出力を導入するオフセツト調整
器と、 このオフセツト調整器の出力Soutの最大振
幅値(又は最小振幅値)を検出するピークホール
ド回路と、 このピークホールド回路の出力レベルと、前記
設定された高い方の電圧値を下回る電圧VA(又
は低い方の電圧値を上回る電圧VB)とを比較す
るコンパレータと、 を備え、このコンパレータの出力をアツテネータ
の前記制御信号とした信号発生装置。[Claims for Utility Model Registration] Means for generating a sine wave, introducing this sine wave, adjusting its amplitude by an applied control signal, and maintaining the amount of attenuation at the time the state of this control signal changes. One end of a capacitor is connected to the voltage dividing point of a resistor voltage divider circuit that extracts the center voltage between the attenuator and the two set voltages (VRA, VRB), and the output of the attenuator is introduced to the other end of this capacitor. A regulator, a peak hold circuit that detects the maximum amplitude value (or minimum amplitude value) of the output Sout of this offset regulator, the output level of this peak hold circuit, and a voltage below the set higher voltage value. A signal generating device, comprising: a comparator that compares VA (or a voltage VB that exceeds a lower voltage value), and uses the output of the comparator as the control signal for an attenuator.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11454088U JPH0236231U (en) | 1988-08-31 | 1988-08-31 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11454088U JPH0236231U (en) | 1988-08-31 | 1988-08-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0236231U true JPH0236231U (en) | 1990-03-08 |
Family
ID=31355384
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11454088U Pending JPH0236231U (en) | 1988-08-31 | 1988-08-31 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0236231U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58164387A (en) * | 1982-03-24 | 1983-09-29 | Casio Comput Co Ltd | A/d converter for video signal |
JPS6139625A (en) * | 1984-07-28 | 1986-02-25 | Victor Co Of Japan Ltd | Analog/digital converter |
-
1988
- 1988-08-31 JP JP11454088U patent/JPH0236231U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58164387A (en) * | 1982-03-24 | 1983-09-29 | Casio Comput Co Ltd | A/d converter for video signal |
JPS6139625A (en) * | 1984-07-28 | 1986-02-25 | Victor Co Of Japan Ltd | Analog/digital converter |
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