JPH0234798A - Method for plating pin - Google Patents
Method for plating pinInfo
- Publication number
- JPH0234798A JPH0234798A JP18458788A JP18458788A JPH0234798A JP H0234798 A JPH0234798 A JP H0234798A JP 18458788 A JP18458788 A JP 18458788A JP 18458788 A JP18458788 A JP 18458788A JP H0234798 A JPH0234798 A JP H0234798A
- Authority
- JP
- Japan
- Prior art keywords
- pin
- plating
- solder
- resist
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007747 plating Methods 0.000 title claims abstract description 44
- 238000000034 method Methods 0.000 title claims abstract description 13
- 229910000679 solder Inorganic materials 0.000 claims abstract description 32
- 239000002184 metal Substances 0.000 claims abstract description 18
- 229910052751 metal Inorganic materials 0.000 claims abstract description 18
- 239000002904 solvent Substances 0.000 claims abstract description 5
- 230000000873 masking effect Effects 0.000 claims abstract description 4
- 230000005012 migration Effects 0.000 abstract description 4
- 238000013508 migration Methods 0.000 abstract description 4
- 239000011248 coating agent Substances 0.000 abstract description 3
- 238000000576 coating method Methods 0.000 abstract description 3
- 238000005476 soldering Methods 0.000 abstract description 3
- 238000007772 electroless plating Methods 0.000 abstract description 2
- 238000007654 immersion Methods 0.000 abstract 2
- 239000010931 gold Substances 0.000 description 7
- 229920001721 polyimide Polymers 0.000 description 5
- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 241001609213 Carassius carassius Species 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
Landscapes
- Electroplating Methods And Accessories (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔ヰ既 要〕
ピンのめっき方法に関し、特に、ＬＳＩ素子の信号端子
ピンのような微細なピンのめっき方法に関し、
ピン接合部からのはんだ移動を防止できるピンのめっき
方法を提供することを目的とし、少なくとも表面が第１
の金属であるピンを、はんだ接合用部分のみを露出させ
てマスキングした状態で、該露出された領域を耐めっき
レジストで被覆する工程、該ピンを該第１の金属よりも
はんだとの濡れ性が低い第２の金属でめっきする工程、
および該耐めっきレジストを溶剤で除去する工程を含む
ように構成する。[Detailed Description of the Invention] [Already Required] Pin plating that can prevent solder from moving from the pin joint, particularly regarding a method of plating minute pins such as signal terminal pins of LSI devices. The present invention provides a method in which at least the surface comprises a first
a step of masking the pin, which is a metal, with only the solder joint portion exposed, and covering the exposed area with a plating-resistant resist, the pin being wettable with the solder better than the first metal; a step of plating with a second metal with a low
and a step of removing the plating-resistant resist with a solvent.
本発明は、ピンのめっき方法に関し、特に、ＬＳＩ素子
の信号端子ピンのような微細なピンのめっき方法に関す
る。The present invention relates to a method for plating pins, and particularly to a method for plating minute pins such as signal terminal pins of LSI devices.
コンピュータ等の装置では、回路基板の設計変更等に応
じて、被覆ワイヤによる補修を行っている。その際、Ｌ
ＳＩ素子を取外すことが必要であり、補修後、それを再
び取付けている。Ｌｓｒｓ子内には、たとえばピングリ
ッドアレーを構成するような微細なピン（たとえば直径
０．１ ｗ程度、長さｌ’ ｍｍ程度）が信号端子等と
してはんだ接合されている。このようなピンは、はんだ
との濡れ性と耐食性を確保するために、これらの性質を
具備するＡｕ等の金属であらかじめめっきされているこ
とが多い。上記の取外しと取付けを繰返すと、はんだ接
合部のはんだは濡れ性の高いＡｕめっき膜表面を伝わっ
てピンの軸を移動する。そのため、はんだ接合部ではは
んだ量が欠乏して接合強度が低下し、破損やそれに伴う
導通不良等が発生する。2. Description of the Related Art Equipment such as computers are repaired using covered wires in response to changes in the design of circuit boards. At that time, L
It is necessary to remove the SI element and reinstall it after repair. Within the Lsrs element, minute pins (for example, about 0.1 W in diameter and about 1' mm in length) constituting a pin grid array are soldered as signal terminals. In order to ensure wettability with solder and corrosion resistance, such pins are often pre-plated with a metal such as Au that has these properties. When the above-described removal and installation are repeated, the solder at the solder joint moves along the highly wettable Au plating film surface and moves the axis of the pin. Therefore, the amount of solder in the solder joint is insufficient, the joint strength is reduced, and breakage and associated poor conduction occur.
そごで、ピンのはんだ接合用部分以外の部分に、はんだ
との濡れ性が相対的に低い金属をめっきして、接合部か
らのはんだ移動を防止することが考えられる。しかし、
従来のめっき方法では、特に微細なピンの場合、ピンの
一部をめっき浴面下に浸漬して部分めっきすると、めっ
き中の必要な浴攪拌による浴面変動のため、正確な位置
、寸法、膜厚でめっきすることができないという問題が
あっ ゾこ。Therefore, it is conceivable to plate the portion of the pin other than the solder joint portion with a metal that has relatively low wettability with solder to prevent the solder from moving from the joint portion. but,
In conventional plating methods, especially in the case of fine pins, if a part of the pin is immersed below the plating bath surface for partial plating, it is difficult to accurately position, dimension, There is a problem that plating cannot be done due to the film thickness.
本発明は、正確な位置、寸法、膜厚でめっきしてピン接
合部からのはんだ移動を防止できるピンのめっき方法を
提供することを目的とする。SUMMARY OF THE INVENTION An object of the present invention is to provide a pin plating method that can perform plating at an accurate position, size, and thickness to prevent solder from moving from a pin joint.
上記の目的は、本発明によれば、少なくとも表面が第１
の金属であるピンを、はんだ接合用部分のみを露出させ
てマスキングした状態で、該露出された領域を耐めっき
レジストで被覆する工程、該ピンを該第１の金属よりも
はんだとの濡れ性が低い第２の金属でめっきする工程、
および該耐めっきレジストを溶剤で除去する工程を含む
、ピンのめっき方法によって達成される。According to the invention, the above object is achieved by at least one surface having a first surface.
a step of masking the pin, which is a metal, with only the solder joint portion exposed, and covering the exposed area with a plating-resistant resist, the pin being wettable with the solder better than the first metal; a step of plating with a second metal with a low
and removing the plating resist with a solvent.
本発明の方法は、はんだ接合に必要な部分を耐めっきレ
ジストの被覆部分として正確に限定した状態で、他の部
分をはんだとの濡れ性が相対的に低い金属でめっきする
。したがって、めっき浴面の変動に影響されることなく
、正確な位置、寸法、膜厚で低濡れ性金属のめっきを行
なうことができる。In the method of the present invention, the areas necessary for solder bonding are precisely defined as areas coated with a plating-resistant resist, and other areas are plated with a metal that has relatively low wettability with solder. Therefore, low wettability metal can be plated with accurate position, size, and film thickness without being affected by fluctuations in the plating bath surface.
ピンのはんだ接合用部分のみにはんだとの濡れ性を付与
し、他の部分ははんだとの濡れ性を相対的に低下させる
ことによって、はんだ接合部のはんだが他の部分へ移動
することを防止する。By imparting wettability with solder only to the solder joint part of the pin and relatively reducing the wettability with solder to other parts, solder in the solder joint part is prevented from migrating to other parts. do.
ｊ［１図に、本発明にしたがって耐めっきレジストを被
覆するためにピンをマスキングした状態の例を示す。保
持具１は、ピン２をその頭部３で支持する。ピン２はＣ
ｕ製の基体１０１に予めＮｉの下地めっき１０２とその
上にＡｕめっき１０３が施されている（第２図ａ）。保
持具２の（または保持具２に装着された）金属製マスク
４の穴５は径がピン２の外径より若干大きい。ピン２は
マスク４の穴から先端部分（はんだ接合用部分）をマス
ク４の下面より下方へ突き出した状態で保持されている
。Figure 1 shows an example of pins masked to coat with plating resist according to the present invention. Holder 1 supports pin 2 with its head 3. Pin 2 is C
A base body 101 made of U is preliminarily plated with a Ni base plating 102 and an Au plating 103 thereon (FIG. 2a). The diameter of the hole 5 in the metal mask 4 of the holder 2 (or attached to the holder 2) is slightly larger than the outer diameter of the pin 2. The pin 2 is held with its tip portion (solder joint portion) protruding downward from the lower surface of the mask 4 through the hole in the mask 4.
この状態で保持具１をピン２と一緒に、ポリイミド等の
耐めっき性レジストの溶液面に浮かべてレジスト１０４
を先端部分のみに塗布した後、紫外線等によってレジス
トを硬化させる（第２図ｂ）。In this state, the holder 1 and the pins 2 are floated on the solution surface of a plating-resistant resist such as polyimide, and the resist 104
After coating only the tip portion, the resist is cured using ultraviolet light or the like (Fig. 2b).
先端部のみをレジスト被覆したピン２を、たとえば無電
解めっき浴に浸漬する等によって、Ａｕよりもはんだと
の濡れ性が低い金属、たとえばＮｉ１０５でめっきする
（第２図Ｃ）。The pin 2 with only the tip coated with a resist is plated with a metal having lower wettability with solder than Au, such as Ni105, by immersing it in an electroless plating bath, for example (FIG. 2C).
Ｎｉめっきしたピン２をヒドラジン（Ｎ２Ｈ，）のよう
な溶剤中に浸漬する等によって、ポリイミド等の耐めっ
きレジストを除去する（第２図ｄ）。The plating resist such as polyimide is removed by immersing the Ni-plated pin 2 in a solvent such as hydrazine (N2H) (FIG. 2d).
９５３図は、第１図と同様な保持様式で多数のピン２を
保持具１に保持した状態を示す。ピン２の長さは１．２
鮒、ピン径は０．１ ｍｍであり、予め全面に第２図ａ
のように下地Ｎｉめっき１０２とＡｕめっき１０３が施
こされている。ピン２を治具１に挿入した状態で、紫外
線硬化型ポリイミド（脂化成製、２４２０＞上に浮かべ
、ビン先端部分０．２ ｍｍにポリイミドを塗布し、ス
テンレス製マスク４を外して、８０℃で２０分乾燥後、
３０秒間紫外線を露出した。このようにして、ピン先を
レジスト被覆した後、無電解Ｎ１めっき液中に浸漬して
、Ｎｉめっき膜を形成した。そして、被覆したポリイミ
ド膜は、ピンをヒドラジン（Ｎ２１（、）中に浸漬して
除去した。FIG. 953 shows a state in which a large number of pins 2 are held in the holder 1 in the same holding manner as in FIG. The length of pin 2 is 1.2
The crucian carp pin diameter is 0.1 mm, and the whole surface is marked with Fig. 2a.
A base Ni plating 102 and an Au plating 103 are applied as shown in FIG. With the pin 2 inserted into the jig 1, float it on ultraviolet curable polyimide (Fushikasei Co., Ltd., 2420), apply polyimide to 0.2 mm of the tip of the bottle, remove the stainless steel mask 4, and heat at 80°C. After drying for 20 minutes,
UV light was exposed for 30 seconds. After the pin tip was coated with resist in this manner, it was immersed in an electroless N1 plating solution to form a Ni plating film. The coated polyimide film was then removed by immersing the pin in hydrazine (N21).
実施例でＮｉめっきしたピンと、これと同寸法で通常の
全面Ａｕめっきしたピンについて下記条件で接合部から
のはんだ移動を試験した。Solder migration from the joint was tested under the following conditions for the Ni-plated pin in the example and a normal pin with the same dimensions and full-surface Au plating.
試験条件：口ＩＱｍｍのアルミナ板の四隅に実施例でＮ
ｉめっきしたピンと通常の全面ＡｕめっきしたピンをＡ
ｇ−４０Ｃｕでそれぞれろう付けし、それを別の口ＩＱ
ｍｍのアルミナ板に５ｎ−３７Ｐｂではんだ接合した。Test conditions: In the example, N was applied to the four corners of the alumina plate with a mouth IQ mm.
I-plated pins and regular full-surface Au-plated pins are A.
Braze each with g-40Cu and attach it to another mouth IQ.
It was soldered to a 5n-37Pb alumina plate.
これを実験試料として、これにフラックス塗布→昇温（
はんだ付は温度）→冷却のプロセスを１０回繰返した。Using this as an experimental sample, apply flux to it → raise the temperature (
The process of soldering (temperature) → cooling was repeated 10 times.
その結果、本発明にしたがってめっきしたピンは、はん
だ移動が全く観察されなかった。一方、通常の全面Ａｕ
めっきしたピンは全てはんだ移動が観察され、最も著し
い場合にはピン頭部の首下にまではんだが達していた。As a result, no solder migration was observed on the pins plated according to the present invention. On the other hand, ordinary full-surface Au
Solder migration was observed on all plated pins, and in the most severe cases, solder reached below the neck of the pin head.
本発明は、正確な位置、寸法、膜厚で低濡れ性金屑のめ
っきを行なうことによって、接合部から、のはんだ移動
を防止して接合強度を安定して維持することができる。According to the present invention, by performing plating with low wettability gold chips at accurate positions, dimensions, and film thicknesses, it is possible to prevent solder from moving from the joint portion and to stably maintain joint strength.
第１図は、本発明にしたがって耐めっきレジストを被覆
するための配置例を示す断面図、第２図は、本発明の方
法にしたがってめっきを行なう工程を示す断面図、およ
び
第３図は、第１図と同様な配置様式を多数のピンのめっ
きに適用した例を示す断面図である。
１・・・保持具、 ２・・・ピン、４・・・金属マ
スク、 １０４・・・耐めっきレジスト、１０５・・・
Ｎｉめっき層。
（ａ）
（ｂ）
第３図
（ピン
（ｄ）
第２図FIG. 1 is a cross-sectional view showing an arrangement example for coating a plating-resistant resist according to the present invention, FIG. 2 is a cross-sectional view showing a step of plating according to the method of the present invention, and FIG. FIG. 2 is a sectional view showing an example in which an arrangement similar to that in FIG. 1 is applied to plating a large number of pins. DESCRIPTION OF SYMBOLS 1... Holder, 2... Pin, 4... Metal mask, 104... Plating resistant resist, 105...
Ni plating layer. (a) (b) Figure 3 (Pin (d) Figure 2
Claims (1)
接合用部分のみを露出させてマスキングした状態で、該
露出された領域を耐めっきレジストで被覆する工程、 該ピンを該第１の金属よりもはんだとの濡れ性が低い第
２の金属でめっきする工程、および該耐めっきレジスト
を溶剤で除去する工程、を含む、ピンのめっき方法。[Claims] 1. A step of masking a pin whose surface is at least made of a first metal, exposing only the solder joint portion, and then covering the exposed area with a plating-resistant resist. A method for plating pins, the method comprising: plating with a second metal having lower wettability with solder than the first metal; and removing the plating resist with a solvent.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18458788A JPH0234798A (en) | 1988-07-26 | 1988-07-26 | Method for plating pin |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18458788A JPH0234798A (en) | 1988-07-26 | 1988-07-26 | Method for plating pin |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0234798A true JPH0234798A (en) | 1990-02-05 |
Family
ID=16155816
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18458788A Pending JPH0234798A (en) | 1988-07-26 | 1988-07-26 | Method for plating pin |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0234798A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04142765A (en) * | 1990-10-04 | 1992-05-15 | Nec Corp | Lsi package |
| US5670418A (en) * | 1996-12-17 | 1997-09-23 | International Business Machines Corporation | Method of joining an electrical contact element to a substrate |
| CN100357905C (en) * | 2004-07-20 | 2007-12-26 | 华为技术有限公司 | Detection method for failure of address bus |
| US11101202B2 (en) | 2019-06-12 | 2021-08-24 | Shinko Electric Industries Co., Ltd. | Lead pin and wiring board having lead pin |
-
1988
- 1988-07-26 JP JP18458788A patent/JPH0234798A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04142765A (en) * | 1990-10-04 | 1992-05-15 | Nec Corp | Lsi package |
| US5670418A (en) * | 1996-12-17 | 1997-09-23 | International Business Machines Corporation | Method of joining an electrical contact element to a substrate |
| CN100357905C (en) * | 2004-07-20 | 2007-12-26 | 华为技术有限公司 | Detection method for failure of address bus |
| US11101202B2 (en) | 2019-06-12 | 2021-08-24 | Shinko Electric Industries Co., Ltd. | Lead pin and wiring board having lead pin |
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