JPH0234529B2 - PARUSUSHUTSURYOKUKAIRO - Google Patents
PARUSUSHUTSURYOKUKAIROInfo
- Publication number
- JPH0234529B2 JPH0234529B2 JP15191183A JP15191183A JPH0234529B2 JP H0234529 B2 JPH0234529 B2 JP H0234529B2 JP 15191183 A JP15191183 A JP 15191183A JP 15191183 A JP15191183 A JP 15191183A JP H0234529 B2 JPH0234529 B2 JP H0234529B2
- Authority
- JP
- Japan
- Prior art keywords
- output
- input
- circuit
- pulse
- abnormal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000002159 abnormal effect Effects 0.000 claims description 12
- 230000005856 abnormality Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
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- Electronic Switches (AREA)
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、フオトアイソレータによつて入力側
回路と出力側回路が絶縁されて成るパルス出力回
路に関するもので、特に民生機器や工業計器等の
パルス出力形の１ループ制御装置に使用されるも
のである。[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a pulse output circuit in which an input side circuit and an output side circuit are isolated by a photo isolator, and particularly relates to a pulse output circuit for use in consumer equipment, industrial instruments, etc. This is used in an output type one-loop control device.
従来、この種の回路として第１図に示すものが
あつた。図において、ａ，ｂは入力端子、ｃ，ｄ
は本回路を駆動するための供給電源端子、ｅ，ｆ
は出力端子である。また、１，２は入力側電源、
３，４は電流制限抵抗、５，６は入力側回路Ｘと
出力側回路Ｙを絶縁するフオトアイソレータ、
７，８は入力側ドライブ素子、９，１０はフオト
アイソレータの動作を安定にする抵抗、１１は電
流制限抵抗、１２は出力側回路に電圧を供給する
定電圧素子、１３〜１６は出力用ドライブ素子１
７，１８に信号を伝えるための抵抗、１９，２０
は外来サージを吸収する定電圧素子である。
Conventionally, there has been a circuit of this type as shown in FIG. In the figure, a, b are input terminals, c, d
are power supply terminals for driving this circuit, e, f
is the output terminal. In addition, 1 and 2 are input side power supplies,
3 and 4 are current limiting resistors, 5 and 6 are photo isolators that isolate the input side circuit X and the output side circuit Y,
7 and 8 are input side drive elements, 9 and 10 are resistors that stabilize the operation of the photo isolator, 11 is a current limiting resistor, 12 is a constant voltage element that supplies voltage to the output side circuit, and 13 to 16 are output drives Element 1
Resistance for transmitting signals to 7, 18, 19, 20
is a constant voltage element that absorbs external surges.
上記構成で成る従来のパルス出力回路において
は、入力端子ａ又はｂにハイレベルの信号が入力
されるとドライブ素子７又は８の出力側はロウレ
ベルとなり、電流制限抵抗３又は４により制限さ
れる電流をフオトアイソレータ５又は６の１次側
を経由して電流を引き込む。この時、フオトアイ
ソレータ５又は６の２次側は導通し、抵抗１１及
び定電圧素子１２により端子ｃ，ｄ経由で外部よ
り供給される電圧のレベルを下げ安定化した電圧
として抵抗１３，１５又は１４，１６に伝え出力
側ドライブ素子１７又は１８を駆動し出力信号を
出力端子ｅ又はｆに出力するようになつている。
このパルス出力回路においては、通常、端子ａか
らｅへの信号をアツプパルス、ｂからｆへの信号
をダウンパルスとして使用するようになつてい
る。 In the conventional pulse output circuit having the above configuration, when a high level signal is input to input terminal a or b, the output side of drive element 7 or 8 becomes low level, and the current is limited by current limiting resistor 3 or 4. A current is drawn through the primary side of the photo isolator 5 or 6. At this time, the secondary side of the photo isolator 5 or 6 becomes conductive, and the level of the voltage supplied from the outside via the terminals c and d is lowered by the resistor 11 and the constant voltage element 12, and the voltage is stabilized by the resistor 13, 15 or 14 and 16 to drive the output side drive element 17 or 18, and output the output signal to the output terminal e or f.
In this pulse output circuit, the signal from terminal a to e is normally used as an up pulse, and the signal from terminal b to f is used as a down pulse.
しかるに、従来のパルス出力回路では以上のよ
うに構成されており、入力端子ａ，ｂへ信号を伝
える装置が故障した場合に、本パルス出力回路が
正常であつても、装置全体から見ると異常とな
り、また出力が不確定となるなどの欠点があつ
た。 However, conventional pulse output circuits are configured as described above, and if the device that transmits signals to input terminals a and b breaks down, even if this pulse output circuit is normal, the device as a whole will become abnormal. There were also drawbacks such as the output being uncertain.
本発明は、上記のような従来のものの欠点を除
去するためになされたもので、簡単な回路を付加
することにより本回路以外が異常であつても本回
路が正常である限り手動操作によるパルス出力が
可能となるパルス出力回路を提供することを目的
としている。
The present invention was made in order to eliminate the drawbacks of the conventional ones as described above, and by adding a simple circuit, even if something other than this circuit is abnormal, as long as this circuit is normal, pulses can be manually operated. The purpose of this invention is to provide a pulse output circuit that is capable of outputting signals.
以下、本発明の一実施例を、第１図と同一部分
は同一符号を附して示す第２図に基いて説明す
る。第２図において、ｇは異常入力端子、２９は
異常入力ドライブ素子、３０はリレー、２８は入
力側電源であり、また２１は抵抗１１と定電圧素
子１２により安定化される電圧の供給経路を切換
えるリレー３０の接点、２２及び２３は各々リレ
ー接点２１により供給される電圧を抵抗２４，２
６及び２５，２７へ伝える押釦スイツチである。
Hereinafter, one embodiment of the present invention will be described with reference to FIG. 2, in which the same parts as in FIG. 1 are denoted by the same reference numerals. In FIG. 2, g is an abnormal input terminal, 29 is an abnormal input drive element, 30 is a relay, 28 is an input power supply, and 21 is a voltage supply path stabilized by a resistor 11 and a constant voltage element 12. Switching contacts 22 and 23 of relay 30 transfer the voltage supplied by relay contact 21 to resistors 24 and 2, respectively.
6, 25, and 27.
上記構成を備えるパルス出力回路においては、
先ず、入力端子ａ，ｂの信号が正常である時は、
異常入力端子ｇにハイレベルの信号が入力され、
ドライブ素子２９の出力はロウレベルとなりリレ
ー３０は励磁される状態となる。このとき、抵抗
１１と定電圧素子１２により安定化される電圧は
接点R1の投入によりフオトアイソレータ５及び
６側へ供給することになり、したがつて、このよ
うな場合は従来と同様に動作することになる。 In the pulse output circuit having the above configuration,
First, when the signals at input terminals a and b are normal,
A high level signal is input to the abnormal input terminal g,
The output of the drive element 29 becomes low level, and the relay 30 becomes excited. At this time, the voltage stabilized by the resistor 11 and the constant voltage element 12 will be supplied to the photoisolators 5 and 6 by closing the contact R1 . Therefore, in such a case, the operation will be the same as before. I will do it.
他方、入力端子ａ，ｂの信号が異常である時に
は、異常入力端子ｇにロウレベルの信号が入力さ
れてドライブ素子２９の出力はハイレベルとな
り、リレー３０は励磁されない状態となる。そし
て、このとき抵抗１１と定電圧素子１２により安
定化される電圧は接点R2の投入によりスイツチ
２２及び２３側へ供給することになり、従つて正
常な状態の時は押釦スイツチ２２，２３は無効で
あつたが、異常な状態の時は押釦スイツチ２２，
２３が有効となり押し操作することにより出力端
子ｅ又はｆに出力信号が伝えられ手動での操作が
可能となる。 On the other hand, when the signals at the input terminals a and b are abnormal, a low level signal is input to the abnormal input terminal g, the output of the drive element 29 becomes high level, and the relay 30 is not excited. At this time, the voltage stabilized by the resistor 11 and the constant voltage element 12 is supplied to the switches 22 and 23 by closing the contact R2 . Therefore, in a normal state, the push button switches 22 and 23 are If it is disabled but in an abnormal state, push button switch 22,
23 becomes effective and by pressing it, an output signal is transmitted to the output terminal e or f, allowing manual operation.
なお上記実施例では正常から異常への切換えが
リレー接点により行われるとしたが、使用者が異
常を認識して切換えを行えるようにスライドスイ
ツチなどで切換えるようにしても良い。また異常
状態が分るよう異常で点灯するランプを取付けて
も良い。 In the above embodiment, switching from normal to abnormal is performed by a relay contact, but the switching may be performed by a slide switch or the like so that the user can recognize the abnormality and perform the switching. Additionally, a lamp that lights up when there is an abnormality may be installed so that abnormal conditions can be detected.
以上のように本発明によれば、パルス出力の手
動操作が異常で有効となるようにしたので、本回
路を使用する装置の異常時の対応が迅速に行え、
本回路の出力信号を受け取る側の危険防止が得ら
れる効果がある。
As described above, according to the present invention, manual operation of the pulse output becomes effective in the event of an abnormality, so that it is possible to quickly respond to abnormalities in the device using this circuit.
This has the effect of preventing danger on the side receiving the output signal of this circuit.
第１図は従来のパルス出力回路を示す回路図、
第２図は本発明の一実施例によるパルス出力回路
を示す回路図である。
ａ，ｂ，ｇ：信号入力端子、ｃ，ｄ：電源供給
端子、ｅ，ｆ：信号出力端子、１，２，２８：電
源、３，４，９，１０，１１，１３，１４，１
５，１６：抵抗、５，６：フオトアイソレータ、
７，８，１７，１８，２９：ドライブ素子、１
２，１９，２０：定電圧素子、２１：リレー接
点、２２，２３：押釦スイツチ、３０：リレー、
なお図中同一符号は同一又は相当部分を示す。
Figure 1 is a circuit diagram showing a conventional pulse output circuit.
FIG. 2 is a circuit diagram showing a pulse output circuit according to an embodiment of the present invention. a, b, g: Signal input terminal, c, d: Power supply terminal, e, f: Signal output terminal, 1, 2, 28: Power supply, 3, 4, 9, 10, 11, 13, 14, 1
5, 16: Resistor, 5, 6: Photo isolator,
7, 8, 17, 18, 29: drive element, 1
2, 19, 20: constant voltage element, 21: relay contact, 22, 23: push button switch, 30: relay,
Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
力側回路が絶縁されていて、入力側回路の第１及
び第２の入力端子にハイレベルの信号が入力され
た時に、上記フオトアイソレータの２次側導通に
よつて安定化された電源電圧の供給を受けて、上
記第１及び第２の入力端子にそれぞれ対応する出
力側回路の第１及び第２の出力端子からアツプパ
ルスとダウンパルスをそれぞれ出力する構成で成
るパルス出力回路において、上記入力端子に入力
される信号が異常である時に異常信号の入力を受
けて励磁するリレーと、このリレーの接点切換り
による上記安定化電源電圧の供給経路の切換りに
よつて電源供給を受け、押釦スイツチの投入によ
り上記アツプパルスとダウンパルスをそれぞれ出
力する構成の手動操作用出力回路とを設けたこと
を特徴とするパルス出力回路。1 The input side circuit and the output side circuit are isolated by a photo isolator, and when a high level signal is input to the first and second input terminals of the input side circuit, the secondary side conduction of the photo isolator is A configuration in which an up pulse and a down pulse are outputted from the first and second output terminals of the output side circuit corresponding to the first and second input terminals, respectively, in response to the supply of a power supply voltage stabilized by the A pulse output circuit consisting of a relay that is energized by receiving an abnormal signal when the signal input to the input terminal is abnormal, and switching of the supply path of the stabilized power supply voltage by switching the contacts of this relay. 1. A pulse output circuit comprising: a manual operation output circuit configured to receive power supply from a push button switch and output the up pulse and down pulse respectively when a push button switch is turned on.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15191183A JPH0234529B2 (en) | 1983-08-19 | 1983-08-19 | PARUSUSHUTSURYOKUKAIRO |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15191183A JPH0234529B2 (en) | 1983-08-19 | 1983-08-19 | PARUSUSHUTSURYOKUKAIRO |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6042934A JPS6042934A (en) | 1985-03-07 |
| JPH0234529B2 true JPH0234529B2 (en) | 1990-08-03 |
Family
ID=15528885
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15191183A Expired - Lifetime JPH0234529B2 (en) | 1983-08-19 | 1983-08-19 | PARUSUSHUTSURYOKUKAIRO |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0234529B2 (en) |
-
1983
- 1983-08-19 JP JP15191183A patent/JPH0234529B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6042934A (en) | 1985-03-07 |
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