JPH02299131A - Manufacture of flat display - Google Patents

Manufacture of flat display

Info

Publication number
JPH02299131A
JPH02299131A JP1118616A JP11861689A JPH02299131A JP H02299131 A JPH02299131 A JP H02299131A JP 1118616 A JP1118616 A JP 1118616A JP 11861689 A JP11861689 A JP 11861689A JP H02299131 A JPH02299131 A JP H02299131A
Authority
JP
Japan
Prior art keywords
substrate
electron
vacuum
chamber
spacer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1118616A
Other languages
Japanese (ja)
Other versions
JP2715318B2 (en
Inventor
Nobuyuki Saito
信之 斉藤
Shinya Mishina
伸也 三品
Yoshikazu Sakano
坂野 嘉和
Ichiro Nomura
一郎 野村
Toshihiko Takeda
俊彦 武田
Yoshimi Uda
宇田 芳巳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP11861689A priority Critical patent/JP2715318B2/en
Publication of JPH02299131A publication Critical patent/JPH02299131A/en
Application granted granted Critical
Publication of JP2715318B2 publication Critical patent/JP2715318B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2201/00Electrodes common to discharge tubes
    • H01J2201/30Cold cathodes
    • H01J2201/316Cold cathodes having an electric field parallel to the surface thereof, e.g. thin film cathodes
    • H01J2201/3165Surface conduction emission type cathodes

Landscapes

  • Cold Cathode And The Manufacture (AREA)
  • Manufacture Of Electron Tubes, Discharge Lamp Vessels, Lead-In Wires, And The Like (AREA)

Abstract

PURPOSE:To reduce dispersion of products without deteriorating the electron emission characteristic even when multiple elements are used by heating a substrate, a faceplate glass, and a spacer, and applying excitation processing to the surface conduction type electron emitting element in vacuum between the degassing process and airtight sealing process. CONSTITUTION:Ni is deposited on a clean quartz substrate 1 to form two electron patterns 2 and 2' by the photolithography method, and projections with the width W 250mum are provided on opposite sides face to face at the interval L 10mum. The substrate 1 is set at the position 44 on the inside rear wall of a chamber 42 of a vacuum device constituted of a particle generating chamber 41, the particle accumulating chamber 42 and a nozzle 43 connecting them, it is exhausted to 5X10<-7>Torr with an exhaust system 45, Ar gas 46 is fed to the generating chamber 41, and the Au from an evaporating source 47 is sprayed toward the substrate 1 set via the nozzle 43. The spray quantity of Au is controlled by the opening/closing of a shutter 48, and Au is filled in an electron emission section 3 between projections at the tip.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、平面型ディスプレイ、特に表面伝導形電子放
出素子を用いたディスプレイの製造方法に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a flat display, particularly a display using surface conduction electron-emitting devices.

[従来の技術] 近年、情報機器や家庭用TV受像機の分野で、薄型で高
精細、高輝度の視認性の良いディスプレイが求められて
いる。
[Background Art] In recent years, there has been a demand for thin, high-definition, high-brightness, and highly visible displays in the fields of information equipment and home TV receivers.

従来、薄型の画像表示装置としては、たとえば、液晶表
示装置やEL表示装置、プラズマディスプレイなどが、
開発されているが、これらには視野角、カラー化輝度等
の点に問題があり、市場の要求する性能を十分に満足し
ているとは言えない状況である。
Conventionally, thin image display devices include, for example, liquid crystal display devices, EL display devices, and plasma displays.
Although these have been developed, there are problems with viewing angles, color brightness, etc., and it cannot be said that they fully satisfy the performance required by the market.

ところで、従来、簡単な構造で電子の放出が得られる素
子として、例えば、エム・アイ・エリンソン(M、 1
.Elinson)等によって発表された冷陰極素子が
知られている[ラジオ・エンジニアリング・エレクトロ
ン・フィジイッス(Radi。
By the way, conventionally, as an element that can emit electrons with a simple structure, for example, MI Ellingson (M, 1
.. The cold cathode device announced by E. Elinson et al. [Radio Engineering Electron Physics (Radi.

Eng、  Electron、 Phys、)第1O
巻、1290〜1296頁。
Eng, Electron, Phys,) 1st O
Vol., pp. 1290-1296.

1965年]。1965].

これは、基板上に形成された小面積の薄膜に、膜面に平
行に電流を流すことにより、電子放出が生ずる現象を利
用するもので、−49には表面伝導形放出素子と呼ばれ
ている。
This utilizes the phenomenon of electron emission caused by passing a current parallel to the film surface through a small-area thin film formed on a substrate. There is.

この表面伝導形放出素子としては、前記エリンソン等に
より開発されたSnO□(sb)薄膜を用いたもの、A
u薄膜によるもの[ジー・ディトマー゛°スイン・ソリ
ド・フィルムス” (G、Dittmer:  ”Th
1nSolid Films”)、9巻、317頁、 
 (1972年)1、ITO薄膜によるもの[エム・ハ
ートウェル・アンド・シー・ジー・フォンスタッド“ア
イ・イー・イー・イー・トランス・イー・ディー・コン
フ”(M、 Hartwell and C,G、 F
onstad:  ”IEEE TransED Co
nf、” )519頁、  (1975年)]、カーボ
ン薄膜によるもの[荒木久他: “真空”、第26巻、
第1号、22頁、  (1983年)]とが報告されて
いる。
As this surface conduction type emission device, one using the SnO□(sb) thin film developed by Ellingson et al.
Thin films [G. Dittmer: "Th
1nSolid Films”), volume 9, page 317,
(1972) 1. Using ITO thin film [M. Hartwell and C.G. Fonstad “I.E.E. Trans.E.D. F
onstad: ”IEEE TransED Co
nf,” p. 519, (1975)], by carbon thin film [Hisashi Araki et al.: “Vacuum”, Vol. 26,
No. 1, p. 22, (1983)].

これらの表面伝導形放出素子は、 l)高い電子放出効率が得られる、 2)構造が簡単であるため、製造が容易である、3)同
一基板上に多数の素子を配列形成できる等の利点を有す
る。
These surface conduction type emitters have the following advantages: l) high electron emission efficiency can be obtained; 2) the structure is simple, making it easy to manufacture; and 3) many elements can be arrayed on the same substrate. has.

この素子においては、電子放出を行う前に予めフォーミ
ングと呼ばれる通電処理によって電気的に高抵抗な状態
にした電子放出部を形成している。
In this element, before electron emission is performed, an electron-emitting region is formed in an electrically high-resistance state by an energization process called forming.

一方、このフォーミングを施さないで微粒子を分散形成
する方法や、熱処理による局所的な析出現象を利用する
方法で作製した素子に通電処理を施し、素子の電気伝導
性を向上させて電子放出部を形成する製法も提案されて
いる。
On the other hand, devices fabricated by a method in which fine particles are dispersed without forming, or a method that utilizes local precipitation phenomena due to heat treatment, are subjected to energization treatment to improve the electrical conductivity of the device and create an electron-emitting region. A manufacturing method for forming it has also been proposed.

以下、前記表面伝導形電子放出素子を使用したディスプ
レイの従来例を図面に沿って説明する。
Hereinafter, a conventional example of a display using the surface conduction type electron-emitting device will be explained with reference to the drawings.

第2図は、平面型のディスプレイの構成を示すものであ
る。
FIG. 2 shows the configuration of a flat display.

第2図において、後方から前方に向かって順に、電子放
出素子12を配置した背面基板11、第1のスペーサー
13.電子ビーム流を制御する制御電極14と電子ビー
ムを蛍光面に集束させるための集束電極16とを具備し
た、一定の間隔で孔21のおいている電極基板15.第
2のスペーサー17.蛍光体18及び電子ビーム加速電
極を具備したフェースプレート19が構成されており、
上記構成部品は、端部な低融点ガラスフリットにて封着
され内部を真空にして収納される。真空排気は、真空排
気管20にて排気される。
In FIG. 2, in order from the back to the front, there is a rear substrate 11 on which an electron-emitting device 12 is arranged, a first spacer 13. An electrode substrate 15 with holes 21 at regular intervals, comprising a control electrode 14 for controlling the electron beam flow and a focusing electrode 16 for focusing the electron beam on a phosphor screen. Second spacer 17. A face plate 19 includes a phosphor 18 and an electron beam accelerating electrode,
The above-mentioned components are sealed with a low-melting glass frit at the end and housed in a vacuum. Evacuation is carried out through a vacuum exhaust pipe 20.

スペーサー17や電極基板15は、ガラス、セラミック
ス等を使用し、制御電極14.集束電極16等は、スク
リーン印刷蒸着等により形成される。
The spacer 17 and the electrode substrate 15 are made of glass, ceramics, etc., and the control electrode 14. The focusing electrode 16 and the like are formed by screen printing vapor deposition or the like.

排気は真空の質を長期的に維持するため、前記フェース
プレート、基板、スペーサーの外囲器全体を加熱脱ガス
処理後あるいは処理をしながら行う。低融点ガラスフリ
ットの軟化後封着して冷却し真空排気部を封止して終了
する。即ち、フェースプレート19とスペーサー13と
基板llとの間は、融着した低融点ガラスにより密着し
、気密構造になっている。
In order to maintain vacuum quality over a long period of time, evacuation is performed after or while the entire envelope of the face plate, substrate, and spacer is heated and degassed. After the low melting point glass frit is softened, it is sealed and cooled, and the vacuum exhaust part is sealed. That is, the face plate 19, the spacer 13, and the substrate 11 are in close contact with each other by the fused low-melting glass, forming an airtight structure.

[発明が解決しようとする課題] しかしながら、この表面伝導形電子放出素子を利用した
平面型ディスプレイの製造方法は、表面伝導形電子放出
素子に通電処理を施した後、素子を含む基板とフェース
プレートとスペーサーを加熱して脱ガス処理しつつある
いは処理後に真空引きして封着していた。その結果、通
電処理によって得られていた素子の電子放出特性が劣化
し易く、時には電子放出しな(なる場合もあった。この
様な問題点があるため、表面伝導形電子放出素子を利用
した平面型ディスプレイにおいては、素子構造が簡単と
いう利点があるにもかかわらず、素子特性を生かしきれ
ず、同特性の複数の素子を使う場合でも、製造した平面
型ディスプレイは、輝度ムラが生じるなど応用上信頼性
の点で困難を生じていた。
[Problems to be Solved by the Invention] However, the method for manufacturing a flat display using this surface conduction type electron-emitting device is such that after applying electricity to the surface conduction type electron-emitting device, the substrate containing the device and the face plate are separated. The spacer was heated and degassed, or after the process, it was evacuated and sealed. As a result, the electron-emitting properties of the device that had been obtained through energization tend to deteriorate, and in some cases, the device did not emit electrons. Although flat displays have the advantage of having a simple element structure, they cannot take full advantage of the element characteristics, and even when multiple elements with the same characteristics are used, the manufactured flat displays may suffer from uneven brightness or other problems. However, this caused difficulties in terms of reliability.

[課題を解決するための手段] 本発明は、1つ又は複数の表面伝導形電子放出素子を設
けた基板と、その基板上の素子と対向するフェースプレ
ートとを、分離支持するスペーサーを介して気密封止し
、外囲器を構成する平面型ディスプレイの製造方法にお
いて、基板及びフェースプレートガラス、スペーサーを
加熱して脱ガス処理する工程と気密封止する工程との間
に、真空中で表面伝導形電子放出素子に通電処理をする
ことを特徴とする平面型ディスプレイの製造方法である
[Means for Solving the Problems] The present invention provides a method for separating and supporting a substrate provided with one or more surface conduction electron-emitting devices and a face plate that faces the devices on the substrate via a spacer. In a method for manufacturing a flat display that is hermetically sealed and constitutes an envelope, the surface is heated in a vacuum between the step of heating and degassing the substrate, face plate glass, and spacer, and the step of hermetically sealing. This is a method for manufacturing a flat display, which is characterized by subjecting a conduction type electron-emitting device to electricity.

本発明により、表面伝導形電子放出素子を利用した平面
型ディスプレイにおいて該素子の特性を損うことな(、
信頼性のある平面型ディスプレイの作製が容易になる。
According to the present invention, in a flat display using a surface conduction electron-emitting device, the characteristics of the device are not impaired.
It becomes easier to manufacture reliable flat displays.

本発明の製造方法で性能が損われなくなる理由は、未だ
明確ではないが、通電処理により生じる島状構造体の形
成、微小粒子移動再配列等に起因した、表面へのガス吸
着1表面化学結合の変化。
The reason why the performance is not impaired by the manufacturing method of the present invention is not yet clear, but it is due to the formation of island-like structures caused by energization treatment, the movement and rearrangement of microparticles, etc. change of.

物理形状の変化等の影響を通電処理前の脱ガス処理、真
空排気により低減させるものと考えられる。
It is thought that the effects of changes in physical shape, etc. can be reduced by degassing and vacuum evacuation before energization.

[実施例] 以下、実施例により本発明の詳細な説明する。[Example] Hereinafter, the present invention will be explained in detail with reference to Examples.

実施例1 清浄な石英基板1上にNiを3000人蒸着レフォトリ
ソグラフィーの手法を使って電極パターン2゜2′を第
1図の如く形成する。第1図中のLは10)zm、 W
は2504tnとした。次に試料基板を第4図に示した
微粒子堆積用の真空装置にセットする。
Example 1 An electrode pattern 2.degree. 2' was formed on a clean quartz substrate 1 by 3000-person evaporation photolithography as shown in FIG. L in Figure 1 is 10)zm, W
was set to 2504tn. Next, the sample substrate is set in a vacuum apparatus for depositing fine particles as shown in FIG.

第4図に示した装置は微粒子生成室41と微粒子堆積室
42及びその2室をつなぐノズル43から構成され、試
料は同図中44の位置にセットされる。排気系45で真
空度を5 X 10−’Torrまで排気した後、Ar
ガス46を微粒子生成室7へ60SCCM流した。作成
条件は微粒子生成室7の圧力5 X 10−”Torr
、微粒子堆積室42の圧力I X 10−’Torr、
ノズル径5φ、ノズル−基板間距離150n+mとした
。次にカーボン製ルツボの蒸発源47よりAuを前述条
件下で蒸発させて生成したAu微粒子をノズル43より
吹き出させ、シャッター48の開閉により、所定量堆積
させる。
The apparatus shown in FIG. 4 is composed of a particle generation chamber 41, a particle deposition chamber 42, and a nozzle 43 that connects the two chambers, and the sample is set at position 44 in the figure. After exhausting the vacuum level to 5 x 10-' Torr with the exhaust system 45, Ar
Gas 46 was flowed into the particle generation chamber 7 at a rate of 60 SCCM. The production conditions are a pressure of 5 x 10-” Torr in the particle generation chamber 7.
, the pressure of the particle deposition chamber 42 I x 10-'Torr,
The nozzle diameter was 5φ, and the distance between the nozzle and the substrate was 150n+m. Next, Au is evaporated from the evaporation source 47 of the carbon crucible under the above conditions, and the generated Au fine particles are blown out from the nozzle 43 and deposited in a predetermined amount by opening and closing the shutter 48 .

このときAu微粒子の堆積厚は80人である。微粒子は
試料全面に配置されるが形成される電子放出特性外のA
u微粒子は実質的に電圧が印加されない為何らの支障も
ない。Au微粒子の径は約40〜150人で中心粒径は
80人であり、Au微粒子は基板上で島状に散在してい
た。このとき素子のシート抵抗は数100にΩ程度であ
った。次に第2図に示した様に基板とスペーサーとフェ
ースプレートを400℃で脱ガス処理した後、真空引き
しながら低融点ガラス、コーニング社半田ガラス757
0を用いて封着する。その後真空引きしつつ冷却して、
電極2゜2′に1〜15Vの電圧を印加しく通電処理)
素子のシート抵抗が数10にΩ以下になった時点で電圧
印加をやめ真空排気部を封止する。このときの真空度は
3 X 10−’Torr以上であった。
At this time, the deposited thickness of the Au fine particles was 80 mm. Although the fine particles are arranged on the entire surface of the sample, A outside the electron emission characteristics is formed.
Since no voltage is substantially applied to the u-fine particles, there is no problem. The diameter of the Au fine particles was approximately 40 to 150 mm, with a central particle size of 80 mm, and the Au fine particles were scattered on the substrate in the form of islands. At this time, the sheet resistance of the element was on the order of several hundred ohms. Next, as shown in Figure 2, after degassing the substrate, spacer, and face plate at 400°C, a low melting point glass, Corning Solder Glass 757, was applied while vacuuming.
Seal using 0. Then, cool while vacuuming,
Electrification treatment to apply a voltage of 1 to 15 V to electrode 2゜2')
When the sheet resistance of the element becomes several tens of ohms or less, the voltage application is stopped and the evacuation section is sealed. The degree of vacuum at this time was 3 x 10-'Torr or more.

こうして、本発明の製造方法で作製した素子と脱ガス前
に通電処理して作製した素子(比較例)を10点ずつ作
製して比較した特性結果を表1に示す。結果をみてもわ
かるとおり、本実施例の電子放出特性が劣化せず、バラ
ツキも小さく保っているのがわかる。
In this way, 10 devices were fabricated using the manufacturing method of the present invention and 10 devices fabricated by applying current to the device before degassing (comparative example). Table 1 shows the characteristic results. As can be seen from the results, it can be seen that the electron emission characteristics of this example did not deteriorate and the variation was kept small.

実施例2 第3図の如(、白板ガラス基板からなる絶縁性基板1上
に膜厚1000人のAgからなる薄膜4と膜厚1000
人のAgからなる電極2,2′をフォトリソグラフィー
の手法を使って形成した。次いで、実施例1と同じよう
に脱ガス処理しつつ、低融点ガラスで封着し、同時に真
空度I X 10−、’Torr以上で電極間に約30
Vの電圧を印加し、薄膜4に通電し、これにより発生す
るジュール熱で薄膜4を局所的に電気的に高抵抗な状態
数にΩ〜数10にΩにした電子放出部を形成し、真空排
気部を封止した。表1に結果を示したが本実施例の電子
放出特性は劣化があまり見られず、バラツギも小さく保
っているのがわかる。
Example 2 As shown in FIG.
Electrodes 2 and 2' made of human Ag were formed using photolithography. Next, while degassing in the same manner as in Example 1, sealing was performed with low melting point glass, and at the same time, a vacuum of about 30 m
Applying a voltage of V and energizing the thin film 4, the Joule heat generated thereby forms an electron emitting region in which the thin film 4 is locally electrically in a high resistance state with a number of Ω to several tens of Ω. The vacuum exhaust part was sealed. The results are shown in Table 1, and it can be seen that the electron emission characteristics of this example show little deterioration and the variation is kept small.

なお、本電子放出素子における電(玉材やその厚み、素
子の形状、電極ギャップ部の幅W、ギャップ間隔し、微
粒子材料とその形成方法(例えば塗布ディッピング法や
蒸着法)は、本実施例に限定されるものでな(公知のも
のが使用できるのはいうまでもない。
Note that the electron emitter of the present electron-emitting device (bead material and its thickness, shape of the device, width W of the electrode gap portion, gap spacing, fine particle material and its formation method (for example, coating dipping method or vapor deposition method) are as described in this example. (It goes without saying that known ones can be used.

表1 [発明の効果] 以上説明したように、1つ又は複数の表面伝導形電子放
出素子を設けた基板と、その基板」二の素子に対向する
フェースプレー1・とを分離支持するスペーサーを介し
て気密封止して外囲器を構成する平面型ディスプレイの
製造方法において、基板及びフェースプレートガラス、
スペーサーを加熱して脱ガス処理する工程と気密封止す
る工程との間に真空中で表面伝導形電子放出素子に通電
処理することで電子放出特性を劣化させず、複数の素子
を使う場合でも、バラツキが少なく応用上信頼できる平
面型ディスプレイが提供できるという効果がある。
Table 1 [Effects of the Invention] As explained above, a spacer is provided to separate and support a substrate provided with one or more surface conduction electron-emitting devices and a face plate 1 facing the second device of the substrate. A method for manufacturing a flat display in which an envelope is hermetically sealed through a substrate and a face plate glass;
By applying electricity to the surface conduction electron-emitting device in vacuum between the process of heating and degassing the spacer and the process of hermetically sealing it, the electron-emitting properties of the surface conduction type electron-emitting device are not deteriorated, even when multiple devices are used. This has the effect of providing a flat display that has little variation and is reliable in terms of application.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を表わす電子放出素子の模式
的平面図、第2図は平面型ディスプレイの構造を説明す
る見取図、第3図は本発明の別の実施例に用いた電子放
出素子の模式的平面図、第4図は電極間に微粒子を堆積
させる一実施例の真空装置図である。 1・・・絶縁基板     2,2′・・・電極3.5
・・・電子放出部  4・・・薄膜11・・・背面基板
     12・・・電子放出素子13、17・・・ス
ペーサー  14・・・制御電極15・・・電極基板 
    16・・・集束電極18・・・蛍光体    
  19・・・フェースプレート20・・・真空排気管
    41・・・微粒子生成室42・・・微粒子堆積
室   43・・・ノズル44・・・試料素子    
 45・・・排気系46・・・導入ガス(Ar)   
 47・・・蒸発源48・・・シャッター
FIG. 1 is a schematic plan view of an electron-emitting device representing one embodiment of the present invention, FIG. 2 is a sketch diagram explaining the structure of a flat display, and FIG. 3 is a schematic plan view of an electron-emitting device used in another embodiment of the present invention. FIG. 4 is a schematic plan view of the emitting device, and is a diagram of a vacuum apparatus of an embodiment for depositing fine particles between electrodes. 1... Insulating substrate 2, 2'... Electrode 3.5
... Electron emission part 4 ... Thin film 11 ... Back substrate 12 ... Electron emission elements 13, 17 ... Spacer 14 ... Control electrode 15 ... Electrode substrate
16... Focusing electrode 18... Fluorescent material
19...Face plate 20...Evacuation pipe 41...Particle generation chamber 42...Particle deposition chamber 43...Nozzle 44...Sample element
45... Exhaust system 46... Introduced gas (Ar)
47... Evaporation source 48... Shutter

Claims (1)

【特許請求の範囲】[Claims] 平面型ディスプレイの製造方法において、基板及びフェ
ースプレートガラス、スペーサーを加熱して脱ガス処理
する工程と、気密封止する工程との間に、真空中で表面
伝導形電子放出素子に通電処理をすることを特徴とする
平面型ディスプレイの製造方法。
In a method for manufacturing a flat display, between the step of heating and degassing the substrate, face plate glass, and spacer, and the step of hermetically sealing, the surface conduction electron-emitting devices are energized in a vacuum. A method for manufacturing a flat display, characterized by:
JP11861689A 1989-05-15 1989-05-15 Method of manufacturing flat display Expired - Fee Related JP2715318B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11861689A JP2715318B2 (en) 1989-05-15 1989-05-15 Method of manufacturing flat display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11861689A JP2715318B2 (en) 1989-05-15 1989-05-15 Method of manufacturing flat display

Publications (2)

Publication Number Publication Date
JPH02299131A true JPH02299131A (en) 1990-12-11
JP2715318B2 JP2715318B2 (en) 1998-02-18

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP11861689A Expired - Fee Related JP2715318B2 (en) 1989-05-15 1989-05-15 Method of manufacturing flat display

Country Status (1)

Country Link
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5505647A (en) * 1993-02-01 1996-04-09 Canon Kabushiki Kaisha Method of manufacturing image-forming apparatus
KR100307174B1 (en) * 1997-09-19 2002-07-18 모리시타 요이찌 Manufacturing method & equipment of liquid crystal display panel

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000315458A (en) * 1999-04-28 2000-11-14 Toshiba Corp Method and equipment for manufacturing flat-type image display device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5505647A (en) * 1993-02-01 1996-04-09 Canon Kabushiki Kaisha Method of manufacturing image-forming apparatus
KR100307174B1 (en) * 1997-09-19 2002-07-18 모리시타 요이찌 Manufacturing method & equipment of liquid crystal display panel

Also Published As

Publication number Publication date
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