JPH02257622A - Processing of compound semiconductor material - Google Patents
Processing of compound semiconductor materialInfo
- Publication number
- JPH02257622A JPH02257622A JP7925789A JP7925789A JPH02257622A JP H02257622 A JPH02257622 A JP H02257622A JP 7925789 A JP7925789 A JP 7925789A JP 7925789 A JP7925789 A JP 7925789A JP H02257622 A JPH02257622 A JP H02257622A
- Authority
- JP
- Japan
- Prior art keywords
- etching
- compound semiconductor
- gas
- mask
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 49
- 150000001875 compounds Chemical class 0.000 title claims abstract description 39
- 239000000463 material Substances 0.000 title claims abstract description 29
- 238000005530 etching Methods 0.000 claims abstract description 89
- 238000000034 method Methods 0.000 claims abstract description 19
- 239000004215 Carbon black (E152) Substances 0.000 claims abstract description 13
- 229930195733 hydrocarbon Natural products 0.000 claims abstract description 13
- 150000002430 hydrocarbons Chemical class 0.000 claims abstract description 13
- 238000003672 processing method Methods 0.000 claims description 8
- 239000000758 substrate Substances 0.000 abstract description 33
- 239000007789 gas Substances 0.000 abstract description 32
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 abstract description 24
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 22
- 238000001020 plasma etching Methods 0.000 abstract description 12
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 11
- 239000000377 silicon dioxide Substances 0.000 abstract description 11
- 239000012495 reaction gas Substances 0.000 abstract description 2
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 12
- 238000010586 diagram Methods 0.000 description 8
- 239000013078 crystal Substances 0.000 description 6
- 238000001312 dry etching Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 4
- 230000007797 corrosion Effects 0.000 description 4
- 238000005260 corrosion Methods 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- 239000000460 chlorine Substances 0.000 description 2
- 229910052801 chlorine Inorganic materials 0.000 description 2
- -1 2 is a Sin Substances 0.000 description 1
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 description 1
- OTMSDBZUPAUEDD-UHFFFAOYSA-N Ethane Chemical compound CC OTMSDBZUPAUEDD-UHFFFAOYSA-N 0.000 description 1
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- 240000002329 Inga feuillei Species 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000009972 noncorrosive effect Effects 0.000 description 1
- 231100000252 nontoxic Toxicity 0.000 description 1
- 230000003000 nontoxic effect Effects 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 239000004408 titanium dioxide Substances 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- 231100000419 toxicity Toxicity 0.000 description 1
- 230000001988 toxicity Effects 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Landscapes
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は化合物半導体材料の加工方法に関し、特に、
燐化インジウム（ＩｎＰ）、砒化ガリウム（ＧａＡｓ）
およびその混晶半導体であるインジウム、ガリウム・砒
素混晶（Ｉ ｎＧａ、Ａｓ） 、インジウム・ガリウム
・砒素・燐混晶（ＩｎＧａＡｓＰ）やアルミ・ガリウム
・砒素混晶（ＡＩＧａＡｓ）等のｍ−ｖ族化合物半導体
材料のエツチング加工方法に関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for processing compound semiconductor materials, and in particular,
Indium phosphide (InP), gallium arsenide (GaAs)
and m-v group semiconductors such as indium, gallium-arsenic mixed crystal (InGa, As), indium-gallium-arsenic-phosphorus mixed crystal (InGaAsP), and aluminum-gallium-arsenic mixed crystal (AIGaAs), which are mixed crystal semiconductors. The present invention relates to an etching method for compound semiconductor materials.
半導体レーザ、発光ダイオードあるいはフォトダイオー
ドといった光素子とトランジスタ等の電子素子をモノリ
シックに集積する光電子集積回路（ＯＥＩＣ）を作製す
る場合に、光素子と電子素子の構造上の違いから素子間
に段差が生じ、垂直な側壁を持つエツチング方法では、
内部配線形成時に断線が生じる恐れがあった。−船釣に
、化合物半導体の加工方法としてはエツチングに溶液を
使用したウェットエツチングが使われるが、この方法で
は半導体の結晶方位によってエツチング形状が異なるた
め、必要なところに緩やかな傾斜面を必ずしも形成でき
ないことがある。そこで結晶方位に依存しないエツチン
グ形状が得られるドライエツチングが行われる。このよ
うなドライエ・ツチングを用いて、ｍ−ｖ族化合物半導
体材料を傾斜を持たせてエツチングする方法としては第
６図に示すものがある。When manufacturing an optoelectronic integrated circuit (OEIC) that monolithically integrates optical elements such as semiconductor lasers, light emitting diodes, or photodiodes and electronic elements such as transistors, differences in structure between the optical elements and the electronic elements may cause differences in the level between the elements. In the etching method, which has vertical sidewalls,
There was a risk of disconnection occurring during internal wiring formation. - Wet etching, which uses a solution for etching, is used as a processing method for compound semiconductors in boat fishing, but with this method, the etching shape differs depending on the crystal orientation of the semiconductor, so it is not always possible to form gently sloped surfaces where necessary. There are things I can't do. Therefore, dry etching is performed to obtain an etched shape that does not depend on the crystal orientation. A method of etching an m-v group compound semiconductor material with a slope using such dry etching is shown in FIG.
即ち、第６図は例えば、Ｈ，サイトウ等 エレクトロニ
クスレターズ（Ｈ，５ＡＩＴ、Ｏｅｔ、 ａｌ、、 Ｉ
’！１ｅｅｔｒｏｎｉｃｓ Ｌｅｔｔｅｒｓ、 Ｖｏｌ
、２２． Ｎｏ、１＋ ｐ、３６−３８ （１９８６）
）で示された従来の化合物半導体材料の加工方法を示す
図であり、図において、１はＩｎＰ基板、９はエツチン
グマスクである二酸化チタン（ＴｉＯ□）膜、７は反応
性イオンエツチング（Ｒｅａｃｔｉｖｅ ＩｏｎＦ、
ｔｃｈ ｉ ｒａｇ）装置の陰極、８はその陽極である
。That is, Figure 6 is, for example, H. Saito et al. Electronics Letters (H.
'! 1eetronics Letters, Vol.
, 22. No, 1+ p, 36-38 (1986)
), in which 1 is an InP substrate, 9 is a titanium dioxide (TiO□) film which is an etching mask, and 7 is a reactive ion etching (Reactive IonF) film. ,
tch i rag) device's cathode, 8 is its anode.
次に、従来の化合物半導体の傾斜面を形成するドライエ
ツチング方法について説明する。 ！ｎＰ基板１は反
応性イオンエツチング装置内で、陰極７上に傾けた状態
で保持し、塩素（Ｃ１ｚ）とアルゴン（Ａｒ）の混合ガ
スを装置内に導入し、ガス圧力を０．４５Ｐａとして、
高周波電力密度００１６Ｗ／−でプラズマ生成させ、塩
素（ｃｉｚ）イオンをＩｎＰ基板１にあて、塩素（ｃｌ
ｚ）との反応化合物を生成させることによってエツチン
グを行なう。Next, a conventional dry etching method for forming an inclined surface of a compound semiconductor will be explained. ! The nP substrate 1 is held tilted above the cathode 7 in a reactive ion etching device, and a mixed gas of chlorine (C1z) and argon (Ar) is introduced into the device, and the gas pressure is set to 0.45 Pa.
Plasma is generated at a high frequency power density of 0016 W/-, and chlorine (ciz) ions are applied to the InP substrate 1.
Etching is carried out by forming a reaction compound with z).
エツチング側面の傾斜角度Ｃ，Ｄは、第７図に示すよう
にＩｎＰ基板１の傾斜角度θによって決定される。The inclination angles C and D of the etched side surfaces are determined by the inclination angle θ of the InP substrate 1, as shown in FIG.
一般的に反応性イオンエツチングにおいては、放電電極
間の位置によって大きくプラズマの状態が異なるため、
エツチング特性が異なる。従来の化合物半導体における
傾斜面を持つエツチング方法では、被エツチング材料で
ある化合物半導体基板を反応性イオンエツチング装置の
電極に対して傾斜させているため、この影響を受け、半
導体基板面内でエツチング特性が一様でなくなる。その
結果、エツチングできるのは小さい面積に限られる。ま
た、反応ガスに塩素ガスを使用しているため、装置の腐
食や毒性に問題があった。In general, in reactive ion etching, the state of the plasma varies greatly depending on the position between the discharge electrodes.
Etching characteristics are different. In the conventional etching method for compound semiconductors with sloped surfaces, the compound semiconductor substrate, which is the material to be etched, is tilted with respect to the electrode of the reactive ion etching device. This affects the etching characteristics within the plane of the semiconductor substrate. is no longer uniform. As a result, only small areas can be etched. Additionally, since chlorine gas was used as the reaction gas, there were problems with equipment corrosion and toxicity.
この発明は上記のような問題点を解消するためになされ
たもので、大きい面積の化合物半導体に対しても、均一
に傾斜した側面を持つエツチング特性が得られるととも
に、毒性や腐食性のないエツチングガスを使用できる化
合物半導体材料の加工方法を得ることを目的とする。This invention was made to solve the above-mentioned problems, and it is possible to obtain etching characteristics with uniformly sloped side surfaces even for large area compound semiconductors, and to achieve etching that is non-toxic and non-corrosive. The objective is to obtain a method for processing compound semiconductor materials that can use gas.
この発明に係る化合物半導体材料の加工方法は、エツチ
ングガスに炭化水素系のガスを使用し、プラズマ電極に
平行に化合物半導体基板を置くとともに、エツチングマ
スクとしてエツチングガスによってエツチングされ、し
かも化合物半導体に対するエツチング速度の比がエツチ
ングガスの流量により可変なエツチングマスク材料を使
用し、そのマスク材料の横方向のエツチングを利用して
化合物半導体のエツチング側壁が傾斜をもつようにエツ
チング加工するようにしたものである。In the method for processing a compound semiconductor material according to the present invention, a hydrocarbon gas is used as an etching gas, a compound semiconductor substrate is placed parallel to a plasma electrode, and the compound semiconductor substrate is etched by the etching gas as an etching mask. This method uses an etching mask material whose speed ratio is variable depending on the flow rate of the etching gas, and uses the lateral etching of the mask material to perform etching so that the etching sidewalls of the compound semiconductor have a slope. .
この発明においては、半導体基板のエツチングとともに
エツチングマスクのエツチングが進行し、エツチングマ
スクの縁が後退するので、傾斜を有する化合物半導体の
エツチング側壁を得ることができる。また、化合物半導
体に対するエツチングマスクのエツチング速度の比がエ
ツチングガスの流量により可変であるため、エツチング
ガスの流量を調節することによって所望の傾斜角のエツ
チング側壁を形成できる。また、さらに炭化水素系のガ
スを使用するため腐食等の心配がな（、プラズマ電極に
対して基板を傾斜させない為、大面積基板でも均一にエ
ツチングを行なうことができる。In this invention, the etching of the etching mask progresses as the semiconductor substrate is etched, and the edges of the etching mask recede, making it possible to obtain etched sidewalls of a compound semiconductor having a slope. Furthermore, since the ratio of the etching rate of the etching mask to the compound semiconductor is variable depending on the flow rate of the etching gas, the etching sidewall can be formed with a desired inclination angle by adjusting the flow rate of the etching gas. Furthermore, since a hydrocarbon-based gas is used, there is no fear of corrosion, etc. (Since the substrate is not tilted with respect to the plasma electrode, even large-area substrates can be etched uniformly.
以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第１図はこの発明の一実施例による化合物半導体材料の
加工方法を実施するための反応性イオンエツチング装置
の概略を示す図であり、図において、１．１′ はＩｎ
Ｐ基板、２．２゛ は二酸化珪素（Ｓｉｎｇ）膜のマス
ク、３は反応性イオンエツチング装置の真空槽、４はメ
タン（ＣＨ４）ガスの導入ボート、５は排気ボート、６
は高周波電源、７は陰電極、８は陽電極である。FIG. 1 is a diagram schematically showing a reactive ion etching apparatus for implementing a compound semiconductor material processing method according to an embodiment of the present invention. In the figure, 1.1' is In
P substrate, 2.2 is a silicon dioxide (Sing) film mask, 3 is a vacuum chamber of a reactive ion etching device, 4 is a methane (CH4) gas introduction boat, 5 is an exhaust boat, 6
is a high frequency power source, 7 is a negative electrode, and 8 is a positive electrode.
ｍ−ｖ族化合物半導体をドライエツチングする方法とし
て、炭化水素系のガス、例えばメタン（ＣＨ４）を使い
、エツチングマスクとして二酸化珪素（Ｓｔｏｔ）膜２
を利用して反応性イオンエツチングを行なうと、第２図
のＡ線に示すように化合物半導体であるＩｎＰ基板１の
エツチング速度は、メタンのエツチングガス流量に比例
して増加するのに対して、二酸化珪素（Ｓ ｉ Ｏ，）
膜２のエツチング速度はＢ線に示すようにあまり変化し
ない、この特性を利用して第３図（ａ）に示すようにＩ
ｎＰ基板１上に形成した５ｈｏｔ膜２をマスクとしてエ
ツチングを行なうとエツチングの進行とともにエツチン
グマスクの二酸化珪素（ＳｉＯ□）膜２も膜厚の減少だ
けでなく、縁から横方向に進むエツチングも起こり、エ
ツチングマスクの縁が後退するので、エツチング後のＩ
ｎＰ基板１′の側壁の形状も垂直ではな（、基板１面に
対して傾斜を持たせることができる（第３図（ｂｌ）、
例えば第２図（ａ）に示すように、二酸化珪素膜２の側
壁の傾斜角度αを１０度に設定し、メタンガス流量５３
ｃｃｍ、電力密度０ 、 ６ Ｗ／ ｃ ｍ”の条件で
エツチングを行なうと、エツチングマスク２に対するＩ
ｎＰ基板１のエツチング速度比はおよそ４゜８となり、
エツチング後のＩｎＰ基板１′の側壁の傾斜角度βを４
５度に形成できる。また、基板１のエツチング傾斜角β
は二酸化珪素膜２の側縁部の傾斜角度αによって変わる
ため、αを変化させることによって、側壁の傾斜角度β
を調整することができ、所望のエツチング深さと傾斜角
度が得られる。As a dry etching method for m-v group compound semiconductors, a hydrocarbon gas such as methane (CH4) is used, and a silicon dioxide (Stot) film 2 is used as an etching mask.
When reactive ion etching is performed using methane, the etching rate of the InP substrate 1, which is a compound semiconductor, increases in proportion to the flow rate of the methane etching gas, as shown by line A in FIG. Silicon dioxide (S i O,)
The etching rate of film 2 does not change much as shown in line B.Using this characteristic, the etching rate of film 2 is changed as shown in FIG. 3(a).
When etching is performed using the 5-hot film 2 formed on the nP substrate 1 as a mask, as the etching progresses, not only the thickness of the silicon dioxide (SiO□) film 2 serving as the etching mask decreases, but also etching progresses laterally from the edge. , since the edge of the etching mask recedes, the I after etching
The shape of the side wall of the nP substrate 1' is also not vertical (it can be inclined with respect to the surface of the substrate (Fig. 3 (bl),
For example, as shown in FIG. 2(a), the inclination angle α of the side wall of the silicon dioxide film 2 is set to 10 degrees, and the methane gas flow rate is 53.
ccm, power density 0, 6 W/cm'', the I for etching mask 2 is
The etching speed ratio of the nP substrate 1 is approximately 4°8,
The inclination angle β of the side wall of the InP substrate 1' after etching is set to 4
It can be formed in 5 degrees. Also, the etching inclination angle β of the substrate 1
changes depending on the inclination angle α of the side edge of the silicon dioxide film 2, so by changing α, the inclination angle β of the side wall can be changed.
can be adjusted to obtain the desired etching depth and inclination angle.
また、第２図に示すようにエツチングガスの流量の変化
により、半導体基板１とマスク２のエツチング速度比ｒ
（＝ＩｎＰ／ＳｉＯ□）が変わるので、例えば一定の傾
斜角αを有するマスク２を用いた場合にもエツチングガ
スの流量を調節することにより、所望の基板のエツチン
グの傾斜角βを得ることができる。Furthermore, as shown in FIG. 2, the etching rate ratio r between the semiconductor substrate 1 and the mask 2 changes due to the change in the flow rate of the etching gas.
(= InP/SiO can.
以上のように本実施例によれば、所望の傾斜を有する化
合物半導体のエツチング側壁を得ることができるととも
に、エツチングガスに炭化水素系のガスを使用するため
腐食等の心配がなく、また、プラズマＩＩ橿に対して基
板を傾斜させない為、大面積基板でも均一にエツチング
を行なうことができる。As described above, according to this embodiment, it is possible to obtain etched side walls of a compound semiconductor having a desired slope, and since a hydrocarbon-based gas is used as the etching gas, there is no fear of corrosion, etc. Since the substrate is not tilted with respect to the II edge, even large-area substrates can be etched uniformly.
なお、上記実施例では炭化水素系のエツチングガスとし
て、メタン（ＣＨ４）ガスを使用した場合について述べ
たが、エタン（Ｃ２Ｈ４）ガスを使用するようにしても
上記実施例と同様の特性が得られる。In addition, although the above example describes the case where methane (CH4) gas is used as the hydrocarbon-based etching gas, the same characteristics as in the above example can be obtained even if ethane (C2H4) gas is used. .
また、上記実施例ではエツチングマスクとして、二酸化
珪素（Ｓｔａｇ）膜２を使用した場合について述べたが
、これは窒化珪素（ＳｉＮｘ）膜等、エツチングガスに
よってエツチングされ、被エツチング半導体のエツチン
グ速度に近いエツチング速度を有するものであればよい
。Furthermore, in the above embodiment, a case was described in which a silicon dioxide (Stag) film 2 was used as an etching mask, but this is a silicon nitride (SiNx) film, etc., which is etched by an etching gas and whose etching rate is close to that of the semiconductor to be etched. Any material having an etching speed may be used.
また、上記実施例ではｍ−ｖ族化合物半導体材料として
ＩｎＰ基板をエツチングする場合について述べたが、他
のｍ−ｖ族化合物半導体材料、例えばＧａＡｓ、、Ａｌ
ＧａＡｓ、、ＩｎＧａＡｓ、■ｎＧａＡｓＰ等に対して
も上記実施例と同様の効果が期待できる。Further, in the above embodiment, a case was described in which an InP substrate was etched as the m-v group compound semiconductor material, but other m-v group compound semiconductor materials, such as GaAs, Al, etc.
The same effects as in the above embodiment can be expected for GaAs, InGaAs, nGaAsP, etc.
また、上記実施例では、ドライエツチング法として反応
性イオンエツチング法を使用する場合について述べたが
、反応性イオンビームエツチング（Ｒｅａｃｔｉｖｅ
Ｗｏｎ Ｂｅａｍ Ｅｔｃｈｉｎｇ）法やＥ ＣＲ（Ｅ
ｌｅｃｔｒｏｎ Ｃｙｃｌｏｔｒｏｎ Ｒｅ５ｏｎａｎ
ｃｅ）エツチング法等の他のドライエツチング法におい
ても、炭化水素系ガスを使用することによって同様の効
果が期待できる。Further, in the above embodiment, the case where reactive ion etching was used as the dry etching method was described, but reactive ion beam etching (Reactive
Won Beam Etching) method and ECR (E
lectron Cyclotron Re5onan
Similar effects can be expected by using hydrocarbon gas in other dry etching methods such as ce) etching.
さらに、上記実施例では、エツチング時はエツチングガ
スの流量を変えない場合の特性について述べたが、エツ
チングガスの流量をエツチング中に連続的に増加させて
いくようにすると、第４図に示す本発明の第２の実施例
のように、深さ方向に曲率を持った側壁を有するような
ＩｎＰ基板ｌ゛を作製することが可能となる。Furthermore, in the above embodiment, the characteristics were described when the flow rate of the etching gas was not changed during etching, but if the flow rate of the etching gas was continuously increased during etching, the characteristics shown in FIG. As in the second embodiment of the invention, it is possible to fabricate an InP substrate l' having sidewalls having curvature in the depth direction.
また、上記実施例ではエツチングマスク２の縁は直線に
なるように形成されていたが、これは第５図の本発明の
第３の実施例に示すように、エツチングマスク２の縁に
直線ではなく曲率を持たせることにより、エツチング側
壁の形状に曲率を持たせるごともできる。このような曲
率を持った側壁はレンズ作用のある反射面として使用で
き、光素子に適用することができる。Further, in the above embodiment, the edge of the etching mask 2 was formed to be a straight line, but as shown in the third embodiment of the present invention in FIG. By giving the etched side wall a curvature, it is possible to give the etched side wall a curvature. A side wall having such a curvature can be used as a reflective surface with a lens effect, and can be applied to an optical element.
以上のように、この発明によればドライイオンエツチン
グ装置を使用し、化合物半導体材料のエツチングに炭化
水素系のガスを反応ガスとして用い、エツチングマスク
としては半導体材料に近いエツチング速度を持つものを
使用するようにしたので、半導体基板のエツチングとと
もにエツチングマスクにもエツチングが進行し、これに
伴い、エツチングマスクの縁が後退するので、傾斜を有
する化合物半導体のエツチング側壁を得ることができる
。また、炭化水素系のガスを使用するため腐食等の心配
がなく、プラズマ電極に対して基板を傾斜させない為、
大面積基板でも均一にエツチングを行なうことができる
。As described above, according to the present invention, a dry ion etching apparatus is used, a hydrocarbon gas is used as a reactive gas for etching a compound semiconductor material, and an etching mask having an etching rate close to that of the semiconductor material is used. As a result, etching progresses on the etching mask as well as on the semiconductor substrate, and as a result, the edge of the etching mask recedes, making it possible to obtain a sloped etched sidewall of the compound semiconductor. In addition, since hydrocarbon-based gas is used, there is no need to worry about corrosion, and since the substrate is not tilted relative to the plasma electrode,
Even large-area substrates can be etched uniformly.
第１図はこの発明の化合物半導体材料の加工方法に使用
された反応性イオンエツチング装置の概略図、第２図は
この発明の化合物半導体材料の加工方法による反応性イ
オンエツチング装置を使って得られたＩｎＰ基板と二酸
化珪素（ＳｉＯｚ）膜のメタン（ＣＨ４）のガス流量と
エツチング速度の関係を示す実験結果の一例を示す図、
第３図＋ａ）、 （ｂ）はこの発明の第１の実施例によ
る化合物半導体材料の加工方法を示す図、第４図はこの
発明の第２の実施例による化合物半導体材料の加工方法
による化合物半導体の加工状態を示す図、第５図はこの
発明の第３の実施例による化合物半導体材料の加工方法
を示す図、第６図は従来の実施例によるｍ−ｖ族化合物
半導体の加工方法を示す図、第７図はこの従来の実施例
によるＩｎＰ基板のエツチング特性を示す図である。
１はＩｎＰ基板、２はＳｉｎ、膜、３は反応性イオンエ
ツチング装置の真空槽、４はメタンガスの導入ポート、
５は排気ボート、６は高周波電源、７は高周波電極の陰
極、８は陽極である。
なお図中同一符号は同−又は相当部分を示す。FIG. 1 is a schematic diagram of a reactive ion etching apparatus used in the compound semiconductor material processing method of the present invention, and FIG. 2 is a schematic diagram of a reactive ion etching apparatus used in the compound semiconductor material processing method of the present invention. A diagram showing an example of experimental results showing the relationship between methane (CH4) gas flow rate and etching rate of an InP substrate and a silicon dioxide (SiOz) film,
Figures 3+a) and (b) are diagrams showing a method for processing a compound semiconductor material according to the first embodiment of the present invention, and Figure 4 shows a method for processing a compound semiconductor material according to a second embodiment of the invention. FIG. 5 is a diagram showing a processing method of a compound semiconductor material according to a third embodiment of the present invention, and FIG. 6 is a diagram showing a processing method of a m-v group compound semiconductor according to a conventional embodiment. The figure shown in FIG. 7 is a diagram showing the etching characteristics of an InP substrate according to this conventional embodiment. 1 is an InP substrate, 2 is a Sin, film, 3 is a vacuum chamber of a reactive ion etching device, 4 is a methane gas introduction port,
5 is an exhaust boat, 6 is a high frequency power source, 7 is a cathode of the high frequency electrode, and 8 is an anode. Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
合物半導体材料の加工方法において、上記エッチングの
ガスとして炭化水素系ガスを用い、 プラズマ電極に平行に上記化合物半導体材料を配置し、 上記炭化水素系ガスによってエッチングされ、しかもそ
の、上記化合物半導体に対するエッチング速度の比が、
上記炭化水素系ガスの流量により可変であるエッチング
マスク材料を用い、 該マスク材料の横方向のエッチングを利用して上記化合
物半導体のエッチング側壁が傾斜をもつようにエッチン
グ加工することを特徴とする化合物半導体材料の加工方
法。(1) In a compound semiconductor material processing method in which a compound semiconductor material is processed by etching, a hydrocarbon gas is used as the etching gas, the compound semiconductor material is arranged parallel to a plasma electrode, and the hydrocarbon gas is used to process the compound semiconductor material by etching. etched, and the ratio of the etching rate to that of the compound semiconductor is
A compound characterized in that, using an etching mask material that is variable depending on the flow rate of the hydrocarbon gas, the etching process is performed so that the etched sidewall of the compound semiconductor has an inclination by using the lateral etching of the mask material. Processing methods for semiconductor materials.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7925789A JPH02257622A (en) | 1989-03-29 | 1989-03-29 | Processing of compound semiconductor material |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7925789A JPH02257622A (en) | 1989-03-29 | 1989-03-29 | Processing of compound semiconductor material |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02257622A true JPH02257622A (en) | 1990-10-18 |
Family
ID=13684804
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7925789A Pending JPH02257622A (en) | 1989-03-29 | 1989-03-29 | Processing of compound semiconductor material |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02257622A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6159735A (en) * | 1984-08-30 | 1986-03-27 | Matsushita Electric Ind Co Ltd | Crystal etching method |
| JPS6415931A (en) * | 1987-06-04 | 1989-01-19 | Philips Nv | Manufacture of semiconductor device |
-
1989
- 1989-03-29 JP JP7925789A patent/JPH02257622A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6159735A (en) * | 1984-08-30 | 1986-03-27 | Matsushita Electric Ind Co Ltd | Crystal etching method |
| JPS6415931A (en) * | 1987-06-04 | 1989-01-19 | Philips Nv | Manufacture of semiconductor device |
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