JPH02239697A - Manufacture of circuit board - Google Patents

Manufacture of circuit board

Info

Publication number
JPH02239697A
JPH02239697A JP1060199A JP6019989A JPH02239697A JP H02239697 A JPH02239697 A JP H02239697A JP 1060199 A JP1060199 A JP 1060199A JP 6019989 A JP6019989 A JP 6019989A JP H02239697 A JPH02239697 A JP H02239697A
Authority
JP
Japan
Prior art keywords
ceramic green
sheet
capacitor
electrodes
green sheet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1060199A
Other languages
Japanese (ja)
Inventor
Hideto Kamiaka
上赤 日出人
Senjo Yamagishi
山岸 千丈
Shuichi Kawaminami
修一 川南
Shinji Ishii
石井 信次
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nihon Cement Co Ltd
Original Assignee
Nihon Cement Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nihon Cement Co Ltd filed Critical Nihon Cement Co Ltd
Priority to JP1060199A priority Critical patent/JPH02239697A/en
Publication of JPH02239697A publication Critical patent/JPH02239697A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To improve the packaging density by boring holes large enough to form capacitors in a ceramic green sheet, filling said holes with dielectric paste, laminating ceramic green sheets on which electrodes are printed on both faces of the ceramic green sheet, and firing said sheets integratedly to form the capacitors. CONSTITUTION:A ceramic green sheet 1, in which holes large enough to form capacitors are bored, is mounted on a peeling film 7 and the bored hole parts are filled with dielectric 3 paste 8. After drying, the sheet 1, having holes filled with the dielectric 8, is peeled off the peeling film 7 and placed, laminated, and adhered by thermocompression bonding between a pair of ceramic green sheets 4 and 9, having electrodes 5 printed beforehand thereon and in the through holes 6 therein, and said ceramic sheets are fired integratedly to form capacitors. A circuit substrate including the capacitors thus formed has flat surfaces to hardly cause peeling between the dielectric layer and the electrodes and between the dielectric layer and the insulating layer.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は,回路基板の製造方法に関し、特にコンデンサ
を内蔵したセラミック回路基板をセラミックグリーンシ
ートより製造する回路基板の製造方法に関するものであ
る. [従来の技術1 従来、コンデンサを内蔵するセラミック回路基板を同時
焼成によって製造するには、第9図に示すように,電極
2lを印刷した一対のセラミックグリーンシート22.
23間にセラミックグリーンシートと同じ大きさの誘電
体シ一ト24を挟んで積層した後、その積層体を一体焼
成する方法がある. また,第IO図に示すように,電極2Iを印刷したセラ
ミックグリーンシート23に誘電体層25、26を電極
より少し大きめの大きさで複数個印刷し,その上に、電
極層2lを印刷したセラミックグリーンシート22を積
層し、一体焼成する方法がある. [発明が解決しようとする問題点】 しかしながら、前者の方法では、回路基板の上面の回路
と下面の回路とが誘電体を挟んで交わる部分に浮遊容量
が生じ易い. また,後者の方法では、積層して一体焼成した回路基板
27には、第11図に示すように、誘電体25と隣の誘
電体26との間に位置する回路基板27の表面に凹み2
8が生じたり,第12図に示すように、誘電体25と隣
の誘電体26との間にボイド29が生じ、そのため誘電
体自身または電極2lの一部が剥離する現象が生じる欠
点があった。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a circuit board, and more particularly to a method for manufacturing a circuit board in which a ceramic circuit board with a built-in capacitor is manufactured from a ceramic green sheet. [Prior Art 1] Conventionally, in order to manufacture a ceramic circuit board with a built-in capacitor by simultaneous firing, a pair of ceramic green sheets 22.
There is a method in which a dielectric sheet 24 of the same size as the ceramic green sheet is sandwiched between the ceramic green sheets 23, and then the laminate is integrally fired. In addition, as shown in Figure IO, a plurality of dielectric layers 25 and 26 were printed on the ceramic green sheet 23 on which the electrodes 2I were printed, each having a slightly larger size than the electrodes, and an electrode layer 2L was printed on top of them. There is a method of laminating ceramic green sheets 22 and firing them together. [Problems to be Solved by the Invention] However, in the former method, stray capacitance is likely to occur at the portion where the circuit on the top surface of the circuit board and the circuit on the bottom surface intersect with a dielectric material in between. In addition, in the latter method, the circuit board 27 that is laminated and integrally fired has a recess 2 on the surface of the circuit board 27 located between the dielectric 25 and the adjacent dielectric 26, as shown in FIG.
As shown in FIG. 12, a void 29 is formed between the dielectric 25 and the adjacent dielectric 26, and as a result, the dielectric itself or a part of the electrode 2l peels off. Ta.

E問題点を解決するための手段1 本発明者等は、セラミックグリーンシートの一部をコン
デンサが形成する大きさに打抜き,その打抜き部分に誘
電体ペーストを充填すれば、上記のような欠点が排除で
きるとの知見を得て.本発明を完成させた. すなわち,本発明の要旨は,コンデンサを内蔵する回路
基板の製造方法において、セラミックグリーンシートの
一部をコンデンサの形成される大きさに打抜き,該打抜
き部に誘電体ペーストを充填し、その両面に電極印刷さ
れたセラミックグリーンシートを積層して一体焼成して
コンデンサを形成させることを特徴とする回路基板の製
造方法にある. 本発明において,打抜かれたグリーンシ一トに誘電体ペ
ーストを充填して電極を取り付け、コンデンサ内蔵基板
を裂造するには各種の方法が可能である.すなわち、 (al セラミックグリーンシートの一部をコンデンサ
の形成される大きさに切抜いた後剥離フィルム上に置き
、打抜き部分に誘電体ペーストを充填し、乾燥した後こ
のシートを剥離フィルムから剥し,このシートとは別に
予め電極を印刷しスルーホール印刷した一対のセラミッ
クグリーンシートの間に前記誘電体を充填したシートを
配置して積層熱圧着し,一体焼成してコンデンサを形成
させる方法. (bl電極を印刷しスルホール印刷したセラミックグリ
ーンシートの上に、一部をコンデンサが形成する大きさ
に打抜いたセラミフクグリーンシ一トを載せて積層圧着
し,この積層したシートの打抜き部分に誘電体ペースト
を充填し、乾燥した後,この積層したシートとは別に、
予め電極を印刷しスルホール印刷したセラミックグリー
ンシートをこの積層したシートに乗せて再度積層熱圧着
し,一体焼成してコンデンサを形成さる方法。
Means for Solving Problem E 1 The inventors of the present invention have found that by punching out a portion of a ceramic green sheet to a size that will form a capacitor and filling the punched portion with dielectric paste, the above drawbacks can be overcome. I learned that it can be eliminated. The invention has been completed. That is, the gist of the present invention is to provide a method for manufacturing a circuit board incorporating a capacitor, in which a part of a ceramic green sheet is punched out to a size in which a capacitor is formed, the punched part is filled with dielectric paste, and both sides of the ceramic green sheet are punched out. A method of manufacturing a circuit board is characterized by laminating ceramic green sheets with printed electrodes and firing them together to form a capacitor. In the present invention, various methods can be used to fill a punched green sheet with dielectric paste and attach electrodes to fabricate a board with a built-in capacitor. That is, (al) Cut out a part of a ceramic green sheet to the size that will form a capacitor, place it on a release film, fill the punched part with dielectric paste, and after drying, peel off this sheet from the release film and place it on a release film. A method in which a sheet filled with the dielectric material is placed between a pair of ceramic green sheets on which electrodes are printed in advance and through holes are printed separately from the sheet, the sheets are laminated and thermocompressed, and the capacitor is formed by integral firing. (bl electrode A ceramic green sheet that has been partially punched out to a size that will form a capacitor is placed on top of the ceramic green sheet that has been printed with through-holes, and is laminated and pressure-bonded, and a dielectric paste is applied to the punched part of the laminated sheet. After filling and drying, apart from this laminated sheet,
A method in which a ceramic green sheet with electrodes printed in advance and through-hole printing is placed on this laminated sheet, laminated and thermocompressed again, and then integrally fired to form a capacitor.

(C)セラミックグリーンシートの一部をコンデンサが
形成する大きさに打抜き,このシートを剥離フィルム上
に置き、打抜き部分に誘電体ベストを充填し、乾燥した
後,このシートの上面と下面に電極を印刷し,焼成して
、コンデンサを形成させる方法 などがある。
(C) A part of the ceramic green sheet is punched out to a size that will form a capacitor, this sheet is placed on a release film, the punched part is filled with dielectric vest, and after drying, electrodes are placed on the top and bottom surfaces of this sheet. There are methods such as printing and firing to form a capacitor.

本発明でグリーンシ一ト材料に用いられるセラミックと
しては、グリーンシ一ト多層積層法に用いられるもので
あれば任意のものが使用できるが、回路基板の焼成に際
して導体材料の選択幅があり、微細配線が可能な点から
焼成温度が800〜tooo℃の低温境結セラミックス
基板に用いられるものが好ましい.このような基板材1
4としては,例えばホウ珪酸ガラス等を含有するガラス
セラミックス系、アルミナにホウ珪酸ガラスを混合した
複合系セラミックス等がある. 誘電体としては特に限定はないが、グリーンシ一トのセ
ラミックスと焼成温度を合わせたものが用いられ、好ま
しくは基板と同様800〜tooo℃で焼成できる低温
境結タイブの誘電体が用いられる. [実施例] 以下、本発明を実施例によって具体的に説明する. なお、以下の実施例において、セラミックグリーンシー
トはアルミナとホウ酸ガラスを50:50(重量比)で
混ぜた粉末にバインダと溶剤を加えてスラリーとし、塗
工して作製した. 誘電体ペーストは,PblMg+/sNb*zsJOs
−PbTi03−PbO粉宋にビヒクルを加えて作製し
た.電極はAg−Pdll5%》粉末にビヒクルを加え
たぺ−ストを用いた. 実施例l 第1図〜第4図は本発明の回路基板の製造方法の実施例
における工程を示す6 第1図(2)で、誘電体層を形成する厚さ0.3mI1
のセラミックグリーンシートlの必要箇所にスルーホー
ル3を穿孔し,誘電体を充填する部分2を打抜いた.次
いでスルーホール3に導電体ぺ一ストを充填した後乾燥
した. 第2図で,乾燥されたグリーンシ一ト1を弗素樹脂から
なる剥離フイルム7上に置き,打抜きスペース2に誘電
体8のペーストを充填し、その状態で乾燥した後剥離フ
ィルムをはがした。
As the ceramic used for the green sheet material in the present invention, any ceramic can be used as long as it is used in the green sheet multilayer lamination method, but there is a wide selection of conductor materials when firing the circuit board. A material used for low-temperature bonded ceramic substrates with a firing temperature of 800 to too much degree Celsius is preferable because fine wiring can be formed. Such a substrate material 1
Examples of 4 include glass-ceramics containing borosilicate glass, composite ceramics containing alumina and borosilicate glass, and the like. The dielectric material is not particularly limited, but a material with a firing temperature matching that of green sheet ceramics is used, and preferably a low-temperature bonding type dielectric material that can be fired at 800 to 800° C. like the substrate is used. [Examples] Hereinafter, the present invention will be specifically explained using examples. In the following examples, ceramic green sheets were prepared by adding a binder and a solvent to a powder mixture of alumina and boric acid glass at a ratio of 50:50 (weight ratio) to form a slurry, and coating the slurry. The dielectric paste is PblMg+/sNb*zsJOs
-PbTi03-PbO powder was prepared by adding vehicle. The electrode used was a paste made by adding a vehicle to Ag-Pdll 5% powder. Example 1 Figures 1 to 4 show steps in an example of the method for manufacturing a circuit board of the present invention 6 In Figure 1 (2), the thickness of the dielectric layer is 0.3 mI1.
Through-holes 3 were punched at the required locations in the ceramic green sheet 1, and portions 2 to be filled with dielectric material were punched out. Next, through holes 3 were filled with conductive paste and dried. In Fig. 2, a dried green sheet 1 was placed on a release film 7 made of fluororesin, a paste of a dielectric material 8 was filled in the punching space 2, and after drying in that state, the release film was peeled off. .

一方第1図(トl)に示すように,グリーンシ一トlと
同材料を用いて形成した絶縁用の厚さ0.5一一のグリ
ーンシ一ト4に,必要な電極5及びスルーホール6を印
刷したものを、第l図T1−21に示すように,必要な
電極印刷を施した絶縁用のグリーンシ一ト9と共に、第
3図に示すようにそれぞれの電極面を誘電体に向けて、
誘電体層シ一ト1の両面に積層し、熱圧着した. この積層体を脱バインダした後、850℃で10分間一
体焼成し,第4図に示すコンデンサ内蔵回路基板を得た
. 実施例2 実施例1において、打ち抜きされた誘電体層グリーンシ
一トを剥離フィルム上に載せる代わりに、第5図に示す
ように電極印刷された絶縁層グJ−ンシ一ト9の上に載
せ,打抜きスペース2に誘電体8を充填し、その上に電
極印刷された絶縁層グリーンシ一ト4を積層、熱圧着し
.以下同様に脱バインダし、850℃でlO分間焼成を
行ないコンデンサ内蔵回路基板を得た。
On the other hand, as shown in Fig. 1 (Tl), a green sheet 4 for insulation with a thickness of 0.5 mm is formed using the same material as green sheet 1, and the necessary electrodes 5 and through As shown in Figure T1-21, the holes 6 are printed, together with an insulating green sheet 9 on which the necessary electrodes are printed, and each electrode surface is covered with a dielectric material as shown in Figure 3. Towards
The dielectric layer was laminated on both sides of sheet 1 and bonded by thermocompression. After removing the binder from this laminate, it was integrally fired at 850°C for 10 minutes to obtain a circuit board with a built-in capacitor as shown in Fig. 4. Example 2 In Example 1, instead of placing the punched dielectric layer green sheet on the release film, it was placed on the insulating layer green sheet 9 on which the electrodes were printed, as shown in FIG. The punching space 2 is filled with a dielectric material 8, and an insulating layer green sheet 4 on which electrodes are printed is laminated and thermocompression bonded. Thereafter, the binder was removed in the same manner, and baking was performed at 850° C. for 10 minutes to obtain a circuit board with a built-in capacitor.

実施例3 実施例1で剥離フィルム上で誘電体を充填した後乾燥し
た誘電体層グリーンシ一トを用いて、その両面に電極印
刷し、第6図に示す電極付誘電体層を得、この両面に絶
縁層グリーンシ一トを積層し、850℃で10分間焼成
してコンデンサ内蔵回路基板を得た. このようにして作成したコンデンサを内蔵した回路基板
は、基板表面の凹凸はなく,誘電体層と電極間および誘
電体層と絶縁体層間の剥離は生じなかった. 以上の各実施例の方法を応用することにより、第7図に
示すような積層コンデンサや第8図に示すような多層コ
ンデンサを内蔵した多層回路基板を容易に製造できる. [発明の効果] 本発明によると多数のコンデンサを基板内部に安定して
形成できるため,表面実装面積が広くとれ、実装密度が
向上する.
Example 3 Using the dielectric layer green sheet filled with dielectric on a release film in Example 1 and dried, electrodes were printed on both sides to obtain a dielectric layer with electrodes as shown in FIG. Insulating green sheets were laminated on both sides of this and baked at 850°C for 10 minutes to obtain a circuit board with a built-in capacitor. The circuit board with built-in capacitors created in this way had no irregularities on the board surface, and no peeling occurred between the dielectric layer and the electrodes or between the dielectric layer and the insulator layer. By applying the methods of each of the above embodiments, it is possible to easily manufacture a multilayer circuit board incorporating a multilayer capacitor as shown in FIG. 7 or a multilayer capacitor as shown in FIG. [Effects of the Invention] According to the present invention, a large number of capacitors can be stably formed inside the board, so the surface mounting area can be increased and the mounting density can be improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図〜第4図は本発明の実施例のコンデンサ内蔵回路
基板の製造工程の説明図で,第5図及び第6図はそれぞ
れ他の方法の説明図である.第7図及び第8図は本発明
によって製造される多層のコンデンサを内蔵する回路基
板の断面図である.第9図〜第lO図は従来の製造法を
説明する断面図で、第11図及び第12図は従来法によ
り得られた基板の断面図である. l:誘電体層グリーンシ一ト 2:打抜きスペース 3. :スルーホール 4. :絶縁層グリーンシ一ト :電極 :剥離シート :誘電体 二回路基板
1 to 4 are explanatory diagrams of the manufacturing process of a circuit board with a built-in capacitor according to an embodiment of the present invention, and FIGS. 5 and 6 are explanatory diagrams of other methods, respectively. 7 and 8 are cross-sectional views of a circuit board incorporating a multilayer capacitor manufactured according to the present invention. FIGS. 9 to 10 are cross-sectional views for explaining the conventional manufacturing method, and FIGS. 11 and 12 are cross-sectional views of a substrate obtained by the conventional method. l: Dielectric layer green sheet 2: Punching space 3. :Through hole 4. : Insulating layer green sheet : Electrode : Peeling sheet : Dielectric dual circuit board

Claims (4)

【特許請求の範囲】[Claims] (1)コンデンサを内蔵する回路基板の製造方法におい
て、セラミックグリーンシートの一部をコンデンサの形
成される大きさに打抜き、該打抜き部に誘電体ペースト
を充填し、その両面に電極印刷されたセラミックグリー
ンシートを積層して一体焼成してコンデンサを形成させ
ることを特徴とする回路基板の製造方法。
(1) In a method for manufacturing a circuit board with a built-in capacitor, a part of a ceramic green sheet is punched out to a size in which a capacitor is formed, the punched part is filled with dielectric paste, and electrodes are printed on both sides of the ceramic green sheet. A method for manufacturing a circuit board, characterized by laminating green sheets and integrally firing them to form a capacitor.
(2)セラミックグリーンシートの一部をコンデンサの
形成される大きさに切抜いた後剥離フィルム上に置き、
打抜き部分に誘電体ペーストを充填し、乾燥した後この
シートを剥離フィルムから剥し、このシートとは別に予
め電極を印刷しスルーホール印刷した一対のセラミック
グリーンシートの間に前記誘電体を充填したシートを配
置して積層熱圧着し、一体焼成してコンデンサを形成さ
せることを特徴とする回路基板の製造方法。
(2) Cut out a part of the ceramic green sheet to a size that will form a capacitor, and then place it on a release film.
The punched part is filled with a dielectric paste, and after drying, this sheet is peeled off from the release film, and the dielectric is filled between a pair of ceramic green sheets on which electrodes are printed in advance and through holes are printed separately from this sheet. 1. A method for manufacturing a circuit board, characterized by arranging, laminating, thermocompression bonding, and integrally firing to form a capacitor.
(3)電極を印刷し、スルーホール印刷したセラミック
グリーンシートの上に、一部をコンデンサの形成される
大きさに打抜いたセラミックグリーンシートを載せて積
層圧着し、この積層シートの打抜き部に誘電体ペースト
を充填し、乾燥した後、このシートとは別に予め電極を
印刷しスルーホール印刷したセラミックグリーンシート
をこの積層シートに載せて再度積層熱圧着し、一体焼成
してコンデンサを形成させることを特徴とする回路基板
の製造方法。
(3) On top of the ceramic green sheet on which electrodes and through-holes have been printed, a ceramic green sheet with a part punched out to the size where a capacitor will be formed is placed and laminated and pressure-bonded, and the punched part of this laminated sheet is After filling with dielectric paste and drying, a ceramic green sheet with electrodes printed in advance and through-holes printed separately from this sheet is placed on this laminated sheet, laminated and thermocompressed again, and integrally fired to form a capacitor. A method for manufacturing a circuit board characterized by:
(4)セラミックグリーンシートの一部をコンデンサの
形成される大きさに打抜き、このシートを剥離フィルム
上に置き、打抜き部に誘電体ペーストを充填し、乾燥し
た後、このシートの上面と下面とに電極を印刷し、焼成
してコンデンサを形成させることを特徴とする回路基板
の製造方法。
(4) Punch out a part of the ceramic green sheet to a size that will form a capacitor, place this sheet on a release film, fill the punched part with dielectric paste, and after drying, the top and bottom surfaces of this sheet A method for manufacturing a circuit board, which comprises printing electrodes on a substrate and firing the electrodes to form a capacitor.
JP1060199A 1989-03-13 1989-03-13 Manufacture of circuit board Pending JPH02239697A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1060199A JPH02239697A (en) 1989-03-13 1989-03-13 Manufacture of circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1060199A JPH02239697A (en) 1989-03-13 1989-03-13 Manufacture of circuit board

Publications (1)

Publication Number Publication Date
JPH02239697A true JPH02239697A (en) 1990-09-21

Family

ID=13135246

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1060199A Pending JPH02239697A (en) 1989-03-13 1989-03-13 Manufacture of circuit board

Country Status (1)

Country Link
JP (1) JPH02239697A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04299889A (en) * 1990-12-17 1992-10-23 Hughes Aircraft Co Capacitor structure
JPH04313297A (en) * 1990-12-17 1992-11-05 Hughes Aircraft Co Three-dimensional structure / substrate through multilayer resistance
US7243424B2 (en) 2004-02-27 2007-07-17 Tdk Corporation Production method for a multilayer ceramic substrate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04299889A (en) * 1990-12-17 1992-10-23 Hughes Aircraft Co Capacitor structure
JPH04313297A (en) * 1990-12-17 1992-11-05 Hughes Aircraft Co Three-dimensional structure / substrate through multilayer resistance
US7243424B2 (en) 2004-02-27 2007-07-17 Tdk Corporation Production method for a multilayer ceramic substrate
EP1581035A3 (en) * 2004-02-27 2007-08-15 TDK Corporation Multilayer ceramic substrate and its production method

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