JPH02204724A - Electrooptical device - Google Patents
Electrooptical deviceInfo
- Publication number
- JPH02204724A JPH02204724A JP1024563A JP2456389A JPH02204724A JP H02204724 A JPH02204724 A JP H02204724A JP 1024563 A JP1024563 A JP 1024563A JP 2456389 A JP2456389 A JP 2456389A JP H02204724 A JPH02204724 A JP H02204724A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- nonlinear resistance
- conductive film
- transparent conductive
- charge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims abstract description 46
- 230000000694 effects Effects 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 abstract description 9
- 230000006866 deterioration Effects 0.000 abstract description 8
- 230000005611 electricity Effects 0.000 abstract description 7
- 230000003068 static effect Effects 0.000 abstract description 7
- 230000006378 damage Effects 0.000 abstract description 5
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 abstract 2
- 238000004806 packaging method and process Methods 0.000 abstract 1
- 239000010408 film Substances 0.000 description 17
- 239000004973 liquid crystal related substance Substances 0.000 description 8
- 210000004027 cell Anatomy 0.000 description 7
- 210000002858 crystal cell Anatomy 0.000 description 5
- 238000002347 injection Methods 0.000 description 5
- 239000007924 injection Substances 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 230000015556 catabolic process Effects 0.000 description 4
- 239000011159 matrix material Substances 0.000 description 3
- 230000005684 electric field Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 229910052754 neon Inorganic materials 0.000 description 2
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000003090 exacerbative effect Effects 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、コンビ二−タ画像表示、テレビモニタ、自動
車のインストルメントパネル、電気・電子計測装置の表
示パネルなど、主に液晶表示パネルとして利用できる電
気光学装置に関するものである。[Detailed Description of the Invention] [Field of Industrial Application] The present invention is mainly applicable to liquid crystal display panels such as combination image displays, television monitors, automobile instrument panels, and display panels for electrical and electronic measuring devices. The present invention relates to available electro-optical devices.
本発明は、非線形抵抗素子やＦｉｌ膜トランジスタ等の
アクティブ素子を有するアクティブマトリックス液晶表
示パネルの構造において、対向する基板の一方もしくは
双方の外面に５ｎＯ２ＷｉＪ？３ＩＴＯ膜などの透明導
電性膜を形成することにより、製造工程中の装置、人体
及び様々な物質との接触と分離による基板上の帯電を抑
制し、従って、基板からの放電を抑えることが可能であ
り、アクティブ素子の劣化及び絶縁破壊を防ぐ効果があ
る。In the structure of an active matrix liquid crystal display panel having active elements such as nonlinear resistance elements and film transistors, the present invention provides 5nO2WiJ? By forming a transparent conductive film such as a 3ITO film, it is possible to suppress charging on the substrate due to contact with and separation from equipment, human bodies, and various substances during the manufacturing process, and therefore suppress discharge from the substrate. This has the effect of preventing deterioration and dielectric breakdown of active elements.
また、上記と共に、外面の導電性包囲により静電シール
ド効果を利用して、外部電界からの影響を防ぐことによ
り製造上の静電気に対する管理を容易に、かつ製造歩留
りを向上するようにしたものである。In addition to the above, the electrostatic shielding effect of the conductive outer surface is used to prevent the influence of external electric fields, making it easier to manage static electricity during manufacturing and improve manufacturing yield. be.
従来は、第２図に示すように２枚の対向する基板２．８
と、該基板間に挟持された電気光学効果を有する材料の
層４と、第１の基板の内面に形成したマトリックス状の
画素７及び電極５と、第２の基板の内面に形成した電極
３とからなり、第１の基板の各画素７には非線形抵抗層
６が接続され、非線形抵抗素子６１を形成している。２
枚の基板２゜８は絶縁性材料であり、静電気が非常に帯
電し易い性質であり、−度帯電すると電子の移動が難し
く各所に局部電位を持つ。Conventionally, as shown in FIG. 2, two opposing substrates 2.8
, a layer 4 of a material having an electro-optic effect sandwiched between the substrates, a matrix of pixels 7 and electrodes 5 formed on the inner surface of the first substrate, and an electrode 3 formed on the inner surface of the second substrate. A nonlinear resistance layer 6 is connected to each pixel 7 of the first substrate, forming a nonlinear resistance element 61. 2
The substrate 2.8 is made of an insulating material and has a property that it is very easily charged with static electricity, and when it is charged to a negative degree, it is difficult for electrons to move and there are local potentials in various places.
ところが、上記のような構造では、製造工程中に生しる
基板への静電気発生（例、接触と分離の現象を生じるも
の全てとなる。ステージ、ビン、ローラ、ベルト、キャ
リア、アームなど）は、外面の接触面が高抵抗絶縁材料
ゆえに抑えることが困難である。また、帯電後は、非線
形抵抗素子側基板８までの工程においては（以後、デバ
イス基板と仮に呼ぶ）非線形抵抗素子部側に静電誘導を
起こし、電極５と画素電極７間に高電界（電位差）が生
じ、非線形抵抗素子６１への、絶縁破壊や、劣化を発生
させるという欠点を有している。However, with the above structure, static electricity generated on the substrate during the manufacturing process (e.g., anything that causes contact and separation phenomena, such as stages, bottles, rollers, belts, carriers, arms, etc.) However, it is difficult to suppress the contact surface because the outer contact surface is made of a high-resistance insulating material. In addition, after charging, electrostatic induction occurs on the nonlinear resistance element side (hereinafter tentatively referred to as the device substrate) in the process up to the nonlinear resistance element side substrate 8, and a high electric field (potential difference) occurs between the electrode 5 and the pixel electrode 7. ), which has the drawback of causing dielectric breakdown and deterioration of the nonlinear resistance element 61.
また、−度デバイス基板に、電荷が蓄えられるｔ／τ＋
１／τ２
Ｖ ＝ Ｖ ６ （ｅ ＋ ｅ ）
由−゛叩゛′■τ１ ： ネオン放１ｔ（空気中）
の時定数τ２ ＝ 抵抗放電（接触）の時定数
と、式■からτ２が非常に大きく放電による電圧降下（
帯電低下）は遅く、高帯電の状態が長時間継続される。In addition, t/τ+ where electric charge is stored on the − degree device substrate
1/τ2 V = V 6 (e + e)
Yu-゛hit゛'■τ1: 1 ton of neon light (in the air)
time constant τ2 = time constant of resistive discharge (contact), and from formula ■, τ2 is very large and the voltage drop due to discharge (
(decrease in charge) is slow, and a highly charged state continues for a long time.
それにより上記の欠点を促進させる結果となる。しかも
デバイス基板８側は通常メタルの配線がマトリックス状
に走っていることにより、表面への低抵抗物質の接触（
人体、アースと共通のマシーン部、低抵抗キャリアなど
）により急峻な電荷の放電が生じ、その時の急激な電子
の移動による影響も大きい。また、第２図のような液晶
セル形成後、回路基板等への実装の際におけるコモンま
たはセグメントラインの接続において、パネル表面上か
らの帯電を逃がすことがパネル外面が絶縁性などで困難
であり、やはり非線形抵抗素子６１の静電劣化や破壊は
避けられない。以上のような各種の欠点を有していた。This has the effect of exacerbating the above-mentioned drawbacks. Moreover, since the metal wiring usually runs in a matrix on the device substrate 8 side, contact of low-resistance material to the surface (
A sudden charge discharge occurs due to the human body, a machine part common to the ground, a low resistance carrier, etc., and the rapid movement of electrons at that time has a large effect. In addition, after forming the liquid crystal cell as shown in Figure 2, when connecting the common or segment lines when mounting it on a circuit board, etc., it is difficult to release the charge from the panel surface due to the insulating nature of the outer surface of the panel. However, electrostatic deterioration and destruction of the nonlinear resistance element 61 are still unavoidable. It had various drawbacks as mentioned above.
上記課題を解決するために、本発明においては、第１図
で示すように、アクティブマトリックスパネルの一方も
しくは双方の外面に、ＳｎｕｇやＩＴｏの透明導電性膜
を形成し、その表面抵抗率を１０責Ω／口）以下の半導
電性材料や導電性材料にすることにより、デバイス基板
及びパネルセル組立、実装組立中の外部静電気によるデ
バイス基板上の非線形抵抗素子の静電劣化や静電破壊を
防止し、基板上や、パネル内部に局部電位を存在させな
いことにより、素子部の局部的絶縁破壊を防止した。In order to solve the above problems, in the present invention, as shown in FIG. By using the following semiconductive or conductive materials, we prevent electrostatic deterioration and electrostatic damage of nonlinear resistance elements on device substrates due to external static electricity during device substrate and panel cell assembly and mounting assembly. However, by not creating a local potential on the substrate or inside the panel, local dielectric breakdown in the element part is prevented.
上記のような構成によれば、まずデバイス基板製造中に
おけるデバイス基板は、第４図で示すように、外部から
の電荷の充電（帯電）に対しては、基板上で導電性膜で
覆われていることにより、局部的な電位差を存在せず、
同電位で全面が保たれる。！荷の注入時間は、導電性膜
の膜質の抵抗層を変えることにより制御する。また、−
度基板に帯電すると、装置接触など低抵抗物質の接触及
び空中へのネオン放電により、基板全面の帯電量は常時
微少の値で維持できる。また対向側の基板とセル組立後
は、上記の作用に加え、アクティブ素子の形成されてい
るセル内面を、外面双方の導電性膜により静電シールド
する作用がある。最後に第３図のセルを実装する時や実
装後は、外部電荷充電に対しては、外枠を通じて電荷は
逃げ、セル内のアクティブ素子においても、静電シール
ド性により、セル内局部電位が発生しないようにするこ
とができる。According to the above configuration, first, the device substrate during device substrate manufacturing is covered with a conductive film on the substrate to prevent charging (charging) from the outside, as shown in FIG. By doing so, there is no local potential difference,
The entire surface is kept at the same potential. ! The charge injection time is controlled by changing the resistance layer of the conductive film. Also, -
Once the substrate is charged, the amount of charge on the entire surface of the substrate can be maintained at a very small value at all times due to contact with a low-resistance material such as equipment contact and neon discharge into the air. Furthermore, after the opposite substrate and cell are assembled, in addition to the above-mentioned effect, the inner surface of the cell where active elements are formed is electrostatically shielded by the conductive films on both outer surfaces. Finally, when mounting the cell shown in Figure 3 or after mounting, the charge escapes through the outer frame in response to external charge charging, and the local potential within the cell is reduced due to the electrostatic shielding properties of the active elements within the cell. This can be prevented from occurring.
以下に本発明の実施例を図面に基づいて説明する。この
実施例では、アクティブ素子として非線形抵抗素子を用
いた例について説明する。Embodiments of the present invention will be described below based on the drawings. In this embodiment, an example will be described in which a nonlinear resistance element is used as an active element.
第１図においてデバイス基板８の片面側に下から画素電
極７．非線形抵抗層６．金属電極５の順に構成され、非
線形抵抗素子６１が形成されている。In FIG. 1, pixel electrodes 7. Nonlinear resistance layer6. The metal electrode 5 is constructed in this order, and a nonlinear resistance element 61 is formed.
基板８の反対面には、ＳｎｏｗやＩＴＯで代表される透
明導電性１１！９を成膜する。この透明導電性膜の膜厚
は最低でも数十オングストロームあればよい、上記の膜
の他にもフィルム状の導電性もしくは半導電性の材質を
貼ることも可能である。透明導電性膜９は、表面抵抗率
を１０９（Ω／口）以下にする必要がある９次にその動
作を説明する。第４図においてデバイス基板８上に、ア
クティブ素子の一例を非線形抵抗素子６１が形成された
後の工程において、例えば搬送中に帯電した人間が基板
裏面に接触した時（同中矢印口）、基板裏面には、透明
導電性膜９が形成されているので、電荷は全面に均等に
分散し、表面のアクティブ素子部５６．７には局部電位
は存在せず、非線形抵抗層６の劣化や基板破壊を生じさ
せない。又、−度帯電した基板もキャリアや装置部など
が接触しているわけであるから、通常電荷は外へ放電し
てしまう。On the opposite surface of the substrate 8, a transparent conductive film 11!9, typically made of Snow or ITO, is formed. The thickness of this transparent conductive film should be at least several tens of angstroms.In addition to the above-mentioned film, it is also possible to apply a film-like conductive or semiconductive material. The transparent conductive film 9 needs to have a surface resistivity of 109 (Ω/portion) or less.9 Next, its operation will be explained. In FIG. 4, in a step after a nonlinear resistance element 61 is formed as an example of an active element on a device substrate 8, for example, when a charged person comes into contact with the back surface of the substrate during transportation (indicated by an arrow in the same figure), the substrate Since the transparent conductive film 9 is formed on the back surface, charges are evenly distributed over the entire surface, and there is no local potential in the active element portion 56.7 on the front surface, which prevents deterioration of the nonlinear resistance layer 6 and the substrate. Do not cause destruction. Further, since the carrier, device parts, etc. are in contact with the -degree charged substrate, the charges are normally discharged to the outside.
又、表面に存在している電荷についてもエッヂ部分の透
明導電性膜９の周り込みや、デバイス基板がコンデンサ
と考えられることにより、表・裏面片側のみの帯電はな
く、裏面が表面と同時同量の帯電を示すことにより両面
同時に外部へ放電する。In addition, regarding the charge existing on the surface, due to the surrounding of the transparent conductive film 9 at the edge part and the fact that the device substrate is considered as a capacitor, there is no charge on only one side of the front or back surface, and the back surface is charged at the same time as the front surface. By exhibiting a certain amount of charge, both sides simultaneously discharge to the outside.
次に、第３図においで液晶セル１５を実装する時、偏光
板１４のエッヂ部が透明導電性膜１，９を露出するよう
に引き出し、その透明導電性膜引き出し部と基板のスペ
ーサの役割を果たしている異方性導電性ゴム１２を電気
的に接続する。スペーサの役割の異方性導電性ゴム１２
には実装基板の外枠１１と電気的に接続させる。外枠は
実装基板１０の共通接地とつながり、液晶セル１５は、
外枠と同電位を保てる構成となる。次に、その動作を説
明する。Next, when mounting the liquid crystal cell 15 in FIG. 3, the edge part of the polarizing plate 14 is drawn out to expose the transparent conductive films 1 and 9, and the transparent conductive film drawn part and the substrate serve as spacers. The anisotropic conductive rubber 12 is electrically connected. Anisotropic conductive rubber 12 serving as a spacer
is electrically connected to the outer frame 11 of the mounting board. The outer frame is connected to the common ground of the mounting board 10, and the liquid crystal cell 15 is connected to the common ground of the mounting board 10.
The configuration allows it to maintain the same potential as the outer frame. Next, its operation will be explained.
第３図において、外部から電荷が注入された時（同時矢
印イ）、液晶セル内部のアクティブ素子は、液晶セル外
面の透明導電性膜１．９で覆われており、静電シールド
効果を生み出すことにより、内部アクティブ素子部への
影響は妨げる。また、パネル上に注入された電荷は全面
同電位により、局部電位差は発生せず、共通接地１６を
通して放電される。なお、上記実施例では、アクティブ
素子として非線形抵抗素子を用いた例で説明したが、薄
膜トランジスタを用いたものでもよい。In Figure 3, when charges are injected from the outside (simultaneous arrow A), the active elements inside the liquid crystal cell are covered with a transparent conductive film 1.9 on the outer surface of the liquid crystal cell, creating an electrostatic shielding effect. This prevents the influence on the internal active element portion. Further, the charge injected onto the panel is discharged through the common ground 16 without generating any local potential difference because the entire surface has the same potential. In the above embodiment, a nonlinear resistance element is used as an active element, but a thin film transistor may be used instead.
以上述べたように、本発明による電気光学セル外面双方
に透明導電性膜を形成することは、デバイス基板製造中
における外部電荷注入、内部電荷放電と、実装組立及び
実装後における外部電荷注入と内部電荷放電の影響によ
るアクティブ素子の劣化及び絶縁破壊が防止できること
により、製造工程における静電気対策の簡易化が可能で
あり、また、静電気により画素欠陥が減少することで、
製造歩留りの向上が可能である。As described above, forming a transparent conductive film on both outer surfaces of an electro-optical cell according to the present invention is effective in preventing external charge injection and internal charge discharge during device substrate manufacturing, and external charge injection and internal charge injection after mounting assembly and mounting. By preventing deterioration and dielectric breakdown of active elements due to the effects of charge discharge, it is possible to simplify static electricity countermeasures in the manufacturing process, and by reducing pixel defects due to static electricity,
It is possible to improve manufacturing yield.
第１図は本発明による電気光学装置の一実施例の断面図
、第２図は従来技術の電気光学装置の断面図、第３図は
本発明実施例に使用される基板実装後の電気光学装置の
断面図、第４図は本発明実施例に使用されるデバイス基
板の帯電による電荷の流れを示すものである。
１．９・・透明導電膜
２・・・・対向基板（ガラス）
３・・・・対向電極
・液晶
・金属電極（メタル電橋）
・非線形抵抗素子（アクティブ素子）
・画素電極
・デバイス基板（ガラス）
・ＰＣＢ （実装基板）
・外枠（金属）
・異方性導電ゴム
・フレキシブルコネクタ
・偏光板及び反射板
・外部電荷注入
・共通接地
電荷
以上
出願人 セイコー電子工業株式会社
代理人 弁理士 林 敬 之 助
第１図
俣釆の電気光″ｖさ１の一面図
第２図FIG. 1 is a sectional view of an embodiment of an electro-optical device according to the present invention, FIG. 2 is a sectional view of a conventional electro-optical device, and FIG. 3 is an electro-optical device after mounting on a board used in an embodiment of the present invention. A cross-sectional view of the device, FIG. 4, shows the flow of charge due to charging of the device substrate used in the embodiment of the present invention. 1.9... Transparent conductive film 2... Counter substrate (glass) 3... Counter electrode, liquid crystal, metal electrode (metal electric bridge), nonlinear resistance element (active element), pixel electrode, device substrate ( Glass) ・PCB (mounting board) ・Outer frame (metal) ・Anisotropic conductive rubber ・Flexible connector ・Polarizing plate and reflective plate ・External charge injection ・Common ground charge or above Applicant: Seiko Electronic Industries Co., Ltd. Agent Patent attorney Hayashi Keisuke Figure 1: A front view of Matakama's electric light ``vsa 1'' Figure 2
Claims (2)
気光学効果を有する材料の層と、基板の内面に形成され
たアクティブ素子とを有する電気光学装置において、少
なくとも一方の基板の外面に透明導電性膜が形成されて
いることを特徴とする電気光学装置。(1) In an electro-optical device having two opposing substrates, a layer of material having an electro-optic effect sandwiched between the substrates, and an active element formed on the inner surface of the substrate, at least one of the substrates is An electro-optical device characterized by having a transparent conductive film formed on its outer surface.
以下であることを特徴とする請求項１記載の電気光学装
置。(2) The surface resistivity of the transparent conductive film is 10^9 (Ω/□)
The electro-optical device according to claim 1, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1024563A JPH02204724A (en) | 1989-02-02 | 1989-02-02 | Electrooptical device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1024563A JPH02204724A (en) | 1989-02-02 | 1989-02-02 | Electrooptical device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02204724A true JPH02204724A (en) | 1990-08-14 |
Family
ID=12141624
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1024563A Pending JPH02204724A (en) | 1989-02-02 | 1989-02-02 | Electrooptical device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02204724A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003047095A (en) * | 2001-07-31 | 2003-02-14 | Matsushita Electric Ind Co Ltd | Capacitor microphone and manufacturing method therefor |
| JP2010039482A (en) * | 2008-07-10 | 2010-02-18 | Semiconductor Energy Lab Co Ltd | Liquid crystal display device and method for manufacturing the same |
| CN102053415A (en) * | 2009-10-29 | 2011-05-11 | 索尼公司 | Horizontal-electric-field liquid crystal display apparatus |
Citations (5)
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| JPS5449597A (en) * | 1977-09-28 | 1979-04-18 | Seiji Miyake | Method of producing transparent conductive membrane |
| JPS58169707A (en) * | 1983-03-14 | 1983-10-06 | 日東電工株式会社 | Transparent conductive film |
| JPS6333131B2 (en) * | 1984-04-10 | 1988-07-04 | Mita Industrial Co Ltd | |
| JPS63184725A (en) * | 1987-01-27 | 1988-07-30 | Nec Corp | Active matrix liquid crystal display panel |
| JPS63314709A (en) * | 1987-06-17 | 1988-12-22 | Matsushita Electric Ind Co Ltd | Transparent electricity conductive film |
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| JPS5449597A (en) * | 1977-09-28 | 1979-04-18 | Seiji Miyake | Method of producing transparent conductive membrane |
| JPS58169707A (en) * | 1983-03-14 | 1983-10-06 | 日東電工株式会社 | Transparent conductive film |
| JPS6333131B2 (en) * | 1984-04-10 | 1988-07-04 | Mita Industrial Co Ltd | |
| JPS63184725A (en) * | 1987-01-27 | 1988-07-30 | Nec Corp | Active matrix liquid crystal display panel |
| JPS63314709A (en) * | 1987-06-17 | 1988-12-22 | Matsushita Electric Ind Co Ltd | Transparent electricity conductive film |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003047095A (en) * | 2001-07-31 | 2003-02-14 | Matsushita Electric Ind Co Ltd | Capacitor microphone and manufacturing method therefor |
| JP4697763B2 (en) * | 2001-07-31 | 2011-06-08 | パナソニック株式会社 | Condenser microphone |
| JP2010039482A (en) * | 2008-07-10 | 2010-02-18 | Semiconductor Energy Lab Co Ltd | Liquid crystal display device and method for manufacturing the same |
| CN102053415A (en) * | 2009-10-29 | 2011-05-11 | 索尼公司 | Horizontal-electric-field liquid crystal display apparatus |
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