JPH0216748A - Inspection device for semiconductor integrated circuit characteristic - Google Patents
Inspection device for semiconductor integrated circuit characteristicInfo
- Publication number
- JPH0216748A JPH0216748A JP16753688A JP16753688A JPH0216748A JP H0216748 A JPH0216748 A JP H0216748A JP 16753688 A JP16753688 A JP 16753688A JP 16753688 A JP16753688 A JP 16753688A JP H0216748 A JPH0216748 A JP H0216748A
- Authority
- JP
- Japan
- Prior art keywords
- dotting
- semiconductor integrated
- inker
- circuit
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 19
- 238000007689 inspection Methods 0.000 title description 2
- 239000008188 pellet Substances 0.000 claims abstract description 23
- 230000002950 deficient Effects 0.000 claims abstract description 16
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 7
- 239000010703 silicon Substances 0.000 claims abstract description 7
- 238000012360 testing method Methods 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 5
- 241000976924 Inca Species 0.000 claims description 4
- 239000000523 sample Substances 0.000 abstract description 6
- 230000003287 optical effect Effects 0.000 abstract description 4
- 229920001296 polysiloxane Polymers 0.000 description 5
- 230000000694 effects Effects 0.000 description 2
- 238000007664 blowing Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体集積回路の特性をウェハ状態で検査する
装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an apparatus for testing the characteristics of semiconductor integrated circuits in a wafer state.
従来、半導体集積回路の特性をウェハ状態で検査する装
置において、良品ペレットと不良ペレットとを区別する
ためには、針やレーザ光などを用いるインカ打点装置を
使用し、不良ペレットに物理的に目印をつけていた。Conventionally, in equipment that inspects the characteristics of semiconductor integrated circuits in the wafer state, in order to distinguish between good pellets and defective pellets, an inca dotting device using a needle or laser beam is used to physically mark defective pellets. was wearing.
上述した従来の半導体集積回路特性検査装置は、一つ一
つのペレットに対して特性検査を行い、不良であればイ
ンカ打点を行い、次のペレットの特性検査へと移行して
いるため、インカ打点時に発生したシリコン屑が周辺の
ペレットにまで飛び散るという恐れがある。The conventional semiconductor integrated circuit characteristic testing equipment described above tests the characteristics of each pellet one by one, and if it is defective, performs an ink dot, and then moves on to the characteristic test of the next pellet. There is a risk that the silicone debris generated from time to time may scatter to the surrounding pellets.
このシリコン屑はメモリデバイスのように電気的特性が
問題となるデバイスには何ら影響を及ぼさないが、ＣＯ
Ｄ固体撮像デバイスのように光学的特性が問題となるデ
バイスでは、このシリコン屑のために良品ペレットを不
良にしてしまうという欠点がある。This silicon dust has no effect on devices such as memory devices where electrical characteristics are a problem, but CO
D In devices where optical characteristics are a problem, such as solid-state imaging devices, there is a drawback that good pellets become defective due to this silicon debris.
本発明の目的は前記課題を解決した半導体集積回路特性
検査装置を提供することにある。An object of the present invention is to provide a semiconductor integrated circuit characteristic testing device that solves the above problems.
上述した従来の半導体集積回路特性検査装置に対し、本
発明は良品ペレットと不良ペレットとを区別するために
不良ペレットにインカ打点する際に発生するシリコン屑
を素早く吸い取り、周辺のペレットへの飛散を防止する
という相違点を有する。In contrast to the conventional semiconductor integrated circuit characteristic testing apparatus described above, the present invention quickly sucks up silicon debris generated when inking a defective pellet with ink in order to distinguish between good pellets and defective pellets, and prevents it from scattering to surrounding pellets. The difference is that it prevents.
前記目的を達成するため１本発明は半導体集積回路の特
性をウェハ状態で検査する装置において、不良ペレット
と良品ペレットを区別するために不良ペレットに物理的
に目印をつけるイン力打点装置と、インカ打点時に発生
するシリコン屑を吸い取る真空吸引装置とを有するもの
である。In order to achieve the above object, the present invention provides an apparatus for inspecting the characteristics of semiconductor integrated circuits in a wafer state, which includes an input dotting device for physically marking defective pellets in order to distinguish between defective pellets and non-defective pellets; This device is equipped with a vacuum suction device that sucks up silicone debris generated during dotting.
以下１本発明の実施例を図により説明する。 An embodiment of the present invention will be described below with reference to the drawings.
（実施例１） 第１図は本発明の実施例１を示す平面図である。(Example 1) FIG. 1 is a plan view showing Embodiment 1 of the present invention.
図において、１はプローブカード、２はプローブカード
１の入出力ピンであり、プローブカード１の入出力ピン
２をウェハ状態の半導体集積回路３に電気的に接触させ
、入出力ピン２を介して信号の授受を行い、半導体集積
回路３の特性を測定する。In the figure, 1 is a probe card, and 2 is an input/output pin of the probe card 1. The input/output pin 2 of the probe card 1 is brought into electrical contact with a semiconductor integrated circuit 3 in a wafer state, and the The characteristics of the semiconductor integrated circuit 3 are measured by transmitting and receiving signals.
本発明の装置は、良品ペレットと不良品ペレットとを区
別するために不良品ペレットに物理的に目印をつけるイ
ン力打点装置４と、インカ打点時に発生するシリコン屑
を吸い取らせる真空吸引装置５とを有し、該真空吸引装
置５の吸引口６をイン力打点装置４によるイン力打点箇
所の近傍に設置したものである。The device of the present invention includes an in-force dotting device 4 that physically marks defective pellets to distinguish between good pellets and defective pellets, and a vacuum suction device 5 that sucks up silicone debris generated during inca-dotting. The suction port 6 of the vacuum suction device 5 is installed near the point where the input force is hit by the input force point device 4.
実施例において、半導体集積回路の特性をウェハ状態で
検査する場合には、第２図（ａ）に示すようにプローブ
カード１の入出力ピン２を半導体集積回路３に接触させ
て入出力ピン２を介して信号の授受を行う。半導体集積
回路の特性を検査する場合はイン力打点装置４と真空吸
引装置５とを邪魔にならない位置に後退させておく。そ
の特性試験の結果、その半導体集積回路３が不良ペレッ
トであれば、第２図（ｂ）に示すようにイン力打点装置
４をイン力打点位置に接近させるとともに、真空吸引装
置５の吸引口６を接近させ、イン力打点を行うとともに
その際に発生するシリコン屑７を真空吸引装置５により
吸い取る。In the embodiment, when testing the characteristics of a semiconductor integrated circuit in a wafer state, the input/output pins 2 of the probe card 1 are brought into contact with the semiconductor integrated circuit 3 as shown in FIG. 2(a). Send and receive signals via. When testing the characteristics of a semiconductor integrated circuit, the input dotting device 4 and the vacuum suction device 5 are moved back to a position where they do not get in the way. As a result of the characteristic test, if the semiconductor integrated circuit 3 is found to be a defective pellet, the input dot device 4 is moved closer to the input dot point position as shown in FIG. 6 is brought close to perform an in-force hit point, and the vacuum suction device 5 sucks up silicone debris 7 generated at that time.
（実施例２） 第３図は本発明の実施例２を示す断面図である。(Example 2) FIG. 3 is a sectional view showing a second embodiment of the present invention.
本実施例はイン力打点する際に発生するシリコン屑を効
率よく吸引するために、イン力打点される場所に対して
約２ ｋｇ／ａａに圧縮された乾燥気体を噴出する圧縮
気体噴出装置８が取付けられている。圧縮気体噴出装置
８の噴出口９は真空吸引装置５の吸引口６と同様に半導
体集積回路３の特性を検査する場合に検査の邪魔になら
ない位置にあり、イン力打点するときはイン力が打たれ
る場所まで接近する。In this embodiment, in order to efficiently suck up silicone debris generated when performing an impact point, a compressed gas jetting device 8 is used that jets dry gas compressed to approximately 2 kg/aa to the location where the impact impact is performed. is installed. Like the suction port 6 of the vacuum suction device 5, the spout 9 of the compressed gas jet device 8 is located at a position where it does not interfere with the inspection when testing the characteristics of the semiconductor integrated circuit 3, and when the input force is applied, the Get close to where you will be hit.
この実施例では圧縮気体を噴出することにより、シリコ
ン屑７の周辺ペレットへの飛散が抑えられるため、より
効果的にシリコン屑７の除去ができるという利点がある
。In this embodiment, by blowing out compressed gas, the scattering of silicon debris 7 to surrounding pellets can be suppressed, so there is an advantage that silicon debris 7 can be removed more effectively.
以上説明したように本発明は半導体集積回路の特性をウ
ェハ状態で検査する装置において、イン力打点を行うこ
とにより発生するシリコン屑を真空吸引装置を使用して
除去することにより、ＣＣＤ固体撮像デバイスのように
光学的特性が問題となるデバイスの特性を正確に検査で
きるという効果がある。As explained above, the present invention is an apparatus for inspecting the characteristics of semiconductor integrated circuits in a wafer state. This method has the advantage that it is possible to accurately test the characteristics of devices whose optical characteristics are of concern, such as in the following.
第１図は本発明の実施例１を示す平面図、第２図（ａ）
、 （ｂ）は本発明の詳細な説明する断面図、第３図は
本発明の実施例２を示す断面図である。
１・・・プローブカード ２・・・入出力ピン３・
・・ウェハ状態の半導体集積回路FIG. 1 is a plan view showing Embodiment 1 of the present invention, FIG. 2(a)
, (b) is a cross-sectional view explaining the present invention in detail, and FIG. 3 is a cross-sectional view showing Example 2 of the present invention. 1... Probe card 2... Input/output pin 3.
・・・Semiconductor integrated circuit in wafer state
Claims (1)
置において、不良ペレットと良品ペレットを区別するた
めに不良ペレットに物理的に目印をつけるインカ打点装
置と、インカ打点時に発生するシリコン屑を吸い取る真
空吸引装置とを有することを特徴とする半導体集積回路
特性検査装置。(1) In equipment that inspects the characteristics of semiconductor integrated circuits in wafer state, there is an inca dotting device that physically marks defective pellets to distinguish between defective pellets and non-defective pellets, and an inca dotting device that sucks up silicon debris generated during inca dotting. 1. A semiconductor integrated circuit characteristic testing device comprising a vacuum suction device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16753688A JPH0216748A (en) | 1988-07-05 | 1988-07-05 | Inspection device for semiconductor integrated circuit characteristic |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16753688A JPH0216748A (en) | 1988-07-05 | 1988-07-05 | Inspection device for semiconductor integrated circuit characteristic |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0216748A true JPH0216748A (en) | 1990-01-19 |
Family
ID=15851517
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16753688A Pending JPH0216748A (en) | 1988-07-05 | 1988-07-05 | Inspection device for semiconductor integrated circuit characteristic |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0216748A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100355682B1 (en) * | 2000-08-03 | 2002-10-11 | 이평국 | Packaging box for food keeping |
| US9434124B2 (en) | 2009-07-23 | 2016-09-06 | Zipbox License, Llc. | Combination container and bag |
| US9938041B2 (en) | 2009-07-23 | 2018-04-10 | Zipbox License, Llc. | Combined box and resealable bag |
| US10065770B2 (en) | 2009-10-08 | 2018-09-04 | Illinois Tool Works Inc. | Carton with plastic reclosable header |
-
1988
- 1988-07-05 JP JP16753688A patent/JPH0216748A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100355682B1 (en) * | 2000-08-03 | 2002-10-11 | 이평국 | Packaging box for food keeping |
| US9434124B2 (en) | 2009-07-23 | 2016-09-06 | Zipbox License, Llc. | Combination container and bag |
| US9938041B2 (en) | 2009-07-23 | 2018-04-10 | Zipbox License, Llc. | Combined box and resealable bag |
| US10065770B2 (en) | 2009-10-08 | 2018-09-04 | Illinois Tool Works Inc. | Carton with plastic reclosable header |
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