JPH02137056A - Informing system for congestion state of processor - Google Patents

Informing system for congestion state of processor

Info

Publication number
JPH02137056A
JPH02137056A JP63291261A JP29126188A JPH02137056A JP H02137056 A JPH02137056 A JP H02137056A JP 63291261 A JP63291261 A JP 63291261A JP 29126188 A JP29126188 A JP 29126188A JP H02137056 A JPH02137056 A JP H02137056A
Authority
JP
Japan
Prior art keywords
processor
congestion
congestion state
states
processors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63291261A
Other languages
Japanese (ja)
Inventor
Takeshi Kobayashi
武司 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63291261A priority Critical patent/JPH02137056A/en
Publication of JPH02137056A publication Critical patent/JPH02137056A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To prevent the difference of holding information produced among processors by securing such a constitution where a slave processor receives the congestion states of all processors and then transmits these congestion states to the next processor after performing the matching between those received congestion states and its holding congestion states of all processors. CONSTITUTION:A master processor 1 sends its holding congestion states 13 of all processors to a slave processor 2 which is the next processor No.2 in a prescribed timing. In the case a timer monitor part 15 detects that the processor 2 is usable to receive the states 13 within a prescribed period of time, the states 13 held by the processor 1 is sent again to the processor 2. The processor 2 receives the states 13 and sends them to the next slave processor 3 after performing the matching between the received state 13 and its holding states. The slave processor 3 also performs the same process as the processor 2.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はマルチプロセッサシステムにおけるプロセッサ
輻輳状態通知方式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a processor congestion state notification method in a multiprocessor system.

〔従来の技術〕[Conventional technology]

従来、各プロセッサは自プロセッサの!pili鮫状態
の変(ヒを検出すると、回報通信で他の全てのプロセッ
サに通知していた。
Conventionally, each processor had its own processor! When a change in the state of the pili shark was detected, it was notified to all other processors via circular communication.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来の方式では、各プロセッサが自プロセッサの輻輳状
態の変化を検出すると、回報通信で他の全てのプロセッ
サに通知している為、通知信号の紛失が発生した堝な、
各プロセッサで管理する全プロセッサ輻輳状態に相違が
生じたり、あるいはプロセッサの再開が発生した場合も
このプロセッサの保持する全てのプロセッサ輻輳状態と
他の各プロセッサが保持する輻輳状態とで相違が生じる
ので、プロセッサの輻輳状態に従って処理を決定する際
、誤りを起こすという欠点がある。
In the conventional method, when each processor detects a change in the congestion state of its own processor, it notifies all other processors by broadcast communication, so there is a possibility that the notification signal may be lost.
Even if there is a difference in all the processor congestion states managed by each processor, or if a processor is restarted, there will be a difference between all the processor congestion states held by this processor and the congestion states held by each other processor. , it has the disadvantage of causing errors when determining processing according to the congestion state of the processor.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のプロセッサ輻輳状態通知方式はバスを介して接
続された複数のプロセッサが各々自プロセッサの輻輳状
態を監視する機能を備え、全プロセッサが各々全ての他
のプロセッサの輻輳状態を集めて保持するマルチプロセ
ッサシステムにおいて、各々のプロセッサにプロセッサ
番号を付与し、マスタプロセッサには全プロセッサ輻輳
状態の送出開始及び戻ってきた全プロセッサ輻輳状態を
受け収る送受信制御手段と、送出した全プロセッサ輻輳
状態を所定時間内に再び受け収ることを監視する監視手
段と、再び受け取った全プロセッサ輻輳状態と自プロセ
ッサの保持する全プロセッサ輻輳状態との整合を行なう
輻輪状態整合手段とを設け、スレーブプロセッサには送
られてきた全プロセッサ輻輳状態を受け収り次に送出す
べきプロセッサ番号のプロセッサに送出する送受信制御
手段と、受け取った全プロセッサ輻轢状態と自プロセッ
サの保持する全プロセッサ輻輳状態との整合を行なう輻
輪状態整合手段とを設けた構成である。
In the processor congestion state notification method of the present invention, a plurality of processors connected via a bus each have a function of monitoring the congestion state of their own processor, and each processor collects and maintains the congestion state of all other processors. In a multiprocessor system, a processor number is assigned to each processor, and the master processor has a transmission/reception control means for starting sending out the congestion state of all processors and receiving the returned congestion state of all processors, and a means for transmitting and receiving the congestion state of all processors that has been sent out. The slave processor is provided with a monitoring means for monitoring whether the state is received again within a predetermined time, and a congestion state matching means for matching the all-processor congestion state received again with the all-processor congestion state held by its own processor. is a transmission/reception control means that receives the sent all-processor congestion state and sends it to the processor with the next processor number, and matches the received all-processor congestion state with the all-processor congestion state held by its own processor. This configuration is provided with convergence state matching means for performing the following.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明のプロセッサ輻輳状態通知方式の一実施
例を示す構成図である。プロセッサ12.3はループ状
のバス4を介して接続されており、プロセッサ1はマル
チプロセッサのマスタプロセッサ、かつプロセッサ2.
3がスレーブプロセッサである。プロセッサ1,2.3
はそれぞれプロセッサ番号1,2.3を有する。各プロ
セッサ1,2.3はそれぞれ常時自プロセッサの輻輳状
態を輻輳状態監視部14,24.34で監視しており、
状態の変化が発生すると、全プロセッサ輻輳状態13.
23.33中の自プぼセッサの箇所の変更を行ない、同
報通信により他のプロセッサに通知する。変更通知を受
けたプロセッサは自プロセッサの保持する全プロセッサ
輻輳状態13.23.33中の変更の発生したプロセッ
サの状態の変更を行う。マスタプロセッサ1は所定のタ
イミングにより自プロセッサの保持する全プロセンサ輻
輳状態13を次プロセッサ番号2のプロセッサ2に対し
て送出する。この時、タイマー監視部15は送受信制御
部11より全プロセッサ幅輪状!1.3が送出されると
、送出した全プロセッサ輻輳状態を再び受け収るまでの
タイマー監視を行なう。所定時間を経過しても送出した
全プロ上・Vす輻輳状態を再び受け取れないことをタイ
マー監視部15が検出すると、マスタプロセッサ〕の保
持する全プロセッサ幅輪状態13を送受信制御部11よ
り次プロセッサ番号2のプロセッサ2に対して再び送出
する。スレーブプロセッサ2は送受信制御部21で送ら
れてきた全プロセッサ輻輳状態を受け取り、軸輪状警察
合部22でそのうちの自プロセッサの輻輳状態を輻輳状
態監視部24の管理する最新の輻輳状態に更新し、更新
後の全プロセッサ輻輳状態に合致させて全プロセッサ輻
輳状態23を更新することにより整合を行う。整合が終
了すると、送受信制御部21より次プロセッサ番号3の
プロセッサ3に対して全プロセッサ輻輳状態を送出する
。スレーブプロセッサ3は上述と同様の整合処理を行い
、次プロセッサ番号1のマスタプロセッサ1に対して全
プロセッサ輻輳状態を送出する。マスタプロセッサ1は
全プロセッサ輻輳を送受信制御部11で受け取ると、タ
イマー監視部15のタイマー監視を停止させ、自プロセ
ッサの保持する全プロセッサ輻輳状態13と上述と同様
にして整合処理を輻輳状態整合部12で行う。
FIG. 1 is a block diagram showing an embodiment of the processor congestion state notification system of the present invention. Processors 12.3 are connected via a loop bus 4, processor 1 is the master processor of the multiprocessor, and processors 2.3 are connected via a loop bus 4.
3 is a slave processor. Processor 1, 2.3
have processor numbers 1, 2.3, respectively. Each processor 1, 2.3 constantly monitors the congestion state of its own processor by a congestion state monitoring unit 14, 24.34,
When a state change occurs, the entire processor congestion state 13.
23. Change the part of the processor in 33 and notify other processors by broadcast communication. The processor that has received the change notification changes the state of the processor in which the change occurred among the all processor congestion states 13.23.33 held by the processor itself. The master processor 1 sends the entire processor congestion state 13 held by the master processor 1 to the processor 2 having the next processor number 2 at a predetermined timing. At this time, the timer monitoring section 15 is controlled by the transmission/reception control section 11 in a circular manner across all processors! When 1.3 is sent out, timer monitoring is performed until the sent out congestion state of all processors is received again. When the timer monitoring unit 15 detects that the transmitted all-processor top/V congestion state is not received again even after a predetermined period of time has elapsed, the transmission/reception control unit 11 transmits the all-processor width state 13 held by the master processor to the next one. It is sent again to processor 2 with processor number 2. The slave processor 2 receives the congestion status of all processors sent by the transmission/reception control unit 21, and updates the congestion status of its own processor to the latest congestion status managed by the congestion status monitoring unit 24 using the axle-ring police unit 22. , matching is performed by updating the all-processor congestion state 23 to match the updated all-processor congestion state. When matching is completed, the transmission/reception control unit 21 sends the congestion state of all processors to the processor 3 with the next processor number 3. The slave processor 3 performs matching processing similar to that described above, and sends the congestion state of all processors to the master processor 1 having the next processor number 1. When the master processor 1 receives the all-processor congestion in the transmission/reception control unit 11, it stops the timer monitoring in the timer monitoring unit 15, and performs matching processing using the all-processor congestion state 13 held by its own processor in the same manner as described above. Do it at 12.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、各プロセッサにプ
ロセッサ番号を付与し、マスタプロセッサが保持する全
プロセッサ輻輪状態を先頭のプロセッサ番号のプロセッ
サに送出し、このプロセッサは受け取った全プロセッサ
輻輳状態と自プロセッサの保持する全プロセッサ輻輳状
態との整合を行い、次プロセッサ番号のプロセッサに全
プロセッサ輻輳状態を送出し、以降プロセッサ番号順に
同様の整合処理及び送出処理を行い、最後のプロセッサ
番号のプロセッサは全プロセッサ輻輳状態をマスタプロ
セッサに送出し、マスタプロセッサは全プロセッサ輻輳
状態と自プロセッサの保持する全プロセッサ輻輳状態の
整合を行い、更にマスタプロセッサが送出した全プロセ
ッサ輻輳状態を所定時間内に受け収れないときは再送を
行うことにより、各プロセッサの保持する全プロセッサ
幅軸状態の相違を防ぐことができる。
As explained above, according to the present invention, a processor number is assigned to each processor, all processor congestion states held by the master processor are sent to the processor with the first processor number, and this processor receives all processor congestion states that it has received. and the all-processor congestion state held by its own processor, and sends the all-processor congestion state to the processor with the next processor number, and thereafter performs similar matching and sending processing in order of processor number, and then sends the all-processor congestion state to the processor with the last processor number. sends the all-processor congestion state to the master processor, the master processor matches the all-processor congestion state with the all-processor congestion state held by its own processor, and further receives the all-processor congestion state sent by the master processor within a predetermined time. By retransmitting when the data cannot be settled, it is possible to prevent differences in the total processor width axis states held by each processor.

34・・・輻輪状懸監視部、34... conical suspension monitoring section,

Claims (1)

【特許請求の範囲】[Claims] バスを介して接続された複数のプロセッサが各々自プロ
セッサの輻輳状態を監視する機能を備え、全プロセッサ
が各々全ての他のプロセッサの輻輳状態を集めて保持す
るマルチプロセッサシステムにおいて、各々のプロセッ
サにプロセッサ番号を付与し、マスタプロセッサには全
プロセッサ輻輳状態の送出開始及び戻ってきた全プロセ
ッサ輻輳状態を受け取る送受信制御手段と、送出した全
プロセッサ輻輳状態を所定時間内に再び受け取ることを
監視する監視手段と、再び受け取った全プロセッサ輻輳
状態と自プロセッサの保持する全プロセッサ輻輳状態と
の整合を行なう輻輳状態整合手段とを設け、スレーブプ
ロセッサには送られてきた全プロセッサ輻輳状態を受け
取り次に送出すべきプロセッサ番号のプロセッサに送出
する送受信制御手段と、受け取った全プロセッサ輻輳状
態と自プロセッサの保持する全プロセッサ輻輳状態との
整合を行なう輻輳状態整合手段とを設けたことを特徴と
するプロセッサ輻輳状態通知方式。
In a multiprocessor system in which multiple processors connected via a bus each have a function to monitor the congestion status of their own processors, and each processor collects and maintains the congestion status of all other processors, each processor A transmitting/receiving control means for assigning a processor number to the master processor to start sending out all processor congestion states and receiving the returned all processor congestion states, and a monitor to monitor that the sent out all processor congestion states are received again within a predetermined time. and congestion state matching means for matching the received all-processor congestion state with the all-processor congestion state held by its own processor, and the slave processor receives the sent all-processor congestion state and transmits it to the next Processor congestion characterized by comprising a transmission/reception control means for transmitting data to a processor with a processor number to be transmitted, and a congestion state matching means for matching the received all-processor congestion state with the all-processor congestion state held by its own processor. Status notification method.
JP63291261A 1988-11-18 1988-11-18 Informing system for congestion state of processor Pending JPH02137056A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63291261A JPH02137056A (en) 1988-11-18 1988-11-18 Informing system for congestion state of processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63291261A JPH02137056A (en) 1988-11-18 1988-11-18 Informing system for congestion state of processor

Publications (1)

Publication Number Publication Date
JPH02137056A true JPH02137056A (en) 1990-05-25

Family

ID=17766577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63291261A Pending JPH02137056A (en) 1988-11-18 1988-11-18 Informing system for congestion state of processor

Country Status (1)

Country Link
JP (1) JPH02137056A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04153840A (en) * 1990-10-18 1992-05-27 Nec Corp Information processing system
JPH08123772A (en) * 1994-10-27 1996-05-17 Nec Software Ltd Network managing device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04153840A (en) * 1990-10-18 1992-05-27 Nec Corp Information processing system
JPH08123772A (en) * 1994-10-27 1996-05-17 Nec Software Ltd Network managing device

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