JPH02126426U - - Google Patents
Info
- Publication number
- JPH02126426U JPH02126426U JP3439389U JP3439389U JPH02126426U JP H02126426 U JPH02126426 U JP H02126426U JP 3439389 U JP3439389 U JP 3439389U JP 3439389 U JP3439389 U JP 3439389U JP H02126426 U JPH02126426 U JP H02126426U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- terminal
- voltage
- semiconductor device
- analog switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 3
- 230000000087 stabilizing effect Effects 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Attenuators (AREA)
- Electronic Switches (AREA)
Description
第１図は本考案の一実施例の電子ボリウム回路
の電源部分の回路図、第２図は昇圧回路の原理説
明図、第３図は電圧レギユレータ回路の回路図、
第４図は一般的な電子ボリウム回路の回路図、第
５図は従来の電子ボリウム回路の電源部分の回路
図である。
ＳＷ１〜ＳＷｎ……アナログスイツチ、１，２
……端子、３……アナログスイツチ制御用の制御
回路、４……電圧ＶＤＤの電源、５……電圧ＶＥ
Ｅの電源、６，７……昇圧回路、８，９……電圧
レギユレータ回路。
FIG. 1 is a circuit diagram of the power supply part of an electronic volume circuit according to an embodiment of the present invention, FIG. 2 is a diagram explaining the principle of a booster circuit, and FIG. 3 is a circuit diagram of a voltage regulator circuit.
FIG. 4 is a circuit diagram of a general electronic volume circuit, and FIG. 5 is a circuit diagram of a power supply portion of a conventional electronic volume circuit. SW1~SWn...Analog switch, 1,2
... terminal, 3 ... control circuit for analog switch control, 4 ... power supply of voltage VDD, 5 ... voltage VE
E power supply, 6, 7...boost circuit, 8, 9...voltage regulator circuit.
Claims (1)
ＥＴから構成したアナログスイツチと抵抗との直
列回路の複数を第１の端子と第２の端子間に並列
接続されるよう共通半導体装置上に構成し、該半
導体装置上に構成した制御回路により上記アナロ
グスイツチをオン／オフして上記第１の端子と上
記第２の端子間のインピーダンスを変化させるよ
うにした電子ボリウム回路において、 外部から供給される電圧を昇圧する昇圧回路と
該昇圧回路の出力電圧を安定化させる電圧レギユ
レータ回路とを上記半導体装置上に構成し、該電
圧レギユレータ回路の出力電圧を上記ＭＯＳＦＥ
Ｔの基板にバイアスとして印加すると共に上記制
御回路に電源電圧として印加することを特徴とす
る電子ボリウム回路。[Claims for utility model registration] Two MOSFs: P channel and N channel
A plurality of series circuits each including an analog switch constituted by an ET and a resistor are configured on a common semiconductor device so as to be connected in parallel between a first terminal and a second terminal, and a control circuit configured on the semiconductor device performs the above operations. An electronic volume circuit that changes the impedance between the first terminal and the second terminal by turning on and off an analog switch, which includes a booster circuit that boosts a voltage supplied from the outside, and an output of the booster circuit. A voltage regulator circuit for stabilizing voltage is configured on the semiconductor device, and the output voltage of the voltage regulator circuit is connected to the MOSFE.
An electronic volume circuit characterized in that it is applied as a bias to the substrate of the T and also applied as a power supply voltage to the control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3439389U JPH02126426U (en) | 1989-03-28 | 1989-03-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3439389U JPH02126426U (en) | 1989-03-28 | 1989-03-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02126426U true JPH02126426U (en) | 1990-10-18 |
Family
ID=31538825
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3439389U Pending JPH02126426U (en) | 1989-03-28 | 1989-03-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02126426U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011254304A (en) * | 2010-06-02 | 2011-12-15 | Asahi Kasei Electronics Co Ltd | Cmos analog switch circuit and negative voltage sampling circuit |
| JP2019096375A (en) * | 2017-11-20 | 2019-06-20 | ローム株式会社 | Semiconductor device |
-
1989
- 1989-03-28 JP JP3439389U patent/JPH02126426U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011254304A (en) * | 2010-06-02 | 2011-12-15 | Asahi Kasei Electronics Co Ltd | Cmos analog switch circuit and negative voltage sampling circuit |
| JP2019096375A (en) * | 2017-11-20 | 2019-06-20 | ローム株式会社 | Semiconductor device |