JPH02119125A - Manufacture of amorphous silicon germanium thin film - Google Patents

Manufacture of amorphous silicon germanium thin film

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Publication number
JPH02119125A
JPH02119125A JP63272365A JP27236588A JPH02119125A JP H02119125 A JPH02119125 A JP H02119125A JP 63272365 A JP63272365 A JP 63272365A JP 27236588 A JP27236588 A JP 27236588A JP H02119125 A JPH02119125 A JP H02119125A
Authority
JP
Japan
Prior art keywords
substrate
potential
film
electrode
bias voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63272365A
Other languages
Japanese (ja)
Inventor
Tadashi Tomikawa
唯司 富川
Masayuki Ishii
石井 正之
Nobuhiko Fujita
藤田 順彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP63272365A priority Critical patent/JPH02119125A/en
Publication of JPH02119125A publication Critical patent/JPH02119125A/en
Pending legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells

Abstract

PURPOSE:To improve and stabilize film quality, and make it suitably applicable to a solar cell and the like by precisely controlling the film formation speed at the time of forming an a-SiGe:H thin film. CONSTITUTION:An electric potential A on substrate side and an electric potential B on electrode side are monitored, and a power supply for applying a bias voltage is so controlled that the potential difference (B-A) keeps always a specified value (a practical range is +40V or more and +100V or less). As to material gas, SiH4, Si2H6, Si3H3, SiF4, etc., are used for an Si source, and GeH4, GeF4, etc., are used for a Ge source. These are diluted by H2 and used. A parallel flat plate type plasma CVD system 1 is provided with a reaction chamber 2 and a holder 4 which is positioned at the upper part of the chamber and retains a substrate 3. A lower electrode 5 arranged at the lower part of the chamber is connected with a high frequency power supply 6. Plasma is generated by applying a high frequency voltage to the electrodes, and reaction is accelerated. A power supply 7 for applying a DC bias voltage is connected with the electrode 5 in parallel to the power supply 6. A control unit 8 controls the potential difference between the substrate holder 4 and the electrode 5 so as to keep a specified value.

Description

【発明の詳細な説明】[Detailed description of the invention]

産業上の利用分野 本発明は、アモルファスシリコンゲルマニウム(以下、
a −3iGe : Hと記載する)薄膜の製造方法に
関する。更に詳しくは、本発明は、多層構造アモルファ
スシリコン太陽電池等において有用なナローバンドギャ
ップ材料としてのアモルファスシリコンゲルマニウム薄
膜の製造方法であって、特性の再現性が良い、即ち、特
性のばらつきが少ないM規なアモルファスシリコンゲル
マニウム薄膜の製造方法に関する。 従来の技術 従来から太陽電池に使用されているアモルファスシリコ
ン(以下、a−3i:Hと記載する)のバンドギャップ
(E9)は約1.756V以下のエネルギーを有する光
に対して感度が極めて低(、Ge等の■族元素を添加し
てバンドギャップを下げることが試みられている。Ge
を添加したa−3i:H,即ち、a −3iGe : 
Hは、長波長感度に優れていることから、太陽電池、撮
像素子を始めとする各種応用を期待されている。 a −3iGe : H薄膜は、ブラズ?CVD法、反
応性スパッタリング法、イオンブレーティング法、光C
VD法等の方法による作製が既に試みられている。しか
しながら、太陽電池に使用できる程優れた光導電率を備
えたa −3iGe : H膜は未だ実現されておらず
、従って、実用に耐えるa −3iGe :H製品は得
られていない。 尚、これらの分野に関する提案として、a −3iGe
 : H薄膜の作製方法として特願昭60−21342
2号(昭和60年9月26日出願)、あるいは、アモル
ファスシリコンゲルマニウム太陽電池の製造方法として
特願昭61−6885号(昭和61年1月16日出願)
等が本出願人により既に出願されている。 発明が解決しようとする課題 第2図は、プラズマ化学気相蒸着法によりa −3iG
e : )i薄膜を作製する際の装置の構成を模式的に
示す図である。 即ち、この平行平板型プラズマCVD装置11は反応室
12と、反応室12の上方に設けられ、基板13を支持
する基板ホルダ14と、同様に反応室12内の下方に設
けられた下部電極板15とを含んでいる。 下部電極15は、高周波電源16に接続され、高周波の
印加により反応室12内にプラズマ゛を生じ、反応を促
進し得る構成となっている。また、基板ホルダ14には
、バイアス電圧印加用の直流電源16が接続されている
。 この装置を使用してa −3iGe : H膜を形成す
る操作は以下の通りである。即ち、まず基板13を基板
ホルダ14にセットし、真空排気系(図示せず)の動作
により反応室12内を所定の高真空とし、次いで原料ガ
ス混合物18を反応室内に所定の圧力(流量)で供給し
、一方で高周波電源17およびバイアス印加用電源16
、を動作させて反応室内に高周波プラズマを生成し、原
料ガスの分解並びに反応生成物の基板上への堆積を行う
。 ところで、上述のような従来の装置におけるa−3iG
e : H薄膜の成膜操作の過程では、a −3iGe
:H膜の膜特性には変動は殆ど見られないにもかかわら
す成膜速度が±15%程度変化することが知られている
。これは、電極板15がフローティング状態になってい
るために、電極板15への膜付着の状態などによりプラ
ズマ状態が変動するためであると見られている。このよ
うな成膜速度の慮外の変動は、太陽電池などの多層薄膜
デバイスを作製する場合に膜厚制御性を著しく低下させ
、結果としてデバイス特性の再現性を低下させるという
問題がある。 そこで本発明の目的は、上記従来技術の問題点を解決し
、精密な膜厚制御を可能とすることによって製品のデバ
イス特性の再現性を改善した新規なa −3iGe :
 H薄膜の作製方法を提供することにある。 課題を解決するための手段 即ち、本発明に従い、プラズマ化学気相蒸着法により、
Si源、Ge源および水素を含む原料の低圧ガス混合物
を反応室に導入し、外部交流電界を印加してプラズマを
得、反応を生じさせて基板上にアモルファスシリコンゲ
ルマニウム薄膜を成mする方法において、前記成膜操作
中に、前記基板側の直流電位である第1電位と、前記外
部交流電界を印加する電極部の直流電位である第2電位
との電位差が所定の値で一定に保たれるように、外部か
ら該電極へ印加する直流バイアス電圧および/または基
板ホルダー部へ外部から印加する直流バイアス電圧を制
御することを特徴とするアモルファスシリコンゲルマニ
ウム薄膜の製造方法が提供される。 また、本発明の好ましい態様に従えば、前記第1電位と
前記第2電位との電位差が、40V以上且つ100v以
下の範囲内であることが有利である。 更に、本発明の1態様によれば、外部交流電界の周波数
は、I MH2〜100 MHzの範囲であることが好
ましい。 作用 本発明者らは、このデバイス特性の再現性を向上させる
ために、プラズマ状態変動の原因について種々検討を加
えた結果、印加するバイアス電圧を同条件として成膜し
ても、セルフバイアス電位自体が±10%程度変動して
いること、更に、それは−回の成膜中においても変動し
ていることを見いだした。そして、このセルフバイアス
電位の変動が基板ホルダー部への負直流バイアス電圧印
加により形成する基板上のシース巾を変動させ、結果と
して基板への成膜速度を変動させていることをつきとめ
、本発明に至った。 即ち、本発明によれば、基板側の電位Aと、電極側の電
位Bをモニターし、その電位差C(=B−A)が常に所
定の値になるようにバイアス印加用電源を制御している
。そのため、電位差Cに依存して形成される基板上のシ
ース巾を一定とすることができ、基板上のa −3iG
e : H膜の成膜速度の変動を抑止することができる
。その結果、デバイス形成時の膜厚制御性を向上させ、
デバイス特性の再現性を確保できる。 尚、ここで電位差Cの値は、具体的には+40V以上、
+100 V以下であることが好ましい。即ち、電位差
Cが+40Vよりも低い場合は、後述するように、電位
差Cに依存して形成されるプラズマのシース巾りが小さ
く、a −5iGe : H膜中の5i−H2が多くな
るので、ΔσPhの高い良好なa −3iGe :H膜
が形成されない。また、電位差Cが+100Vよりも高
い場合は、成膜速度が極端に低下してしまい実用的では
ない。 また、外部交流電界の周波数は、I MHz〜100M
Hzの範囲内であることが好ましい。これは、周波数が
l MHzより低い場合は、プラズマ中のイオンがこの
周波数に追随できるので、前述の電位差CをOVより大
きくしても高品質なa −3iGe : H膜形成に必
要な基板上のシースが形成されないからである。また、
100 MHzより高い場合は、無電極放電が可能とな
りやはりシースが形成されない。 尚、 本発明の方法において、原料ガスは、Si源とし
ては5IH4,5i2H,,5i3He、5iFs等が
、またGe源としてはGeHg、GeFsなどが使用さ
れ、これらは一般にH2(ダングリングボンドターミネ
ータ)で希釈した状態で使用される。 以下に図面を参照して本発明をより具体的に詳述するが
、以下の開示は本発明の一実施例に過ぎず、本発明の技
術的範囲を何ら限定するものではない。 実施例 第1図は、本発明に係るa −5iGe : H薄膜の
作製方法の実施に適用することのできる並行平板プラズ
マCVD装置の構成を模式的に示す図である。 即ち、この並行平板型プラズマCVD装置1は反応室2
と、反応室2の上方に設けられ、基板3を支持する基板
ホルダ4と、同様に反応室2内の下方に設けられた下部
電極板5とを含んでいる。 下部電極5は例えば高周波電源6に接続され、高周波の
印加により反応室2内にプラズマを生じ、反応を促進し
得る構成となっている。また、下部電極5には、高周波
電源6と並列に直流バイアス電圧印加用電源7が接続さ
れており、直流バイアス電圧制御装置8により基板ホル
ダ4の電位と下部電極5の電位との電位差を測定し、そ
の電位差が所定の電圧になるようにバイアス印加用電源
7の出力電圧を制御できるように構成されている。 この装置を使用してa −3iGe : H膜を形成す
る操作は以下の通りである。まず、基板ホルダ4に基板
3をセットし、真空排気系(図示せず)の動作により反
応室2内を所定の高真空とする。次いで原料ガス混合物
9を反応室内に所定の圧力(流量)で供給し、一方で高
周波電源6およびバイアス印加用電源7、バイアス電圧
制御装置8を動作させ、反応室内に高周波プラズマを生
成させて、原料ガスの分解並びに反応生成物の基板上へ
の堆積を行う。 作製例 (1)基板への直流バイアス電圧印加とプラズマ状態の
変化 第2図に示す装置で従来法による基板DCバイアス電圧
印加とプラズマ状態の変化を調べた。成膜条件は第1表
に示す。 第1表 ガス流量 10%Si Hs/ H2200(sccm
〕10%GeHn/Hz  40 (sccm)圧力 
           1 (Torr)基板温度  
       200 (t)RFパワー密度    
 0.05 (W/cJ)RF周波数       1
3.56 CM)lz)第3図(a)〜(d)は、基板
へ印加する直流バイアス電圧を+100Vから一200
vまで、即ち、それぞれ+100V、 OV、 −10
0V、−200Vに変化させた場合のプラズマ状態の変
化を示す図である。 これらの図から明らかなように、負のバイアス電圧印加
に伴い基板からプラズマが遠ざかり、基板上のシース巾
りが増加している。 一方、成膜速度は、シース幅りの増加に伴って減少し、
バイアス電圧OVの場合に比較すると一200V印加し
た状態では約70%に減少した。即ち、シース幅りが大
きくなると成膜速度が遅くなる。これはプラズマが基板
から遠ざかり、基板に到達する成膜種が減少したためで
ある。 次に、基板直流バイアス電圧を−100Vに固定して何
回か成膜を行ない、下部電極部15の直流電位の変動を
求めた。 第4図はその結果をプロットしたグラフである。 同図に示すように、バイアス電圧が一定であるにもかか
わらず、下部電極の電位は±10%以上も変動している
。 更に、第5図は、第4図で示した成膜操作時における成
膜速度と電極間の電位差、即ち、下部電極15の直流電
位Bと基板ホルダ14の直流電位Aとの差C(=B−A
)の相関を示すグラフである。 第5図に示すように、電位差Cの増加に伴い成膜速度は
減少する。これは、電位差Cの増加によリシース巾りが
増加していることに対応する。 (2) RF電極、基板ホルダー電位差Cとa −9i
Ge :H膜質 次に、RF電極の直流電位Bと基板ホルダー部の直流電
位Aとの電位差Cとa −3iGe : H膜質との相
関を評価した。成膜条件は第1表に示した条件をそのま
ま採用し、成膜時間を90分、基板をC−3iとした。 赤外吸収から求められる5i−H2結合と5i−H結□
合との比を第6図に示す。 電位差Cの増加にともないSI  H2結合が減少して
おり、C≧40VでSI  H2結合の少ない良好な膜
質が得られた。即ち、電位差Cが40Vよりも小さいと
、プラズマシースの幅りが狭くなり、a−3iGe :
 H膜中のSI  H2結合が増加し、Δσ、。 が低下するので好ましくない。 また、電位差Cが100Vより大きくなるとプラズマシ
ースの巾りが急激に大きくなり、成膜速度が著しく低下
し実用的ではない。 以上の結果から、電位差Cは40V以上100 V以下
であることが好ましいことが確認される。 (3)太陽電池出力特性と再現性 本発明に係る方法と第2図に示した装置を使用した従来
の方法とで、成膜条件を揃えて15回の成膜を行ない成
膜速度のバラツキを評価した。成膜条件は第1表と同じ
とし、本発明法による実施例では下部電極5と基板ホル
ダ4との電位差が+60Vになるように制御した。従来
法では基板ホルダ14に一100VのDCバイアス電圧
を印加した。また、基板には5US304を用いた。そ
の結果、本発明による成膜速度のバラツキは±5%以下
であるのに対し、従来法では±10%以上で、本発明に
係る方法が成膜速度の制御に有効であることが確認され
た。 更に、同様に、本発明に係る方法と従来の方法とで、他
の条件を揃えてa −5iGe : H太陽電池の作製
を行ない、その特性を評価した。 a −3iGe : H太陽電池は透明導電膜を蒸着し
たガラス基板上にpin構造で形成した。pS’n層の
成膜条□件は本発明法、従来法ともに第2表に示した条
件で形成した。i層形成時の成膜条件は、本発明では下
部電極5と基板ホルダ4との電位差を+60Vで制御し
た。一方、従来法では下部電極15と基板ホルダ14と
の電位差が当初+60Vとなるように基板ホルダ4に一
100VのDCバイアス電圧を印加した。 その他の成膜条件は第1表に示した値とし、i層の膜厚
が2000 Aになるように、成膜時間は90゜で一定
とした。さらに太陽電池特性向上のため、本出願人によ
る特願昭61−6885号の明細書に記載したp/iG
eグレーデッド層、並びに、i / n界面の欠陥低減
に役立つi / n [yeグレーデッド層をそれぞれ
設けた。このp/iS i/nGeグレーデッド層の膜
厚は、上記i層成膜時間90分のうち、最初の10分を
p/iGeグレーデッド層、最後の10分をi/nGe
グレーデッド層とすることで制御し、本発明法と従来法
とで同一とした。 第2表
Industrial Application Field The present invention is directed to amorphous silicon germanium (hereinafter referred to as
a-3iGe (denoted as H) thin film manufacturing method. More specifically, the present invention is a method for producing an amorphous silicon germanium thin film as a narrow bandgap material useful in multilayer structure amorphous silicon solar cells, etc. The present invention relates to a method for manufacturing an amorphous silicon germanium thin film. Conventional technology The band gap (E9) of amorphous silicon (hereinafter referred to as a-3i:H) conventionally used in solar cells has extremely low sensitivity to light with an energy of about 1.756 V or less. (Attempts have been made to lower the band gap by adding group II elements such as Ge.
a-3i:H, that is, a-3iGe:
Since H has excellent long-wavelength sensitivity, it is expected to be used in various applications such as solar cells and imaging devices. a-3iGe:H thin film is Blaz? CVD method, reactive sputtering method, ion blating method, optical C
Production using methods such as the VD method has already been attempted. However, an a-3iGe:H film with photoconductivity excellent enough to be used in solar cells has not yet been realized, and therefore, a practically usable a-3iGe:H product has not been obtained. As a proposal for these fields, a-3iGe
: Patent application No. 60-21342 as a method for producing H thin film
No. 2 (filed on September 26, 1985), or Patent Application No. 1988-6885 (filed on January 16, 1985) for a method for manufacturing amorphous silicon germanium solar cells.
etc. have already been filed by the applicant. Problem to be solved by the invention Figure 2 shows that a-3iG is produced by plasma enhanced chemical vapor deposition.
FIG. 2 is a diagram schematically showing the configuration of an apparatus for producing an e:)i thin film. That is, this parallel plate type plasma CVD apparatus 11 includes a reaction chamber 12, a substrate holder 14 provided above the reaction chamber 12 and supporting a substrate 13, and a lower electrode plate similarly provided below within the reaction chamber 12. 15. The lower electrode 15 is connected to a high frequency power source 16, and is configured to generate plasma in the reaction chamber 12 by applying high frequency to promote the reaction. Further, a DC power supply 16 for applying a bias voltage is connected to the substrate holder 14 . The operation for forming an a-3iGe:H film using this apparatus is as follows. That is, first, the substrate 13 is set on the substrate holder 14, the inside of the reaction chamber 12 is brought to a predetermined high vacuum by operation of a vacuum evacuation system (not shown), and then the raw material gas mixture 18 is brought into the reaction chamber at a predetermined pressure (flow rate). On the other hand, a high frequency power supply 17 and a bias application power supply 16
is operated to generate high-frequency plasma in the reaction chamber, decomposing the source gas and depositing reaction products on the substrate. By the way, the a-3iG in the conventional device as mentioned above
e: In the process of forming the H thin film, a-3iGe
Although there is almost no change in the film properties of the :H film, it is known that the film formation rate changes by about ±15%. This is considered to be because the plasma state fluctuates depending on the state of film attachment to the electrode plate 15 because the electrode plate 15 is in a floating state. Such unexpected fluctuations in film formation rate significantly reduce film thickness controllability when producing multilayer thin film devices such as solar cells, resulting in a problem of reduced reproducibility of device characteristics. Therefore, the purpose of the present invention is to solve the problems of the above-mentioned conventional technology and to develop a novel a-3iGe film that improves the reproducibility of device characteristics of products by enabling precise film thickness control:
An object of the present invention is to provide a method for producing a H thin film. Means for solving the problem, namely, according to the present invention, by plasma enhanced chemical vapor deposition method,
In a method of introducing a low-pressure gas mixture of raw materials including a Si source, a Ge source, and hydrogen into a reaction chamber, applying an external alternating current electric field to obtain plasma, and causing a reaction to form an amorphous silicon germanium thin film on a substrate. , during the film forming operation, a potential difference between a first potential that is a DC potential on the substrate side and a second potential that is a DC potential of an electrode section to which the external AC electric field is applied is kept constant at a predetermined value. Accordingly, there is provided a method for manufacturing an amorphous silicon germanium thin film characterized by controlling a DC bias voltage applied from the outside to the electrode and/or a DC bias voltage applied from the outside to the substrate holder. Further, according to a preferred aspect of the present invention, it is advantageous that the potential difference between the first potential and the second potential is within a range of 40 V or more and 100 V or less. Further, according to one aspect of the invention, the frequency of the external alternating electric field is preferably in the range of I MH2 to 100 MHz. Effect In order to improve the reproducibility of this device characteristic, the present inventors conducted various studies on the causes of plasma state fluctuations, and found that even if the film is formed with the same applied bias voltage, the self-bias potential itself It was found that the value fluctuated by about ±10%, and that it also fluctuated during the -th film formation. Then, it was discovered that this variation in self-bias potential caused the width of the sheath formed on the substrate to be varied by applying a negative DC bias voltage to the substrate holder, and as a result, the rate of film formation on the substrate was varied. reached. That is, according to the present invention, the potential A on the substrate side and the potential B on the electrode side are monitored, and the power supply for bias application is controlled so that the potential difference C (=B-A) is always a predetermined value. There is. Therefore, the width of the sheath formed on the substrate depending on the potential difference C can be made constant, and the width of the sheath on the substrate can be kept constant.
e: Fluctuations in the deposition rate of the H film can be suppressed. As a result, film thickness controllability during device formation is improved,
Reproducibility of device characteristics can be ensured. In addition, here, the value of the potential difference C is specifically +40V or more,
It is preferable that the voltage is +100 V or less. That is, when the potential difference C is lower than +40V, the sheath width of the plasma formed depending on the potential difference C is small and the amount of 5i-H2 in the a-5iGe:H film increases, as will be described later. A good a-3iGe:H film with a high ΔσPh is not formed. Furthermore, if the potential difference C is higher than +100V, the film formation rate will be extremely reduced, which is not practical. In addition, the frequency of the external AC electric field is I MHz ~ 100M
Preferably, it is within the range of Hz. This is because when the frequency is lower than 1 MHz, the ions in the plasma can follow this frequency, so even if the potential difference C mentioned above is made larger than OV, a high quality a-3iGe:H film can be formed on the substrate. This is because no sheath is formed. Also,
When the frequency is higher than 100 MHz, electrodeless discharge is possible and no sheath is formed. In the method of the present invention, as the raw material gas, 5IH4, 5i2H, 5i3He, 5iFs, etc. are used as a Si source, and GeHg, GeFs, etc. are used as a Ge source, and these are generally H2 (dangling bond terminator). It is used diluted with. The present invention will be described in more detail below with reference to the drawings, but the following disclosure is only one example of the present invention and does not limit the technical scope of the present invention in any way. Embodiment FIG. 1 is a diagram schematically showing the configuration of a parallel plate plasma CVD apparatus that can be applied to the method for producing an a-5iGe:H thin film according to the present invention. That is, this parallel plate type plasma CVD apparatus 1 has a reaction chamber 2
, a substrate holder 4 that is provided above the reaction chamber 2 and supports the substrate 3, and a lower electrode plate 5 that is similarly provided below the reaction chamber 2. The lower electrode 5 is connected to, for example, a high frequency power source 6, and is configured to generate plasma in the reaction chamber 2 by applying high frequency to promote the reaction. Further, a DC bias voltage applying power source 7 is connected to the lower electrode 5 in parallel with the high frequency power source 6, and a DC bias voltage control device 8 measures the potential difference between the potential of the substrate holder 4 and the potential of the lower electrode 5. However, the output voltage of the bias application power source 7 can be controlled so that the potential difference becomes a predetermined voltage. The operation for forming an a-3iGe:H film using this apparatus is as follows. First, the substrate 3 is set on the substrate holder 4, and the inside of the reaction chamber 2 is brought to a predetermined high vacuum by operating a vacuum evacuation system (not shown). Next, the raw material gas mixture 9 is supplied into the reaction chamber at a predetermined pressure (flow rate), while the high frequency power source 6, bias application power source 7, and bias voltage control device 8 are operated to generate high frequency plasma in the reaction chamber. The source gas is decomposed and the reaction products are deposited on the substrate. Preparation Example (1) Application of DC bias voltage to substrate and change in plasma state Using the apparatus shown in FIG. 2, application of DC bias voltage to the substrate and change in plasma state by a conventional method was investigated. The film forming conditions are shown in Table 1. Table 1 Gas flow rate 10%Si Hs/H2200 (sccm
]10%GeHn/Hz 40 (sccm) pressure
1 (Torr) Substrate temperature
200 (t)RF power density
0.05 (W/cJ) RF frequency 1
3.56 CM) lz) Figures 3 (a) to (d) show how to vary the DC bias voltage applied to the substrate from +100V to -200V.
up to v, i.e. +100V, OV, -10 respectively
It is a figure which shows the change of a plasma state when it changes to 0V and -200V. As is clear from these figures, as the negative bias voltage is applied, the plasma moves away from the substrate, and the sheath width above the substrate increases. On the other hand, the deposition rate decreases as the sheath width increases;
Compared to the case where the bias voltage OV was applied, the voltage decreased to about 70% when -200V was applied. That is, as the sheath width increases, the film formation rate decreases. This is because the plasma moves away from the substrate, and the number of film-forming species that reach the substrate decreases. Next, film formation was performed several times with the substrate DC bias voltage fixed at -100V, and fluctuations in the DC potential of the lower electrode portion 15 were determined. FIG. 4 is a graph plotting the results. As shown in the figure, although the bias voltage is constant, the potential of the lower electrode fluctuates by more than ±10%. Furthermore, FIG. 5 shows the film deposition rate and the potential difference between the electrodes during the film deposition operation shown in FIG. 4, that is, the difference C (= B-A
) is a graph showing the correlation between As shown in FIG. 5, the film formation rate decreases as the potential difference C increases. This corresponds to an increase in the resheath width due to an increase in the potential difference C. (2) RF electrode, substrate holder potential difference C and a -9i
Ge:H Film Quality Next, the correlation between the potential difference C between the DC potential B of the RF electrode and the DC potential A of the substrate holder portion and the a-3iGe:H film quality was evaluated. The film forming conditions shown in Table 1 were used as they were, the film forming time was 90 minutes, and the substrate was C-3i. 5i-H2 bond and 5i-H bond determined from infrared absorption □
Figure 6 shows the ratio to the total. As the potential difference C increases, the SI H2 bond decreases, and when C≧40V, a good film quality with less SI H2 bond was obtained. That is, when the potential difference C is smaller than 40V, the width of the plasma sheath becomes narrower, and a-3iGe:
The SI H2 bond in the H film increases, Δσ,. This is not preferable because it reduces the Furthermore, when the potential difference C becomes larger than 100 V, the width of the plasma sheath increases rapidly, and the film formation rate decreases significantly, making it impractical. From the above results, it is confirmed that the potential difference C is preferably 40 V or more and 100 V or less. (3) Solar cell output characteristics and reproducibility Film deposition was performed 15 times with the same deposition conditions using the method according to the present invention and the conventional method using the apparatus shown in Figure 2, and there was no variation in the deposition rate. was evaluated. The film forming conditions were the same as those in Table 1, and in the example according to the method of the present invention, the potential difference between the lower electrode 5 and the substrate holder 4 was controlled to be +60V. In the conventional method, a DC bias voltage of -100V was applied to the substrate holder 14. Furthermore, 5US304 was used for the substrate. As a result, the variation in film deposition rate according to the present invention was less than ±5%, whereas the variation in the conventional method was ±10% or more, confirming that the method according to the present invention is effective in controlling the film deposition rate. Ta. Furthermore, similarly, a-5iGe:H solar cells were produced using the method according to the present invention and the conventional method under the same conditions, and their characteristics were evaluated. The a-3iGe:H solar cell was formed in a pin structure on a glass substrate on which a transparent conductive film was deposited. The pS'n layer was formed under the conditions shown in Table 2 for both the method of the present invention and the conventional method. In the present invention, the film forming conditions at the time of forming the i-layer were such that the potential difference between the lower electrode 5 and the substrate holder 4 was controlled to be +60V. On the other hand, in the conventional method, a DC bias voltage of -100V was applied to the substrate holder 4 so that the potential difference between the lower electrode 15 and the substrate holder 14 was initially +60V. Other film forming conditions were set to the values shown in Table 1, and the film forming time was kept constant at 90° so that the film thickness of the i-layer was 2000 Å. Furthermore, in order to improve solar cell characteristics, p/iG
An e-graded layer and an i/n[ye-graded layer that are useful for reducing defects at the i/n interface were provided. The film thickness of this p/iS i/nGe graded layer is such that the first 10 minutes of the above 90 minutes of i-layer deposition time are the p/iGe graded layer and the last 10 minutes are the i/nGe graded layer.
This was controlled by using a graded layer, and the method of the present invention and the conventional method were made the same. Table 2

【p層] ガス流量 10%SiH4/H2100(sccm:1
10%CH,/Ha    75 (sccm〕500
1]pmB*Hs/Hz  100 (sccm〕圧力
        1  (Torr〕基板温度    
 200  (t) RFパワー密度 0.05  CW/cat)RF周波
数   13.56  CM)lz)成膜時間    
  3 〔分〕 (〜200人)【n層】 ガス流量 lO%SI H4/ H2100(sccm
〕10001)p+++PH3/Hz  100 (s
ccm)圧力        2  (Torr)基板
温度     200〔℃〕 RFパワー密度 0.50  CW/c++f)RF周
波数   13.56  CM)Iz)成膜時間   
  6 〔分〕 (〜500人)第7図(a)および(
b)は、作製した太陽電池の出力特性の分布を示す図で
あり、第7図(a)は本発明に係る方法によって作製し
た太陽電池の特性、第7図(b)は従来法によって作製
した太陽電池の特性にそれぞれ対応している。尚、測定
はAM (エアマス)1.5.100mW/cdの条件
で行なツタ。 従来法では、成膜速度のバラツキが大きいため、p/】
、i / n界面のGeグレーデツド層や1層そのもの
の膜厚制御性が悪く、FFのバラツキが大きいことがわ
かる。これは、a −3iGe : H膜特性が改善さ
れたとはいえ、a−3i:H膜よりも劣っており、1層
の膜厚変化に対するFFの変動が大きいことと、p/i
、、i/n界面Geグレーデッド層の膜厚が太陽電池の
FFに大きく影響することに起因している。 これに対して、本発明法では、成膜速度のバラツキが小
さいため、再現性よく太陽電池を製造することができ、
FFのバラツキが減少しており、再現性が向上している
ことがわかる。 発明の効果 以上詳述の如く、本発明に係るa −3iGe : H
薄膜の作製方法では、成膜速度の制御が精密に行なえる
ことから、製品の膜質が良好であると共に特性が安定し
ており、太陽電池などのデバイスに十分応用できるa 
−5iGe : H膜を再現性よく製造することができ
る。特に太陽電池のように膜厚の微細制御が必要な多層
薄膜デバイスの形成に利用するとその効果が極めて大き
い。
[P layer] Gas flow rate 10% SiH4/H2100 (sccm: 1
10%CH,/Ha 75 (sccm) 500
1] pmB*Hs/Hz 100 (sccm) Pressure 1 (Torr) Substrate temperature
200 (t) RF power density 0.05 CW/cat) RF frequency 13.56 CM) lz) Film formation time
3 [minutes] (~200 people) [N layer] Gas flow rate 1O%SI H4/ H2100 (sccm
]10001) p+++PH3/Hz 100 (s
ccm) Pressure 2 (Torr) Substrate temperature 200 [℃] RF power density 0.50 CW/c++f) RF frequency 13.56 CM) Iz) Film formation time
6 [minutes] (~500 people) Figure 7 (a) and (
b) is a diagram showing the distribution of output characteristics of the produced solar cells, FIG. 7(a) shows the characteristics of the solar cell produced by the method according to the present invention, and FIG. 7(b) shows the distribution of the output characteristics of the produced solar cells Each corresponds to the characteristics of the solar cell. The measurements were conducted under AM (air mass) conditions of 1.5.100 mW/cd. In the conventional method, due to large variations in film formation speed, p/]
, it can be seen that the thickness controllability of the Ge graded layer or the single layer itself at the i/n interface is poor, and the FF variation is large. This is due to the fact that although the a-3iGe:H film properties have been improved, it is inferior to the a-3i:H film, and the FF fluctuation is large with respect to changes in the film thickness of one layer, and the p/i
This is because the thickness of the I/N interface Ge graded layer greatly affects the FF of the solar cell. In contrast, with the method of the present invention, the variation in film formation rate is small, so solar cells can be manufactured with good reproducibility.
It can be seen that the variation in FF is reduced and the reproducibility is improved. Effects of the Invention As detailed above, a-3iGe:H according to the present invention
The thin film production method allows precise control of the film formation rate, which results in good film quality and stable properties, making it suitable for use in devices such as solar cells.
-5iGe: H film can be manufactured with good reproducibility. The effect is particularly great when used to form multilayer thin film devices such as solar cells that require fine control of film thickness.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明に係るa −3iGe : Hの製造
方法の実施に適用することのできる平行平板電極型プラ
ズマCVD装置の構成を模式的に示す図であり、 第2図は、プラズマ化学気相蒸着法による従来法でa 
−3iGe : H薄膜を作製する場合に使用する装置
の構成を模式的に示す図であり、 第3図(a)〜(d)は、従来法である基板ホルダへの
DCバイアス電圧印加に伴うプラズマ状態の変化を模式
的に示す図であり、 第4図は、従来法により同条件成膜を行なった時の下部
電極部15の直流電位の変化を示す図であり、 第5図は、下部電極部の直流電位と基板ホルダの直流電
位Aとの差C(=B−A)と成膜速度との相関を示す図
であり、 第6図は、電位差Cとa −3iGe : H膜質(赤
外吸収特性)との相関を示す図であり、 第7図(a)および(ハ)は、本発明法と従来法とで同
一条件下でa −5iGe : H太陽電池を作製した
場合のセル出力特性の分布を示す図であり、第7図(a
)は本発明法に、第7図(b)は従来法にそれぞれ対応
しいてる。 第1図 〔主な参照番号〕 1111   並行平板型プラズマCVD装置、2.1
2    反応室、 3.13・  基板、 4.14    基板ホルダ、 5.15    下部電極板、 6.17   高周波電源、 7.16    直流バイアス電圧印加用直流電源、8
・・・・  バイアス電圧制御装置、9.18    
原料ガス、 5・・・電極板 特許出願人  住友電気工業株式会社
FIG. 1 is a diagram schematically showing the configuration of a parallel plate electrode type plasma CVD apparatus that can be applied to the implementation of the a-3iGe:H manufacturing method according to the present invention, and FIG. Conventional method using vapor phase deposition method
-3iGe: This is a diagram schematically showing the configuration of an apparatus used when producing a H thin film. FIG. 4 is a diagram schematically showing changes in the plasma state; FIG. 4 is a diagram showing changes in the DC potential of the lower electrode portion 15 when film formation is performed under the same conditions by a conventional method; FIG. This is a diagram showing the correlation between the difference C (=B-A) between the DC potential of the lower electrode part and the DC potential A of the substrate holder and the film formation rate. (infrared absorption characteristics), and FIGS. 7(a) and 7(c) show the case where a-5iGe:H solar cells were produced under the same conditions using the method of the present invention and the conventional method. FIG. 7(a) is a diagram showing the distribution of cell output characteristics of
) corresponds to the method of the present invention, and FIG. 7(b) corresponds to the conventional method. Figure 1 [Main reference numbers] 1111 Parallel plate plasma CVD apparatus, 2.1
2 Reaction chamber, 3.13 Substrate, 4.14 Substrate holder, 5.15 Lower electrode plate, 6.17 High frequency power supply, 7.16 DC power supply for applying DC bias voltage, 8
...Bias voltage control device, 9.18
Raw material gas, 5... Electrode plate patent applicant Sumitomo Electric Industries, Ltd.

Claims (1)

【特許請求の範囲】[Claims] プラズマ化学気相蒸着法により、Si源、Ge源および
水素を含む原料の低圧ガス混合物を反応室に導入し、外
部交流電界を印加してプラズマを得、反応を生じさせて
基板上にアモルファスシリコンゲルマニウム薄膜を成膜
する方法において、前記成膜操作中に、前記基板側の直
流電位である第1電位と、前記外部交流電界を印加する
電極部の直流電位である第2電位との電位差が所定の値
で一定に保たれるように、外部から該電極へ印加する直
流バイアス電圧および/または基板ホルダー部へ外部か
ら印加する直流バイアス電圧を制御することを特徴とす
るアモルファスシリコンゲルマニウム薄膜の製造方法。
By plasma enhanced chemical vapor deposition, a low-pressure gas mixture of raw materials including Si source, Ge source and hydrogen is introduced into a reaction chamber, an external alternating current electric field is applied to obtain a plasma, and a reaction is caused to deposit amorphous silicon on the substrate. In the method for forming a germanium thin film, during the film forming operation, a potential difference between a first potential that is a DC potential on the substrate side and a second potential that is a DC potential of an electrode section to which the external AC electric field is applied is Production of an amorphous silicon germanium thin film characterized by controlling the DC bias voltage applied from the outside to the electrode and/or the DC bias voltage applied from the outside to the substrate holder so that it is kept constant at a predetermined value. Method.
JP63272365A 1988-10-28 1988-10-28 Manufacture of amorphous silicon germanium thin film Pending JPH02119125A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63272365A JPH02119125A (en) 1988-10-28 1988-10-28 Manufacture of amorphous silicon germanium thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
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Publications (1)

Publication Number Publication Date
JPH02119125A true JPH02119125A (en) 1990-05-07

Family

ID=17512870

Family Applications (1)

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Country Status (1)

Country Link
JP (1) JPH02119125A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100256462B1 (en) * 1995-12-19 2000-05-15 포만 제프리 엘 Process for reducing circuit damage during pecvd in single wafer pecvd system
US6670270B1 (en) 1998-03-24 2003-12-30 Nec Electronics Corporation Semiconductor device manufacturing apparatus and semiconductor device manufacturing method
JP2010278223A (en) * 2009-05-28 2010-12-09 Shimadzu Corp Plasma cvd apparatus, apparatus for forming antireflection film of solar cell, and apparatus for forming passivation film of semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100256462B1 (en) * 1995-12-19 2000-05-15 포만 제프리 엘 Process for reducing circuit damage during pecvd in single wafer pecvd system
US6670270B1 (en) 1998-03-24 2003-12-30 Nec Electronics Corporation Semiconductor device manufacturing apparatus and semiconductor device manufacturing method
US7220318B2 (en) 1998-03-24 2007-05-22 Nec Electronics Corporation Semiconductor device manufacturing apparatus and semiconductor device manufacturing method
US7563696B2 (en) 1998-03-24 2009-07-21 Nec Electronics Corporation Semiconductor device manufacturing apparatus and semiconductor device manufacturing method
JP2010278223A (en) * 2009-05-28 2010-12-09 Shimadzu Corp Plasma cvd apparatus, apparatus for forming antireflection film of solar cell, and apparatus for forming passivation film of semiconductor device

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