JPH02114341U - - Google Patents
Info
- Publication number
- JPH02114341U JPH02114341U JP2399189U JP2399189U JPH02114341U JP H02114341 U JPH02114341 U JP H02114341U JP 2399189 U JP2399189 U JP 2399189U JP 2399189 U JP2399189 U JP 2399189U JP H02114341 U JPH02114341 U JP H02114341U
- Authority
- JP
- Japan
- Prior art keywords
- overcurrent
- deceleration time
- levels
- level
- overcurrent level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 6
- 230000008929 regeneration Effects 0.000 description 2
- 238000011069 regeneration method Methods 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Protection Of Static Devices (AREA)
- Stopping Of Electric Motors (AREA)
Description
第1図〜第3図は、この考案の一実施例を示す
図であり、第1図はインバータの保護回路を示す
図、第2図は回生時の電流の流れを示す図、第3
図は回生時の直流母線と出力の電流を比較した図
、第4図、第5図は従来のインバータの保護回路
を示す図である。
図において、1は商用電源、2は順変器、3は
コンデンサ、4はスイツチング素子、5はモータ
、6はマイクロプロセツサ、7はしや断回路、8
は正転指令器、10は逆転指令器、9,11はプ
ルアツプ抵抗、12は周波数設定ボリユーム、1
3は加速時間設定器、14は減速時間設定器、1
5は電流検出器、16は過電流レベル設定、17
,18は比較器、19は選択回路、20はラツチ
、21は増幅器、22は電流検出器、23は加算
器と整流回路、24は減速時間設定器である。な
お、図中、同一符号は同一、又は相当部分を示す
。
Figures 1 to 3 are diagrams showing an embodiment of this invention. Figure 1 is a diagram showing an inverter protection circuit, Figure 2 is a diagram showing the flow of current during regeneration, and Figure 3 is a diagram showing an inverter protection circuit.
The figure is a diagram comparing the current of the DC bus and the output during regeneration, and FIGS. 4 and 5 are diagrams showing a conventional inverter protection circuit. In the figure, 1 is a commercial power supply, 2 is a forward transformer, 3 is a capacitor, 4 is a switching element, 5 is a motor, 6 is a microprocessor, 7 is a disconnection circuit, and 8 is a
is a forward rotation command, 10 is a reverse rotation command, 9 and 11 are pull-up resistors, 12 is a frequency setting volume, 1
3 is an acceleration time setter, 14 is a deceleration time setter, 1
5 is a current detector, 16 is an overcurrent level setting, 17
, 18 is a comparator, 19 is a selection circuit, 20 is a latch, 21 is an amplifier, 22 is a current detector, 23 is an adder and rectifier circuit, and 24 is a deceleration time setter. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
インーバータ装置において、固定の過電流レベル
と、減速時間を設定するボリユームの値により変
化する過電流レベルの2つを備えてなり、加速定
速時と、減速時にて上記2つの過電流レベルを選
択するようにし、減速時間が短い場合は、過電流
レベルを下げるよう構成したことを特徴とするイ
ンバータの保護回路。 An inverter device that converts direct current into alternating current with variable frequency and variable voltage has two overcurrent levels: a fixed overcurrent level and an overcurrent level that changes depending on the volume value that sets the deceleration time. An inverter protection circuit characterized in that the above two overcurrent levels are selected during deceleration, and the overcurrent level is lowered when the deceleration time is short.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2399189U JPH02114341U (en) | 1989-03-02 | 1989-03-02 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2399189U JPH02114341U (en) | 1989-03-02 | 1989-03-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02114341U true JPH02114341U (en) | 1990-09-13 |
Family
ID=31243453
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2399189U Pending JPH02114341U (en) | 1989-03-02 | 1989-03-02 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02114341U (en) |
-
1989
- 1989-03-02 JP JP2399189U patent/JPH02114341U/ja active Pending
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