JPH0193168A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0193168A JPH0193168A JP25205787A JP25205787A JPH0193168A JP H0193168 A JPH0193168 A JP H0193168A JP 25205787 A JP25205787 A JP 25205787A JP 25205787 A JP25205787 A JP 25205787A JP H0193168 A JPH0193168 A JP H0193168A
- Authority
- JP
- Japan
- Prior art keywords
- type
- region
- epitaxial layer
- recess
- collector region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 12
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 11
- 239000010703 silicon Substances 0.000 claims abstract description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 10
- 230000003321 amplification Effects 0.000 abstract description 7
- 238000003199 nucleic acid amplification method Methods 0.000 abstract description 7
- 239000000969 carrier Substances 0.000 abstract description 3
- 238000005530 etching Methods 0.000 abstract description 3
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
Landscapes
- Bipolar Transistors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に関し、特に横形ＰＮＰトランジス
タに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to semiconductor devices, and particularly to lateral PNP transistors.
第３図は従来の横形ＰＮＰ）ランジスタの構造を示す半
導体装置の模式的断面図で、通常、同一基板上に形成さ
れる縦型ＮＰＮトランジスタのベース拡散と共にエミッ
タ領域４およびコレクタ領域５が同時形成される。ここ
で、１はＰ型シリコン基板、２はＮ型高濃度埋込領域、
３はＮ型エピタキシャル層、６はＮ型ベース電極引出し
領域、７はシリコン酸化膜である。FIG. 3 is a schematic cross-sectional view of a semiconductor device showing the structure of a conventional horizontal PNP transistor, in which an emitter region 4 and a collector region 5 are usually formed simultaneously with the base diffusion of a vertical NPN transistor formed on the same substrate. be done. Here, 1 is a P-type silicon substrate, 2 is an N-type high concentration buried region,
3 is an N-type epitaxial layer, 6 is an N-type base electrode extraction region, and 7 is a silicon oxide film.
第３図に示す構造の横型ＰＮＰ）ランジスタでは、エミ
ッタ領域４から注入されたキャリアは横方向の成分−と
垂直方向の成分とに分けられ、横方向に注入されたキャ
リアは、コレクタ領域５に捕獲されてコレクタ電流とな
るが、垂直方向の成分は、一部はＰ型シリコン基板１に
集成されて無効電流となり、また他のほとんどはエピタ
キシャル層３の内部で再結合しベース電流となるので、
高い電流増幅率（ｈｐ）：）をもつトランジスタを得る
ことは望めない。In the lateral PNP transistor having the structure shown in FIG. It is captured and becomes a collector current, but some of the vertical components are collected in the P-type silicon substrate 1 and become a reactive current, and most of the others are recombined inside the epitaxial layer 3 and become a base current. ,
It is not possible to obtain a transistor with a high current amplification factor (hp).
本発明の目的は、上記の情況に鑑み、高い電流増幅率（
ｈｐｔ）をもつ横形ＰＮＰ）ランジスタを提供すること
である。In view of the above circumstances, an object of the present invention is to have a high current amplification factor (
To provide a horizontal PNP) transistor with
本発明によれば、半導体装置は、Ｐ型シリコン基板と、
前記Ｐ型シリコン基板上に埋込まれるＮ型高濃度埋込領
域と、前記Ｎ型高濃度埋込領域を含む基板上に形成され
るＮ型エピタキシャル層と、前記Ｎ型エピタキシャル層
の表面に互いに離間して形成されるＰ型エミッタ領域お
よびベース電極引出し領域と前記Ｎ型高濃度埋込領域を
゛含む前記Ｎ型エピタキシャル層表面の凹部内に前記Ｐ
型エミッタ領域を取囲むように形成されるＰ型コレクタ
領域とから成る横形ＰＮＰ）ランジスタとを含む。According to the present invention, a semiconductor device includes a P-type silicon substrate;
an N-type high concentration buried region buried on the P-type silicon substrate; an N-type epitaxial layer formed on the substrate including the N-type high concentration buried region; The P-type emitter region and the base electrode lead-out region and the N-type high-concentration buried region are formed in a recess on the surface of the N-type epitaxial layer.
and a P-type collector region formed surrounding a P-type emitter region.
以下図面を参照して本発明の詳細な説明する。 The present invention will be described in detail below with reference to the drawings.
第１図は本発明の一実施例を示す半導体装置の断面図で
ある０本実施例によれば、本発明の半導体装置は、Ｐ型
シリコン基板１と、このシリコ基板１上に形成されるＮ
型高濃度埋込領域２およびＮ型エピタキシャル層３と、
Ｎ型高濃度埋込領域２を含むＮ型エピタキシャル層上に
それぞれ形成されるＰ型エミッタ領域４およびこのＰ型
エミッタ領域４を取囲むようにＮ型エピタキシャル層３
の凹部に形成されたＰ型コレクタ領域５と、これに隣接
して設けられたベース電極引出し領域６と、シリコン酸
化膜７とを含む、この構造の横形ＰＮＰ）ランジスタは
、（１００）面を主面とするＰ型シリコン基板１上のＮ
型エピタキシャル層３の表面にアルカリ・エツチング液
を用い異方性エツチングして゛凹部を形成し、この底部
にＰ型コレクタ領域５を、また凹部以外の領域にＰ型エ
ミッタ領域４を同時形成することによって作成される。FIG. 1 is a cross-sectional view of a semiconductor device showing one embodiment of the present invention.According to this embodiment, the semiconductor device of the present invention includes a P-type silicon substrate 1 and a semiconductor device formed on this silicon substrate 1. N
type high concentration buried region 2 and N type epitaxial layer 3,
A P-type emitter region 4 is formed on each N-type epitaxial layer including the N-type heavily doped buried region 2, and an N-type epitaxial layer 3 surrounds the P-type emitter region 4.
A lateral PNP transistor having this structure includes a P-type collector region 5 formed in a recess, a base electrode lead-out region 6 provided adjacent to the P-type collector region 5, and a silicon oxide film 7. N on the P-type silicon substrate 1 as the main surface
A recess is formed on the surface of the type epitaxial layer 3 by anisotropic etching using an alkaline etching solution, and a P-type collector region 5 is simultaneously formed at the bottom of the recess, and a P-type emitter region 4 is simultaneously formed in an area other than the recess. Created by
この構造によれば、コレクタ領域５の底部がＮ型高濃度
埋込領域２に接近しておりエミッタ領域４の底面から注
入されたキャリアは効率良くコレクタ領域５に捕獲され
るので電流増幅率（ｈ＋ｔ）を大幅に改善することがで
きる。According to this structure, the bottom of the collector region 5 is close to the N-type heavily doped buried region 2, and carriers injected from the bottom of the emitter region 4 are efficiently captured by the collector region 5, so that the current amplification factor ( h+t) can be significantly improved.
第２図は本発明の他の実施例を示す半導体装置の断面図
である。本実施例によれば、ベース電極引出し領域６も
またコレクタ領域５と同じくＮ型エピタキシャル層３に
形成された凹部の底部に形成される。本実施例によれば
、電流増幅率（ｈ＋ｔ）の他にベース抵抗低減による雑
音特性の改善効果を併せ得ることができる。FIG. 2 is a sectional view of a semiconductor device showing another embodiment of the present invention. According to this embodiment, the base electrode lead-out region 6 is also formed at the bottom of the recess formed in the N-type epitaxial layer 3, like the collector region 5. According to this embodiment, in addition to the current amplification factor (h+t), it is also possible to obtain the effect of improving noise characteristics by reducing the base resistance.
以上説明したように、本発明によれば、Ｎ型エピタキシ
ャル層表面に凹部を設けその底部にコレクタ領域を形成
することによって、コレクタ領域の底部をＮ型高濃度埋
込領域に接近させ、エミッタ領域の底面から注入される
キャリアを効率良くコレクタ領域に捕獲せしめるので、
高い電流増幅率（ｈｐｔ）をもつ横形ＰＮＰ）ランジス
タを容易に得ることができる。As explained above, according to the present invention, a recess is provided on the surface of the N-type epitaxial layer and a collector region is formed at the bottom of the recess, thereby bringing the bottom of the collector region close to the N-type high concentration buried region and forming an emitter region. Because carriers injected from the bottom of the collector are efficiently captured in the collector region,
Horizontal PNP transistors with high current amplification factors (hpt) can be easily obtained.
第１図は本発明の一実施例を示す半導体装置の模式的断
面図、第２図は本発明の他の実施例を示す半導体装置の
模式的断面図、第３図は従来の横形ＰＮＰ）ランジスタ
の構造を示す半導体装置の模式的断面図である。
１・・・Ｐ型シリコン基板、２・・・Ｎ型高濃度埋込領
域、３・・・Ｎ型エピタキシャル層、４・・・Ｐ型エミ
ッタ領域、５・・・Ｐ型コレクタ領域、６・・・Ｎ型ベ
ース電極引出し領域、７・・・シリコン酸化膜。FIG. 1 is a schematic sectional view of a semiconductor device showing one embodiment of the present invention, FIG. 2 is a schematic sectional view of a semiconductor device showing another embodiment of the invention, and FIG. 3 is a conventional horizontal PNP). 1 is a schematic cross-sectional view of a semiconductor device showing the structure of a transistor. DESCRIPTION OF SYMBOLS 1... P-type silicon substrate, 2... N-type high concentration buried region, 3... N-type epitaxial layer, 4... P-type emitter region, 5... P-type collector region, 6... ... N-type base electrode extraction region, 7... silicon oxide film.
Claims (1)
まれるＮ型高濃度埋込領域と、前記Ｎ型高濃度埋込領域
を含む基板上に形成されるＮ型エピタキシャル層と、前
記Ｎ型エピタキシャル層の表面に互いに離間して形成さ
れるＰ型エミッタ領域およびベース電極引出し領域と前
記Ｎ型高濃度埋込領域を含む前記Ｎ型エピタキシャル層
表面の凹部内に前記Ｐ型エミッタ領域を取囲むように形
成されるＰ型コレクタ領域とから成る横形ＰＮＰトラン
ジスタとを含むことを特徴とする半導体装置。a P-type silicon substrate; an N-type high concentration buried region buried on the P-type silicon substrate; an N-type epitaxial layer formed on the substrate including the N-type high concentration buried region; surrounding the P-type emitter region in a recess on the surface of the N-type epitaxial layer, which includes a P-type emitter region and a base electrode lead-out region formed on the surface of the epitaxial layer at a distance from each other, and the N-type heavily doped buried region; 1. A semiconductor device comprising: a lateral PNP transistor having a P-type collector region formed as shown in FIG.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25205787A JPH0193168A (en) | 1987-10-05 | 1987-10-05 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25205787A JPH0193168A (en) | 1987-10-05 | 1987-10-05 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0193168A true JPH0193168A (en) | 1989-04-12 |
Family
ID=17231963
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25205787A Pending JPH0193168A (en) | 1987-10-05 | 1987-10-05 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0193168A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6151871A (en) * | 1984-08-22 | 1986-03-14 | Hitachi Micro Comput Eng Ltd | Semiconductor device |
-
1987
- 1987-10-05 JP JP25205787A patent/JPH0193168A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6151871A (en) * | 1984-08-22 | 1986-03-14 | Hitachi Micro Comput Eng Ltd | Semiconductor device |
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