JPH0145150Y2 - - Google Patents
Info
- Publication number
- JPH0145150Y2 JPH0145150Y2 JP13386883U JP13386883U JPH0145150Y2 JP H0145150 Y2 JPH0145150 Y2 JP H0145150Y2 JP 13386883 U JP13386883 U JP 13386883U JP 13386883 U JP13386883 U JP 13386883U JP H0145150 Y2 JPH0145150 Y2 JP H0145150Y2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- shock noise
- output
- voltage
- supply voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000035939 shock Effects 0.000 claims description 23
- 239000003990 capacitor Substances 0.000 claims description 17
- 230000002265 prevention Effects 0.000 claims description 12
- 238000001514 detection method Methods 0.000 claims description 5
- 238000007599 discharging Methods 0.000 claims description 3
- 230000005611 electricity Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Landscapes
- Amplifiers (AREA)
Description
【考案の詳細な説明】
(イ) 産業上の利用分野
本考案は、電源を頻繁に切換えたときにシヨツ
ク音が発生するのを防止する為のシヨツク音防止
回路に関する。[Detailed description of the invention] (a) Field of industrial application The present invention relates to a shock noise prevention circuit for preventing the occurrence of shock noise when the power source is frequently switched.
(ロ) 従来技術
第１図に示す如く、低電圧でかつ時定数の小な
る電源（＋VCC）を使用する増幅器が知られてい
る。この増幅器は、入力端子１に印加される入力
信号を、第１及び第２トランジスタ２及び３から
成る差動増幅部４で増幅し、前記第１トランジス
タ２のコレクタに得られる増幅された信号を、前
置駆動トランジスタ５、第１及び第２駆動トラン
ジスタ６及び７、第１及び第２出力トランジスタ
８及び９から成るプツシユプル増幅段１０で増幅
して負荷となるスピーカ１１に印加するものであ
るが、電源の切換時にシヨツク音を発生するとい
う欠点を有している。(b) Prior Art As shown in FIG. 1, an amplifier that uses a power supply (+V CC ) with a low voltage and a small time constant is known. This amplifier amplifies an input signal applied to an input terminal 1 with a differential amplification section 4 consisting of a first and second transistor 2 and 3, and outputs the amplified signal obtained at the collector of the first transistor 2. , a push-pull amplifier stage 10 consisting of a pre-drive transistor 5, first and second drive transistors 6 and 7, and first and second output transistors 8 and 9 amplifies the signal and applies it to a speaker 11 serving as a load. However, it has the disadvantage of generating a shock noise when switching the power supply.
通常の高電圧でかつ時定数の大なる電源を使用
する増幅器においては、電源オン時、及び電源オ
フ時に、電源電圧の上昇あるいは、電源電圧の低
下を検知して、シヨツク音の発生を防止するシヨ
ツク音防止回路が設けられている。しかしなが
ら、第１図の如く、少くとも電源オフ時に短時間
で電源電圧が低下してしまう増幅器においては、
前記従来のシヨツク音防止回路を使用することが
出来ない。 In amplifiers that use normal high-voltage power supplies with large time constants, when the power is turned on and off, an increase in the power supply voltage or a decrease in the power supply voltage is detected to prevent the generation of shock noise. A shock noise prevention circuit is provided. However, as shown in Figure 1, at least in amplifiers where the power supply voltage drops in a short time when the power is turned off,
The conventional shock noise prevention circuit cannot be used.
第１図の増幅器においては、上述の如く、電源
オフ時の従来のシヨツク音防止回路を用いること
が出来ないが、信号系の放電時定数をバランスさ
せ、出力端電位の急激な変化を避けるという方法
を用いることにより、電源オフ時のシヨツク音の
発生防止を計ることが出来る。しかしながら、そ
の様な方法を用いると、電源切換を頻繁に行つた
場合、特に、オフからオンへの切換時に、出力コ
ンデンサ１２の放電時定数が長くなり、残存電荷
に起因する大きなシヨツク音が発生し、聴取者に
不快感を与えるという欠点があつた。 As mentioned above, in the amplifier shown in Figure 1, the conventional shock noise prevention circuit when the power is turned off cannot be used, but the discharge time constant of the signal system is balanced to avoid sudden changes in the output terminal potential. By using this method, it is possible to prevent the occurrence of shock noise when the power is turned off. However, if such a method is used, the discharge time constant of the output capacitor 12 becomes long when the power supply is switched frequently, especially when switching from off to on, and a loud shock noise is generated due to the residual charge. However, it had the disadvantage of causing discomfort to the listener.
(ハ) 考案の目的
本考案は、上述の点に鑑み成されたもので、出
力コンデンサの残存電荷に起因して、電源をオフ
からオンに切換えたときに発生するシヨツク音を
防止せんとするものである。(c) Purpose of the invention The present invention was created in view of the above points, and aims to prevent the shock noise that occurs when the power is switched from OFF to ON due to the residual charge in the output capacitor. It is something.
(ニ) 考案の構成
本考案に係るシヨツク音防止回路は、電源電圧
が所定値以下になつたとき出力信号を発生する電
源電圧検出部と、該検出部の出力信号とデカツプ
リングコンデンサの端子電圧とに応じて出力信号
を発生する信号発生部と、該発生部の出力信号に
応じて増幅器の出力コンデンサの電荷を放電する
放電部とによつて構成される。(d) Structure of the invention The shock noise prevention circuit according to the invention includes a power supply voltage detection section that generates an output signal when the power supply voltage falls below a predetermined value, and an output signal of the detection section and a terminal of a decoupling capacitor. The amplifier includes a signal generating section that generates an output signal according to the voltage, and a discharging section that discharges the charge of the output capacitor of the amplifier according to the output signal of the generating section.
(ホ) 実施例
第２図は、本考案の一実施例を示す回路図で、
１３はダイオード接続された第1PNPトランジス
タ１４と、該第1PNPトランジスタ１４と電流ミ
ラー接続された第2PNPトランジスタ１５と、前
記第1PNPトランジスタ１４のコレクタに接続さ
れたダイオード１６と、該ダイオード１６のカソ
ードに接続された第１抵抗１７と、前記第2PNP
トランジスタ１５のコレクタに接続された第２抵
抗１８とによつて構成される電源電圧検出部、１
９はエミツタが第１図のデカツプリングコンデン
サ２０に相当するコンデンサ２０に、ベースが前
記第2PNPトランジスタ１５のコレクタに接続さ
れた第3PNPトランジスタ２１と、該第3PNPト
ランジスタ２１のコレクタに接続された第３抵抗
２２とによつて構成される信号発生部、２３はベ
ースが前記第3PNPトランジスタ２１のコレクタ
に、コレクタが第４抵抗２４を介して第１図の出
力中点Ａに接続される第1NPNトランジスタ２５
とによつて構成される放電部である。(E) Embodiment Figure 2 is a circuit diagram showing an embodiment of the present invention.
13 is a first PNP transistor 14 connected as a diode, a second PNP transistor 15 connected as a current mirror with the first PNP transistor 14, a diode 16 connected to the collector of the first PNP transistor 14, and a cathode of the diode 16. the connected first resistor 17 and the second PNP
and a second resistor 18 connected to the collector of the transistor 15.
9 has an emitter connected to a capacitor 20 corresponding to the decoupling capacitor 20 in FIG. 1, a third PNP transistor 21 whose base is connected to the collector of the second PNP transistor 15, and a collector of the third PNP transistor 21 A signal generating section 23 includes a third resistor 22 and a signal generating section 23 whose base is connected to the collector of the third PNP transistor 21 and whose collector is connected to the output midpoint A in FIG. 1 via a fourth resistor 24. 1NPN transistor 25
This is a discharge section composed of.
いま、電源端子２６に所定の電源電圧（＋
VCC）が印加されているとすれば、第1PNPトラ
ンジスタ１４のエミツタ・コレクタ略、ダイオー
ド１６、及び第１抵抗１７を介して所定の電流I1
が流れ、第2PNPトランジスタ１５のコレクタ電
流もI1となる。しかして、第3PNPトランジスタ
２１のエミツタ電圧は、デカツプリングコンデン
サ２０の端子電圧（＝＋VCC）となり、ベース電
圧は、I1・R1（＝＋VCC−VEC；ただし、R1は第２
抵抗の抵抗値、VECは第2PNPトランジスタ１５
のエミツタ・コレクタ間電圧）となるから、前記
第3PNPトランジスタ２１のミミツタ・ベース間
電圧は立上り電圧とならず、前記第3PNPトラン
ジスタ２１はオフしている。また、前記第3PNP
トランジスタ２１がオフしている為、第1NPNト
ランジスタ２５もオフしており、シヨツク音防止
回路は増幅器に対して何ら作用しない。 Now, a predetermined power supply voltage (+
V CC ) is applied, a predetermined current I 1 flows through the emitter-collector of the first PNP transistor 14, the diode 16, and the first resistor 17.
flows, and the collector current of the second PNP transistor 15 also becomes I1 . Therefore, the emitter voltage of the third PNP transistor 21 becomes the terminal voltage (=+V CC ) of the decoupling capacitor 20, and the base voltage becomes I 1 ·R 1 (=+V CC −V EC ; however, R 1 is the terminal voltage of the decoupling capacitor 20 (=+V CC ). 2
The resistance value of the resistor, VEC , is the second PNP transistor 15
(emitter-collector voltage), the emitter-base voltage of the third PNP transistor 21 does not become a rising voltage, and the third PNP transistor 21 is off. In addition, the third PNP
Since the transistor 21 is off, the first NPN transistor 25 is also off, and the shock noise prevention circuit has no effect on the amplifier.
時刻t0に電源をオフすると、第３図実線イに示
す如く、電源電圧及びデカツプリングコンデンサ
２０の端子電圧が低下していく。また、第１図の
増幅器の出力中点Ａの電圧も、第３図実線ロに示
す如く、電源電圧の1/2の値を保つて低下してい
く。時刻t1になり電源電圧が所定値迄低下する
と、第2PNPトランジスタ１５がオフとなり、そ
れに応じて第3PNPトランジスタ２１がオンとな
る。そして、前記第3PNPトランジスタ２１がオ
ンとなると、第1NPNトランジスタ２５もオンと
なり、出力コンデンサ１２の電荷が第４抵抗２４
及び前記第1NPNトランジスタ２５のコレクタ・
エミツタ路を通して放電される。その時、前記出
力コンデンサ１２の放電時定数は、前記第４抵抗
２４の値に応じて定まり、前記第４抵抗２４の値
を小にすることにより、前記出力コンデンサ１２
の放電を急速に行うことが出来る。その結果、第
３図実線ロに示す如く、出力中点Ａの電圧は、時
刻t1から急速に零となる。時刻t1以降において
は、電源電圧が十分低下しており、出力中点Ａの
電圧も低下しているので、出力中点Ａの電圧を比
較的急激に低下させてもシヨツク音がほとんど発
生しない。また、第2PNPトランジスタ１５がオ
フとなる時刻t1は、第１図の差動増幅部４のバイ
アスの乱れが発生する直前に設定しておくことに
より、前記差動増幅部４に起因するシヨツク音の
発生を確実に防止出来る。 When the power is turned off at time t 0 , the power supply voltage and the terminal voltage of the decoupling capacitor 20 decrease as shown by the solid line A in FIG. Further, the voltage at the output midpoint A of the amplifier in FIG. 1 also decreases while maintaining the value of 1/2 of the power supply voltage, as shown by the solid line B in FIG. When the power supply voltage drops to a predetermined value at time t1 , the second PNP transistor 15 is turned off, and the third PNP transistor 21 is turned on accordingly. When the third PNP transistor 21 is turned on, the first NPN transistor 25 is also turned on, and the charge on the output capacitor 12 is transferred to the fourth resistor 24.
and the collector of the first NPN transistor 25.
It is discharged through the emitter path. At that time, the discharge time constant of the output capacitor 12 is determined according to the value of the fourth resistor 24, and by reducing the value of the fourth resistor 24, the discharge time constant of the output capacitor 12 is determined according to the value of the fourth resistor 24.
can be rapidly discharged. As a result, as shown by the solid line (b) in FIG. 3, the voltage at the output midpoint A rapidly becomes zero from time t1 . After time t 1 , the power supply voltage has decreased sufficiently and the voltage at output midpoint A has also decreased, so even if the voltage at output midpoint A is reduced relatively rapidly, almost no shock noise will occur. . Furthermore, by setting the time t1 at which the second PNP transistor 15 turns off immediately before the disturbance of the bias in the differential amplifier section 4 shown in FIG. Sound generation can be reliably prevented.
時刻t2に再び電源をオンにすると、第３図実線
イの如く電源電圧は急激に＋VCCに上昇し、デカ
ツプリングコンデンサ２０の端子電圧も、第３図
一点鎖線ハの如く所定の時定数で上昇する。しか
しながら、別途の電源オン時のシヨツク音防止回
路（図示せず）が動作する為、出力中点Ａの電圧
は、所定の時間遅れて立ち上る。そして、前記電
源オン時のシヨツク音防止回路は、常に出力中点
電圧を零から所定値（＋1/2VCC）迄上昇させる
ので、従来のシヨツク音防止回路の如く、所定値
の電圧を一度零迄低下させるという動作を伴なわ
ず、その結果シヨツク音の発生もない。 When the power is turned on again at time t2 , the power supply voltage suddenly rises to +V CC as shown by the solid line A in Figure 3, and the terminal voltage of the decoupling capacitor 20 also rises at a predetermined time as shown by the dashed line C in Figure 3. Rise at a constant rate. However, since a separate shock noise prevention circuit (not shown) operates when the power is turned on, the voltage at the output midpoint A rises after a predetermined time delay. The shock noise prevention circuit when the power is turned on always raises the output midpoint voltage from zero to a predetermined value (+1/2V CC ), so like the conventional shock noise prevention circuit, the voltage at the predetermined value is raised to zero once. This does not involve the operation of lowering the temperature to a certain level, and as a result, no shock noise is generated.
(ヘ) 考案の効果
以上述べた如く、本考案に依れば、所定時間の
経過後速やかに出力コンデンサの電荷を放電させ
ることが出来るので、電源の頻繁なる切換時にも
シヨツク音の発生を防止出来るという利点を有す
る。また、第1PNPトランジスタ１４、ダイオー
ド１６及び第１抵抗１７から成る直列回路のイン
ピーダンスを変更するだけで、第2PNPトランジ
スタ１５がオフする時刻t1を設定出来るので、増
幅器の特性に応じてシヨツク音防止回路の動作を
簡単に変更することが出来るという利点を有す
る。更に、本考案に係るシヨツク音防止回路は、
トランジスタと抵抗とのみによつて作成されてい
るので、増幅器とともに集積化することが出来、
特別な外付部品を必要としないという利点を有す
る。(f) Effects of the invention As described above, according to the invention, the charge in the output capacitor can be discharged quickly after a predetermined time has elapsed, thereby preventing the occurrence of shock noise even when the power supply is frequently switched. It has the advantage of being possible. In addition, the time t1 at which the second PNP transistor 15 turns off can be set by simply changing the impedance of the series circuit consisting of the first PNP transistor 14, the diode 16, and the first resistor 17, so that shock noise can be prevented according to the characteristics of the amplifier. This has the advantage that the operation of the circuit can be easily changed. Furthermore, the shock noise prevention circuit according to the present invention is
Since it is made of only transistors and resistors, it can be integrated with amplifiers.
It has the advantage of not requiring any special external parts.
第１図は、従来の増幅器を示す回路図、第２図
は、本考案の一実施例を示す回路図、及び第３図
は、本考案の説明に供する為の特性図である。
主な図番の説明、１３……電源電圧検出部、１
９……信号発生部、２３……放電部。
FIG. 1 is a circuit diagram showing a conventional amplifier, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a characteristic diagram for explaining the present invention. Explanation of main figure numbers, 13...Power supply voltage detection section, 1
9...Signal generation section, 23...Discharge section.
Claims (1)
つて、電源電圧が所定値以下になつたとき出力信
号を発生する電源電圧検出部と、該電源電圧検出
部の出力信号とデカツプリングコンデンサの端子
電圧とに応じて出力信号を発生する信号発生部
と、該信号発生部の出力信号に応じて増幅器の出
力コンデンサの電荷を放電する放電部とから成
り、電源オフ時に前記出力コンデンサの電荷を急
速に放電してシヨツク音の発生防止を行うシヨツ
ク音防止回路。 This is a shock noise prevention circuit when switching the power supply of an amplifier, and includes a power supply voltage detection section that generates an output signal when the power supply voltage falls below a predetermined value, and an output signal of the power supply voltage detection section and a terminal of a decoupling capacitor. It consists of a signal generating section that generates an output signal according to the voltage, and a discharging section that discharges the charge of the output capacitor of the amplifier according to the output signal of the signal generating section, and quickly discharges the charge of the output capacitor when the power is turned off. A shock noise prevention circuit that prevents shock noise by discharging electricity.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13386883U JPS6040114U (en) | 1983-08-29 | 1983-08-29 | Shock noise prevention circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13386883U JPS6040114U (en) | 1983-08-29 | 1983-08-29 | Shock noise prevention circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6040114U JPS6040114U (en) | 1985-03-20 |
| JPH0145150Y2 true JPH0145150Y2 (en) | 1989-12-27 |
Family
ID=30301823
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13386883U Granted JPS6040114U (en) | 1983-08-29 | 1983-08-29 | Shock noise prevention circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6040114U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006229853A (en) * | 2005-02-21 | 2006-08-31 | Rohm Co Ltd | Signal amplifier circuit and electronic apparatus using the same |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0666592B2 (en) * | 1989-11-30 | 1994-08-24 | 株式会社東芝 | Power amplifier |
-
1983
- 1983-08-29 JP JP13386883U patent/JPS6040114U/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006229853A (en) * | 2005-02-21 | 2006-08-31 | Rohm Co Ltd | Signal amplifier circuit and electronic apparatus using the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6040114U (en) | 1985-03-20 |
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