JPH0143479B2 - - Google Patents
Info
- Publication number
- JPH0143479B2 JPH0143479B2 JP60141948A JP14194885A JPH0143479B2 JP H0143479 B2 JPH0143479 B2 JP H0143479B2 JP 60141948 A JP60141948 A JP 60141948A JP 14194885 A JP14194885 A JP 14194885A JP H0143479 B2 JPH0143479 B2 JP H0143479B2
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- laminated
- board
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000463 material Substances 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 14
- 239000002699 waste material Substances 0.000 claims description 12
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 238000007639 printing Methods 0.000 claims description 6
- 238000005553 drilling Methods 0.000 claims description 2
- 230000007547 defect Effects 0.000 description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 8
- 239000011889 copper foil Substances 0.000 description 8
- 239000000976 ink Substances 0.000 description 8
- 238000004080 punching Methods 0.000 description 8
- 238000007650 screen-printing Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 3
- 238000010030 laminating Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、複層の導電回路や印刷インクの重ね
刷りなどの多層構造によつて表面が凹凸状のプリ
ント配線板に外形加工を施す時、表面の凹凸に伴
い加工時の作用力が局所に集中して、該箇所にク
ラツク等の欠損が生じるといつたことを効果的に
防止できるプリント配線板の製造方法に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention is applicable to processing a printed wiring board whose surface is uneven due to a multilayer structure such as a multilayer conductive circuit or overprinting of printing ink. The present invention relates to a method for manufacturing a printed wiring board that can effectively prevent defects such as cracks from occurring at localized locations due to the concentration of working force during processing due to surface irregularities.
近年、特に導電性ペーストの使用などにより、
絶縁層を介在させて導電回路を２層以上に積層す
るプリント配線板が製作されるに至つている。
In recent years, especially with the use of conductive paste,
2. Description of the Related Art Printed wiring boards in which conductive circuits are laminated in two or more layers with an insulating layer interposed therebetween have come to be manufactured.
しかし、従来のこのような多層構造のプリント
配線板は、製造の過程において、スクリーン印刷
などの手段により複層の導電回路を形成した後、
打ち抜き等の外形加工を施している。このため、
複層の導電回路の形成に伴い表面が凹凸状にな
り、この結果、例えば第８図に示す如き打ち抜き
加工機Ａにより外形加工を行うと、加工時のプレ
ス圧が、他の表面より突出する複層の導電回路の
箇所Ｂに集中して、大きな圧力が加わることにな
り、該箇所Ｂにクラツク等の欠損が生ずることが
あつた。このような不具合は、ルーターやドリル
など他の加工機によつても同様な現象が生じるも
のである。又、上記の如く絶縁層を介在させて２
層以上に積層する場合はもとより、レジストイン
ク上に更にサービス文字や記号、更にはその他の
インクをスクリーン印刷等の手段で幾層にも重ね
刷りをし、この結果該箇所が他の箇所より突出す
る状態になつた時も同様な問題が生じていた。
However, in the manufacturing process of conventional printed wiring boards with multilayer structures, after forming multilayer conductive circuits by means such as screen printing,
External processing such as punching is applied. For this reason,
As a multilayer conductive circuit is formed, the surface becomes uneven, and as a result, when the outer shape is processed using a punching machine A as shown in FIG. 8, the press pressure during processing causes the surface to protrude from other surfaces A large amount of pressure was applied concentratedly to point B of the multilayer conductive circuit, and defects such as cracks were sometimes generated at point B. Similar problems occur with other processing machines such as routers and drills. In addition, as described above, with an insulating layer interposed, 2
In addition to laminating more than one layer, service characters, symbols, and other inks are overprinted in many layers on top of the resist ink using screen printing or other means, resulting in the area being more prominent than other areas. A similar problem occurred when the situation was reached.
しかも、近年、プリント配線板の基材の材質が
改善され、又加工機など周辺技術も改良されるに
至つて、常温で打ち抜き加工ができるようになつ
てきた。即ち、従前の方法は、プリント配線板を
加熱して、柔軟性を持たせるなど加工しやすい性
状に変化させて打ち抜き加工を行い、打ち抜き端
の欠損所謂虫食い現象等の損傷が生じないように
していた。この方法は加熱による基材の収縮等で
寸法精度に狂いが生じやすいなどといつた欠点が
あり、この結果虫食い現象の生じ難い基材の材質
の改善や周辺技術の改良に伴つて常温で打ち抜き
加工が行われるに至つている。しかし、この方法
でも基材、特に基材に形成したレジストインク層
等の積層部にクラツク等の欠損が生じることがあ
つた。このようなクラツク等の欠損が生ずる要因
のひとつとして、基板上に形成した複層の導電回
路やサービス文字等インクの重ね刷りなど多層構
造によつてプリント配線板の表面が凹凸状にな
り、このような表面状態で打ち抜き加工を行うた
め、局所に大きな力が加わつて、クラツク等の欠
損が生じることになつていた。 Moreover, in recent years, the quality of the base material of printed wiring boards has been improved, and peripheral technologies such as processing machines have also been improved, making it possible to perform punching at room temperature. In other words, in the conventional method, the printed wiring board is heated to change its properties to be more easily processed, such as to make it more flexible, and then punched out, thereby preventing damage such as loss of the punched edges and the so-called moth-eaten phenomenon. Ta. This method has the disadvantage that the dimensional accuracy tends to be distorted due to shrinkage of the base material due to heating, etc. As a result, improvements in the quality of the base material that is less likely to cause worm-eaten phenomena and improvements in peripheral technology have led to punching at room temperature. Processing is now underway. However, even with this method, defects such as cracks sometimes occur in the base material, particularly in the laminated portion of the resist ink layer formed on the base material. One of the causes of defects such as cracks is that the surface of the printed wiring board becomes uneven due to the multilayer structure, such as multilayer conductive circuits formed on the board and overprinting of ink such as service letters. Since punching is performed under such surface conditions, a large force is applied locally, resulting in defects such as cracks.
そこで、全製作品数に対する良品数の歩止まり
を向上させることはもとより、加何なる種類、更
には如何なる打ち抜き加工の形式にあつても常時
一定でかつ良質のプリント配線板が製作し得る方
法が望まれていた。 Therefore, it is desirable to have a method that not only improves the yield rate of the number of non-defective products to the total number of products manufactured, but also allows the production of consistently high-quality printed wiring boards regardless of the type or type of punching process. It was rare.
本発明は、上記事情に鑑み、複層の導電回路や
サービス文字等の重ね刷りをして表面が凹凸状に
なる多層構造のプリント配線板を製造する際に、
外形加工によつてクラツク等の欠損の発生を防止
し得て、品質の良好なプリント配線板の製造方法
を提供することを目的とする。 In view of the above-mentioned circumstances, the present invention provides the following features when manufacturing a multilayer printed wiring board with an uneven surface by overprinting multilayer conductive circuits, service characters, etc.
It is an object of the present invention to provide a method for manufacturing a printed wiring board of good quality, which can prevent the occurrence of defects such as cracks through external processing.
本発明は、上記目的を達成するために、複層の
導電回路や印刷インクの重ね刷り等の多層構造に
よつて表面が凹凸状に形成されるプリント配線板
において、基材の所定箇所に絶縁層を介在させて
導電回路を積層し又印刷インクを重ね刷りをする
度毎に、プリント配線板の捨板となるべき部分等
の配線パターン以外の不用な余白箇所にも同時に
同一の層高で積層した後、孔明け等の外形加工を
施すプリント配線板の製造方法を特徴とするもの
である。
In order to achieve the above object, the present invention provides insulation at predetermined locations on a base material in a printed wiring board whose surface is formed into an uneven shape due to a multilayer structure such as a multilayer conductive circuit or overprinting of printing ink. Every time a conductive circuit is laminated with intervening layers and printing ink is overprinted, the same layer height is applied to unnecessary blank areas other than the wiring pattern, such as parts of the printed wiring board that should be scrapped. The present invention is characterized by a method for manufacturing a printed wiring board in which external processing such as drilling is performed after lamination.
以下、本発明に係るプリント配線板の製造方法
の一実施例を図面に基づき説明する。第１図にお
いて、１は銅張り積層板である。配線パターンが
形成された銅張り積層板１の表面に、絶縁層とし
ての第１のアンダーコート５を施した後、第２図
に示す如く、所定の銅箔３による回路間を橋絡す
べく、導電ペーストをスクリーン印刷により第１
のアンダーコート５上に塗布して、第１の導電橋
絡回路層６を形成し、更に第３図に示す如く、第
１の導電橋絡回路層６上にスクリーン印刷により
絶縁層としての第２のアンダーコート７を形成す
る。この時、捨板４や、その他のプリント配線板
の性能を損わない箇所、つまり余白箇所となるべ
き箇所に形成した銅箔３ａ上にも第１のアンダー
コート５ａ及び第１の導電層６ａを本体１ａ側と
同一高さになるように同時に形成する。更に、第
４図に示す如く、該第２のアンダーコート７上
に、上記第１の導電橋絡回路層６と同様に、所定
の銅箔３による回路間を橋絡すべく、第２の導電
橋絡回路層８をスクリーン印刷によつて形成す
る。第２の導電橋絡回路層８上には、第５図に示
す如くオーバーコート９をスクリーン印刷によつ
て施す。この場合、捨板４や、その他のプリント
配線板の性能を損わない箇所上の第１の導電層６
ａ上に第２のアンダーコート７ａ、第２の導電層
８ａ及びオーバーコート９ａを上記の積層と同時
にかつ最高部と同一高さに形成する。捨板４や、
その他のプリント配線板の性能を損わない箇所上
には、本体1a側の最高部と同一の高さになるよ
うに単に同一層質を積層するようにしたが、テス
ト用の回路を形成することも可能である。次に、
第５図に示す如く、打ち抜き機１０にて外形加工
を施す。この時、上金型１１が捨板４上に形成し
た層と、本体１ａの積層された最高部とにプレス
圧が加わり、この結果捨板４や、その他のプリン
ト配線板の性能を損わない箇所の積層箇所に、プ
レス圧が分散することになつて、本体１ａ側の積
層部、特に最も高く積層された箇所には大きな力
が作用して、クラツク等の損傷の発生が防止でき
る。つまり、上記プレス圧が均等に分散できるよ
うに本体１ａに対して捨板４や、その他のプリン
ト配線板の性能を損わない箇所が位置するように
し、これにより本体１ａの積層部の局所に大きな
力が加わらないようにしたものである。この外形
加工にあつては、捨板４となるべき箇所が、後に
容易に分離し除去できるように、ミシン目やＶカ
ツト、更にはスリツトなどの切目も入れられるよ
うになつている。又、その他のプリント配線板の
性能を損わない箇所については、そのまま残存さ
せてよい。
EMBODIMENT OF THE INVENTION Hereinafter, one Example of the manufacturing method of the printed wiring board based on this invention is demonstrated based on drawing. In FIG. 1, 1 is a copper-clad laminate. After applying a first undercoat 5 as an insulating layer to the surface of the copper-clad laminate 1 on which the wiring pattern is formed, as shown in FIG. 2, a predetermined copper foil 3 is used to bridge the circuits. , conductive paste was first printed by screen printing.
A first conductive bridging circuit layer 6 is formed by coating the undercoat 5 on the undercoat 5, and as shown in FIG. 2 undercoat 7 is formed. At this time, the first undercoat 5a and the first conductive layer 6a are also applied on the copper foil 3a formed on the waste board 4 and other areas that do not impair the performance of the printed wiring board, that is, areas that should be blank areas. are formed at the same time so as to have the same height as the main body 1a side. Furthermore, as shown in FIG. 4, a second conductive bridging circuit layer 3 is formed on the second undercoat 7 in order to bridge the circuits using a predetermined copper foil 3, similarly to the first conductive bridging circuit layer 6. The conductive bridging circuit layer 8 is formed by screen printing. On the second conductive bridging circuit layer 8, an overcoat 9 is applied by screen printing as shown in FIG. In this case, the first conductive layer 6 on the waste board 4 and other parts that do not impair the performance of the printed wiring board.
A second undercoat 7a, a second conductive layer 8a, and an overcoat 9a are formed on a at the same time as the above lamination and at the same height as the highest part. Scrapboard 4,
On other parts that do not impair the performance of the printed wiring board, the same layer quality was simply laminated to the same height as the highest part of the main body 1a side, but a test circuit was formed. It is also possible. next,
As shown in FIG. 5, the outer shape is processed using a punching machine 10. At this time, press pressure is applied to the layer formed on the scrap board 4 by the upper mold 11 and the highest laminated part of the main body 1a, resulting in damage to the performance of the scrap board 4 and other printed wiring boards. Since the press pressure is dispersed to the laminated parts where there are no laminated parts, a large force is applied to the laminated parts on the main body 1a side, especially the highest laminated parts, and damage such as cracks can be prevented from occurring. In other words, so that the press pressure can be evenly distributed, the waste board 4 and other parts that do not impair the performance of the printed wiring board are located relative to the main body 1a. This prevents large forces from being applied. In this external shape processing, cuts such as perforations, V-cuts, and even slits are made in the portions that are to become the waste plates 4 so that they can be easily separated and removed later. Further, other parts that do not impair the performance of the printed wiring board may be left as they are.
尚、第５図において、１２は下金型、１３はポ
ンチ、１４はダイである。又、捨板４とは、プリ
ント配線板の製造時、若しくはプリント配線板に
電子部品を実装した後は、不要となつて捨てられ
るものである。 In FIG. 5, 12 is a lower mold, 13 is a punch, and 14 is a die. Further, the waste board 4 is a board that becomes unnecessary and is discarded during the manufacture of the printed wiring board or after electronic components are mounted on the printed wiring board.
又、銅張り積層板１は、レンジ製の基材２に銅
箔３を積層したものである。第６図に示す状態か
ら配線パターンを形成する方法としては、第７図
に示す如く、銅張り積層板にエツチング処理など
を施して予め定めた配線パターンを形成する。こ
の時、捨板４となるべき箇所にも銅箔３の一部３
ａが残こるようにエツチング処理をする。上記基
材２は、近年特に開発され、使用されるに至つて
いる常温で打ち抜き加工できる材質が好適である
が、これに限定されず、各種のものの使用が可能
である。又上記基材２に対する銅箔３の積層方法
及び配線パターンの形成方法は、如何なる形式で
あつても可能である。 Further, the copper-clad laminate 1 is made by laminating a copper foil 3 on a base material 2 made of microwave oven. As a method for forming a wiring pattern from the state shown in FIG. 6, as shown in FIG. 7, a predetermined wiring pattern is formed by etching or the like on a copper-clad laminate. At this time, a part of the copper foil 3 is also placed in the place where the scrap board 4 should be.
Etching is performed so that a remains. The base material 2 is preferably made of a material that can be punched out at room temperature, which has been particularly developed and used in recent years, but the material is not limited thereto, and various materials can be used. Further, the method of laminating the copper foil 3 on the base material 2 and the method of forming the wiring pattern may be in any format.
上記方法は、積層の導電橋絡回路層を形成する
場合の他、スクリーン印刷などによつて抵抗等の
電子部品を加工時のプレス圧で損傷することを防
止する際にも効果を発揮できる。又、積層数も上
記実施例に限定されるものではなく、適宜選択で
きるものであり、しかも捨板４等に積層する層質
も、本体１ａ側と同質にする必要がなく、本体１
ａの層質と異質のもので積層することも可能であ
る。 The above method is effective not only when forming a laminated conductive bridging circuit layer but also when preventing electronic components such as resistors from being damaged by press pressure during processing by screen printing or the like. Further, the number of laminated layers is not limited to the above embodiments, and can be selected as appropriate. Furthermore, the quality of the layers laminated on the waste board 4 etc. does not have to be the same as that on the main body 1a side, and the material on the main body 1
It is also possible to laminate layers with a layer quality different from that of a.
以上の如く、本発明に係るプリント配線板の製
造方法によれば、複層の導電回路や印刷インクの
重ね刷りの多層構造に形成した後、外形加工に施
す際に、捨板等配線パターン以外の余白箇所に形
成した積層部分でプレス圧を受けて、他の多層構
造の部分に加わる力が分散することになつて、該
箇所には大きな力が加わるといつたことがなく、
これにより該箇所にクラツク等の欠損が生じ、又
基板の表面の凹凸によつて、プレス圧がプレス方
向のみならず、その他の方向にも分力としての作
用力が生じて、基板等にクラツク等の欠損が生じ
るといつたことを効果的に防止して品質の向上を
図ることができ、しかも加工機も金型にプリント
配線板の突出部を逃げるための凹部を形成すると
いつた加工を必要とせず、極めて便利である。
As described above, according to the method for manufacturing a printed wiring board according to the present invention, after forming a multilayer structure of multilayer conductive circuits and overprinting of printing ink, when performing external processing, other than the wiring pattern such as a scrap board, etc. It has never been said that the laminated portion formed in the blank area of the sheet receives press pressure, and the force applied to other parts of the multilayer structure is dispersed, causing a large force to be applied to that area.
This causes defects such as cracks at the location, and due to the unevenness of the surface of the substrate, the press pressure acts not only in the pressing direction but also in other directions, causing cracks in the substrate, etc. It is possible to improve the quality by effectively preventing the occurrence of defects such as defects, etc. Moreover, the processing machine can also perform such processing by forming a recess in the mold to allow the protrusion of the printed wiring board to escape. It is not necessary and is extremely convenient.
第１図乃至第５図は本発明に係るプリント配線
板の製造方法の実施例を示す説明図、第６図及び
第７図は、銅張り積層板に配線パターンを形成す
る一例を示す説明図、第８図は従来の外形加工の
状態を示す説明図である。
１…銅張り積層板、１ａ…本体、２…基材、３
…銅箔、３ａ…捨板上の銅箔、４…捨板、５…第
１のアンダーコート、５ａ…捨板上の第１のアン
ダーコート、６…第１の導電橋絡回路層、６ａ…
第１の導電層、７…第２のアンダーコート、７ａ
…捨板上の第２のアンダーコート、８…第２の導
電橋絡回路層、８ａ…第２の導電層、９…オーバ
ーコート、９ａ…捨板上のオーバーコート、１０
…打ち抜き機、１１…上金型、１２…下金型、１
３…ポンチ、１４…ダイ。
FIGS. 1 to 5 are explanatory views showing an example of the method for manufacturing a printed wiring board according to the present invention, and FIGS. 6 and 7 are explanatory views showing an example of forming a wiring pattern on a copper-clad laminate. , FIG. 8 is an explanatory diagram showing the state of conventional external shape processing. 1... Copper-clad laminate, 1a... Main body, 2... Base material, 3
...Copper foil, 3a...Copper foil on the waste board, 4...The waste board, 5...First undercoat, 5a...First undercoat on the waste board, 6...First conductive bridging circuit layer, 6a …
First conductive layer, 7...Second undercoat, 7a
...Second undercoat on the waste board, 8...Second conductive bridging circuit layer, 8a...Second conductive layer, 9...Overcoat, 9a...Overcoat on the waste board, 10
... punching machine, 11 ... upper mold, 12 ... lower mold, 1
3...Punch, 14...Die.
Claims (1)
多層構造によつて表面が凹凸状に形成されるプリ
ント配線板において、基材の所定箇所に絶縁層を
介在させて導電回路を積層し又印刷インクの重ね
刷りをする度毎に、プリント配線板の捨板となる
べき部分等の配線パターン以外の不用な余白箇所
にも同時に同一の層高で積層した後、孔明け等の
外形加工を施すことを特徴とするプリント配線板
の製造方法。1. In a printed wiring board whose surface is formed into an uneven shape due to a multilayer structure such as a multilayer conductive circuit or overprinting of printing ink, the conductive circuit is laminated with an insulating layer interposed at a predetermined location on the base material. Each time printing ink is overprinted, it is simultaneously laminated at the same layer height on unnecessary blank areas other than the wiring pattern, such as parts of the printed wiring board that should become waste boards, and then external processing such as drilling is performed. A method for manufacturing a printed wiring board, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14194885A JPS622695A (en) | 1985-06-28 | 1985-06-28 | Manufacture of printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14194885A JPS622695A (en) | 1985-06-28 | 1985-06-28 | Manufacture of printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS622695A JPS622695A (en) | 1987-01-08 |
| JPH0143479B2 true JPH0143479B2 (en) | 1989-09-20 |
Family
ID=15303857
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14194885A Granted JPS622695A (en) | 1985-06-28 | 1985-06-28 | Manufacture of printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS622695A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6012793A (en) * | 1983-07-01 | 1985-01-23 | 株式会社東芝 | Method of producing ceramic multilayer wiring board |
-
1985
- 1985-06-28 JP JP14194885A patent/JPS622695A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6012793A (en) * | 1983-07-01 | 1985-01-23 | 株式会社東芝 | Method of producing ceramic multilayer wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS622695A (en) | 1987-01-08 |
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