JPH01307443A - Plasma treating device - Google Patents

Plasma treating device

Info

Publication number
JPH01307443A
JPH01307443A JP13792888A JP13792888A JPH01307443A JP H01307443 A JPH01307443 A JP H01307443A JP 13792888 A JP13792888 A JP 13792888A JP 13792888 A JP13792888 A JP 13792888A JP H01307443 A JPH01307443 A JP H01307443A
Authority
JP
Japan
Prior art keywords
plasma
substrate
gas
installation plate
reaction chamber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13792888A
Other languages
Japanese (ja)
Inventor
Kimihiro Matsuse
公裕 松瀬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP13792888A priority Critical patent/JPH01307443A/en
Publication of JPH01307443A publication Critical patent/JPH01307443A/en
Pending legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
  • Physical Or Chemical Processes And Apparatus (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

PURPOSE:To easily convert a processing gas to plasma by bringing a substrate to be treated into contact with one electrode, and forming the electrode provided with the substrate from a heat-resistant good conductor. CONSTITUTION:The gas between the electrodes 3 and 17 is converted to plasma, and a substrate 2 (e.g., semiconductor wafer) is treated. In this case, the substrate 2 is brought into contact with the electrodes 3, and the electrode 3 provided with the substrate 2 is formed from a heat-resistant good conductor (e.g., graphite). As a result, the processing gas can be easily converted to plasma, the case when treatment is carried out while heating can be coped with, and the versatility is improved.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) この発明は、プラズマ処理装置に関する。[Detailed description of the invention] [Purpose of the invention] (Industrial application field) The present invention relates to a plasma processing apparatus.

(従来の技術) 近年、超LSI等集積回路の高集積化・高速化高密度化
に伴い、ゲート電極やコンタクト・ホールやスルー・ホ
ール等の形成の為に、多結晶Siに比べ抵抗が1桁以上
低いW(タングステン)等の高融点金属の金属薄膜を堆
積させる技術が重要となってきている。
(Prior art) In recent years, with the increasing integration, speed, and density of integrated circuits such as VLSIs, it has become necessary to use silicon with a resistance of 1 A technique for depositing a metal thin film of a metal with a high melting point such as W (tungsten), which has an order of magnitude lower melting point, is becoming important.

上記のような金属薄膜を形成する手段としては、膜成長
用ガスを被処理基板の被処理面上に成長させるメタルC
VD装置で金属薄膜を形成している。
As a means for forming the metal thin film as described above, metal C is used to grow a film growth gas on the processing surface of the processing target substrate.
A metal thin film is formed using a VD device.

又、最近では、膜厚をより均一に形成するために、被処
理基板を石英板に固定し、石英板側から赤外光等の加熱
光を照射することにより被処理基板を加熱して、この加
熱した状態でCVD処理を行なうものがある。
Recently, in order to form a more uniform film thickness, the substrate to be processed is fixed to a quartz plate and heated by irradiating heating light such as infrared light from the quartz plate side. Some devices perform CVD treatment in this heated state.

ここで、上記のようなCVD装置による金属薄膜を形成
する場合、このCVD処理をする前工程装置から被処理
基板例えば半導体ウェハをCVD装置に移送する時に、
半導体ウェハの表面に自然酸化膜が例えば数十人程度形
成されてしまい、この酸化膜上に金属′sWAを形成し
たとしても、半導・  体ウェハ表面と金属の間の電気
的接触抵抗が高くなり1.より品質を向上させるために
は、成膜容器内で、まず上記ivA酸化膜をプラズマエ
ツチングし、その後CVD処理を行ないたいという要求
が高まってきている。
Here, when forming a metal thin film using the above-mentioned CVD apparatus, when the substrate to be processed, such as a semiconductor wafer, is transferred from the pre-processing equipment that performs this CVD treatment to the CVD apparatus,
A natural oxide film is formed on the surface of a semiconductor wafer, for example, on the order of several dozen layers, and even if a metal wafer is formed on this oxide film, the electrical contact resistance between the semiconductor wafer surface and the metal is high. Nari 1. In order to further improve quality, there is an increasing demand to first plasma-etch the ivA oxide film in a film-forming container and then perform CVD treatment.

(発明が解決しようとする課題) しかしながら、同一容器内で、プラズマエッチング、お
よびCVD処理を行なう場合、被処理基板例えば半導体
ウェハを設置する設置板は、エツチングするためにプラ
ズマ発生電極を兼ねて電気良導体とする必要があり、又
、CVD処理のため、高温加熱に耐えろる耐熱性とする
必要がある。ここで、従来のプラズマエツチング装置の
ウェハ設置電極は、例えば特開昭61−174632号
、特開昭61−171128号公報等に開示されている
ように、アルミニウム製等で形成されているため、電気
良導体ではあるが、耐熱性の点で不足している。このた
めウェハ設置電極を加熱すると、設置電極に歪み等が発
生し、このことから設置電極に設置されたウェハに均一
に熱を伝導することが困難となり、このことによりCV
D処理において、所望する薄膜を均一に堆積することが
出来ないという問題点があった。
(Problem to be Solved by the Invention) However, when plasma etching and CVD processing are performed in the same container, the installation plate on which the substrate to be processed, such as a semiconductor wafer, is placed also serves as a plasma generation electrode for etching. It needs to be a good conductor, and it needs to be heat resistant enough to withstand high temperature heating due to CVD processing. Here, the wafer installation electrode of the conventional plasma etching apparatus is made of aluminum or the like, as disclosed in, for example, Japanese Patent Laid-Open No. 61-174632, Japanese Patent Laid-Open No. 61-171128, etc. Although it is a good electrical conductor, it lacks heat resistance. For this reason, when the wafer-installed electrode is heated, distortion etc. occur in the installed electrode, which makes it difficult to uniformly conduct heat to the wafer placed on the installed electrode, which causes CV
In the D process, there was a problem in that a desired thin film could not be deposited uniformly.

この発明は上記点に対処してなされたもので、処理ガス
のプラズマ化を容易にし、かつ他の加熱しながら処理を
実行する場合にも対応可能とする汎用性の高いプラズマ
処理装置を提供するものである。
The present invention has been made in view of the above-mentioned problems, and provides a highly versatile plasma processing apparatus that facilitates plasma processing of processing gas and is also applicable to other cases where processing is performed while heating. It is something.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) この発明は、電極間のガスをプラズマ化し処理する装置
において、上記一方の電極に接して被処理基板を設け、
この被処理基板を設けた電極を耐熱性電気良導体で構成
したことを特徴とする。
(Means for Solving the Problems) The present invention provides an apparatus for processing gas between electrodes by turning it into plasma, providing a substrate to be processed in contact with one of the electrodes,
The present invention is characterized in that the electrode provided with the substrate to be processed is made of a heat-resistant electrically conductive material.

(作用効果) 一方の電極に接して被処理基板を設け、この被処理基板
を設けた電極を耐熱性電気良導体で構成したことにより
、処理ガスのプラズマ化を容易に行なえ、かつ、他の加
熱しながら処理を実行する場合にも対応可能とし、汎用
性が向上する効果が得られる。
(Function and effect) By providing a substrate to be processed in contact with one of the electrodes and configuring the electrode with the substrate to be processed from a heat-resistant electrically conductive material, it is possible to easily convert the processing gas into plasma, and to use other heating methods. This also makes it possible to handle cases where processing is executed simultaneously, resulting in an effect of improved versatility.

(実施例) 次に、本発明装置を半導体製造工程の板葉処理による薄
膜形成工程で、自然酸化膜をプラズマエツチング処理し
た後高融点金属の薄膜形成に適用した一実施例につき図
面を参照して説明する。
(Example) Next, reference will be made to the drawings for an example in which the apparatus of the present invention is applied to forming a thin film of a high melting point metal after plasma etching a natural oxide film in a thin film forming process using plate processing in a semiconductor manufacturing process. I will explain.

この装置は、第1図に示すように、冷却水等で壁面を冷
却可能で気密な円筒状AQ(アルミニウム)製反応チャ
ンバ(1)が電気的に接地して設けられている。この反
応チャンバ■上方に、被処理基板例えば被処理面である
SiとSin、のパターン構造をもつ半導体ウェハ■を
、被処理面が下向きになる如く設置可能で、後に説明す
る加熱光により急加熱(ラピッドサーマル)可能で、な
おかつ、プラズマ発生用として電気良導体の材質例えば
グラファイト製の設置板■が設けられている。この設置
板■は、第2図に示すように加熱を促進し、プラズマ電
極を兼ねるため略円環形状となるように半導体ウェハ■
の形状より、やや小さめな切欠き部(へ)が設けられて
いて、ウェハ■の設置時は、ウェハ■の周縁とグラファ
イト製の設置板■とが接触するようになっている。又、
超微細技術に対応して、グラファイト製の設置板■には
、抵抗例えば数Ω口から数1000C11の材質例えば
シリコンカーバイトがコーティングされていて、グラフ
ァイトからの塵等の発生が防止されている。さらに、設
置板■の上方には、設置板■の外周縁部に接して支持す
る導電性例えばAQ製で円筒状の支持体0が、上記反応
チャンバ■とリング状絶縁部材0を介して設けられてい
る。そして、上記支持体0は、プラズマ励起周波数例え
ば13.56MHzのRF電源■に電気的に接続され、
上記支持体■に接続された設置板■が、プラズマ発生電
極となる。一方反応チャンバ■は接地電位に設定されて
いる。
As shown in FIG. 1, this device includes an airtight cylindrical AQ (aluminum) reaction chamber (1) whose wall surface can be cooled with cooling water or the like and is electrically grounded. Above this reaction chamber ■, a substrate to be processed, such as a semiconductor wafer ■ having a patterned structure of Si and Sin, can be placed so that the surface to be processed faces downward, and is rapidly heated by heating light, which will be explained later. (Rapid thermal) is possible, and an installation plate (2) made of a material with good electrical conductivity, such as graphite, is provided for plasma generation. As shown in Figure 2, this installation plate (2) promotes heating and also serves as a plasma electrode, so the semiconductor wafer (2) is placed in a substantially circular shape.
A notch is provided that is slightly smaller than the shape of the wafer (2), so that when the wafer (2) is installed, the periphery of the wafer (2) comes into contact with the graphite installation plate (2). or,
Corresponding to ultra-fine technology, the graphite installation plate (1) is coated with a resistor of several ohms to several thousand C11, such as silicon carbide, to prevent the generation of dust from the graphite. Further, above the installation plate (2), a cylindrical conductive support body 0 made of AQ, for example, which is supported in contact with the outer peripheral edge of the installation plate (2) is provided via the reaction chamber (2) and the ring-shaped insulating member 0. It is being The support body 0 is electrically connected to an RF power source (■) with a plasma excitation frequency of, for example, 13.56 MHz,
The installation plate (2) connected to the support (2) serves as a plasma generation electrode. On the other hand, reaction chamber (2) is set at ground potential.

そして、上記設置板■近傍には、例えば半導体ウェハ■
の外縁を用いて設置板■に半導体ウェハ■を固定する如
く、例えばエアシリンダ等の昇降機構(ハ)を備えた支
持体0が設けられている。また、設置板■の上方には石
英ガラス製の窓(10)を通して設置板■に設けられた
ウェハ■を例えば300℃〜tooo℃に加熱可能なI
Rランプ(infrared raylamp) (1
1)が設けられている。そして、設置板0近辺の反応チ
ャンバ■上壁には、排気例えば2ケ所の排気口(12)
が設けられ、この排気口(12)には、反応チャンバω
内を所望の圧力に減圧及び反応ガス等を排出可能な真空
ポンプ(13)例えばターボ分子ポンプ等が接続されて
いる。
For example, a semiconductor wafer ■ is placed near the installation plate ■.
A support body 0 equipped with a lifting mechanism (c) such as an air cylinder is provided so as to fix the semiconductor wafer (2) to the installation plate (2) using the outer edge of the support body (3). In addition, above the installation plate ■, there is an I/O device that can heat the wafer ■ provided on the installation plate ■ to, for example, 300°C to tooo°C through a window (10) made of quartz glass.
R lamp (infrared raylamp) (1
1) is provided. There are two exhaust ports (12) on the upper wall of the reaction chamber near installation plate 0.
is provided, and this exhaust port (12) is provided with a reaction chamber ω
A vacuum pump (13), such as a turbo-molecular pump, is connected to the chamber to reduce the internal pressure to a desired pressure and discharge reaction gas and the like.

また、反応チャンバ■の下方には、膜成長用ガスやキャ
リアガスやエツチングガス等を流出する多数の微少な流
出口をもつ円環状のガス導入口(14)が2系統独立し
て設けられている。これらガス導入口(14)は流量制
御機構(15)例えばマス・フロー・コントローラ等を
介してガス供給源に接続されている。また、設置板■と
ガス導入口(14)の間には、ガスの流れを制御するた
めの例えばステッピングモータ等の直線移動による移動
機構(16)を備えた円板状制御板(17)が設けられ
ている。
Further, below the reaction chamber (2), two systems of annular gas inlet ports (14) having a large number of minute outlet ports for flowing out film growth gas, carrier gas, etching gas, etc. are provided independently. There is. These gas inlets (14) are connected to a gas supply source via a flow rate control mechanism (15) such as a mass flow controller. Further, between the installation plate (1) and the gas inlet (14), there is a disc-shaped control plate (17) equipped with a linear movement mechanism (16) such as a stepping motor for controlling the flow of gas. It is provided.

そして1反応チャンバα)の−側面には自動開閉例えば
昇降機構により開閉可能なゲートバルブ(18)を介し
て、半導体ウェハ■を反応チャンバ(1)内に搬入及び
搬出するため、伸縮回転自在にウェハ■を保持搬送する
ハンドアーム(19)と、ウェハ■を例えば25枚程度
所定の間隔を設けて積載収納したカセット(20)を載
置して昇降可能な載置台(21)を内蔵した気密な搬送
予備室(22)が配設しである。
A gate valve (18), which can be opened and closed automatically by an elevating mechanism, is provided on the side of one reaction chamber (α) so that it can be expanded and rotated in order to carry the semiconductor wafer (1) into and out of the reaction chamber (1). An airtight device with a built-in hand arm (19) for holding and transporting wafers ■, and a mounting table (21) that can be raised and lowered to hold cassettes (20) loaded with, for example, 25 wafers ■ at predetermined intervals. A preliminary transport chamber (22) is provided.

また、上記構成の膜形成を行なうプラズマ処理装置は制
御部(23)でプラズマ処理動作制御される・次に、上
述したプラズマ処理装置による半導体ウェハ■への成膜
方法を第3図に示すフロー図に従って説明する。
Further, the plasma processing operation of the plasma processing apparatus for forming a film having the above configuration is controlled by a control section (23).Next, the method for forming a film on a semiconductor wafer (2) using the above-mentioned plasma processing apparatus is shown in the flowchart shown in FIG. This will be explained according to the diagram.

予備室(22)の図示しない開閉口よりロボットハンド
又は人手により、例えば被処理半導体ウェハ■が25枚
程度収納されたカセット(2o)を、昇降可能な載置台
(21)上に載置する(A)、この時、ゲートバルブ(
18)は閉じた状態で、反応チャンバω内は既に、真空
ポンプ(13)の働きで所望の低圧状態となる様に減圧
操作されている。そして、カセット(20)をセットし
た後、搬送予備室(22)の図示しない開閉口は気密と
なる如く自動的に閉じられ。
A cassette (2o) containing, for example, about 25 semiconductor wafers (2) to be processed is placed on the lifting table (21) through an opening/closing opening (not shown) of the preliminary chamber (22) using a robot hand or a human hand. A) At this time, the gate valve (
18) is in a closed state, and the inside of the reaction chamber ω has already been depressurized to a desired low pressure state by the action of the vacuum pump (13). After setting the cassette (20), the opening/closing opening (not shown) of the transport preliminary chamber (22) is automatically closed to be airtight.

図示しない真空ポンプで反応チャンバ0)と同程度に減
圧される(B)0次に、ゲートバルブ(18)が開かれ
(C)、所望の低圧状態を保持した状態で載置台(21
)の高さを調整することにより、半導体ウェハ■を伸縮
自在なハンドアーム(19)で、カセット(20)から
所望の1枚を取り出し、反応チャンバω内に搬入する(
D)。この時、支持体■は昇降機構(へ)により下降し
、ウェハ■を被処理面を下向きに支持体■)上に設置す
る。そして、昇降機構(へ)で支持体0を上昇し、ウェ
ハ〇の周縁部を設置板(■と支持体0で挟持し固定設定
する(E)、この半、導体ウェハ■を設置板■への設定
が終了すると、ハンドアーム(19)を搬送予備室(2
2)内に収納し、ゲートバルブ(18)を閉じる(F)
The pressure is reduced to the same level as the reaction chamber 0) by a vacuum pump (not shown) (B). Next, the gate valve (18) is opened (C), and the mounting table (21) is maintained at the desired low pressure state.
By adjusting the height of ), a desired semiconductor wafer (■) is taken out from the cassette (20) using the telescopic hand arm (19) and carried into the reaction chamber (ω).
D). At this time, the support (2) is lowered by the lifting mechanism (2), and the wafer (2) is placed on the support (2) with the surface to be processed facing downward. Then, use the lifting mechanism (to) to raise the support 0, and fix the periphery of the wafer 〇 by holding it between the installation plate (■) and the support 0 (E), and move this half of the conductor wafer ■ to the installation plate ■. After completing the settings, move the hand arm (19) to the transfer chamber (2).
2) Store it inside and close the gate valve (18) (F)
.

次に半導体ウェハ■被処理面への処理を開始する。Next, processing of the semiconductor wafer's surface to be processed is started.

″まず、半導体ウェハ■の表面に形成された自然酸化膜
をエツチングして除去するクリーニング処理を実行する
(G)。
``First, a cleaning process is performed to etch and remove the natural oxide film formed on the surface of the semiconductor wafer (G).

この処理は、反応チャンバ(ト)内を所望の低圧状態例
えば数十〜数百mTorrに保つように真空ポンプ(1
3)で排気制御しながら、ガス導入口(14)を開いて
、流量調整機構(15)で流量を調節しながら処理ガス
例えばArガスを均一に拡散して上記ウェハ■上に供給
する。そして、グラファイト製の設置板(3)に接続さ
れている導電性の支持体■とチャンバ■壁間にRF電源
■がら電力例えば400 (W)を印加する。すると、
上記導電体の支持体■に接続しているグラファイト製設
置板■に電力が印加され、反応チャンバ■が接地電極の
ため、上記設置板■との間に放電がおこり、半導体ウェ
ハ■上に供給された処理ガスがプラズマ化され、このプ
ラズマ化されたガスにより上記ウェハ■上に形成された
自然酸化膜を例えば100人/win程度でエツチング
する。この時、上記電力の印加により、支持体■が高温
となるため、図示しない冷却機構により支持体■を例え
ば20℃程度に冷却制御しておく。
In this process, a vacuum pump (1
While controlling the exhaust in step 3), the gas inlet port (14) is opened, and the flow rate is adjusted by the flow rate adjustment mechanism (15) to uniformly diffuse a processing gas, such as Ar gas, and supply it onto the wafer (2). Then, a power of 400 (W), for example, is applied from an RF power source (2) between the conductive support (2) connected to the graphite installation plate (3) and the wall (2) of the chamber. Then,
Electric power is applied to the graphite installation plate (■) connected to the conductive support (■), and since the reaction chamber (■) is the ground electrode, a discharge occurs between it and the above-mentioned installation plate (■) and is supplied onto the semiconductor wafer (■). The processed gas is turned into plasma, and the natural oxide film formed on the wafer (1) is etched by the plasma-turned gas at a rate of, for example, about 100 people/win. At this time, the support (2) becomes high in temperature due to the application of the electric power, so the support (2) is controlled to be cooled to, for example, about 20° C. by a cooling mechanism (not shown).

上記のようなプラズマエツチング処理を終了後、半導体
ウェハ■の被処理面に化学的気相成長法により金属薄膜
を形成する(H)。
After completing the plasma etching process as described above, a metal thin film is formed on the surface of the semiconductor wafer (1) to be processed by chemical vapor deposition (H).

この処理は、反応チャンバω内を所望の低圧状態例え、
ば100〜200mmTorrに保つ如く真空ポンプ(
13)で排気制御しながら、IRランプ(11)から加
熱光である赤外光を耐熱性のグラファイト製の設でいる
半導体ウェハ■が急加熱される。
This process sets the inside of the reaction chamber ω to a desired low pressure state,
A vacuum pump (
The semiconductor wafer (1), which is made of heat-resistant graphite, is rapidly heated with infrared heating light from the IR lamp (11) while controlling the exhaust in step 13).

この時、半導体ウェハ■の被処理面の温度を工Rランプ
■で例えば40〜530℃程度となる如くウェハ■から
放射される赤外線をパイロメーターを用いて制御するか
、高感度熱電対を用いてウェハ■の温度を直接検知して
制御する。そして、ガス導入口(14)を開いて、流量
制御機構(15)で反応ガスを構成する膜成長用ガス例
えばWF、とキャリアガス例えばH2及びArを流出し
、化学的な気相成長を行なう、この処理に際し、支持体
■のウェハ■当接面は熱伝導率の低いセラミック等で構
成すると、ウェハ■の熱分布が一様となり、処理ムラが
防止できる。
At this time, the temperature of the surface to be processed of the semiconductor wafer (2) is controlled using a pyrometer to control the infrared rays emitted from the wafer (2) to a temperature of, for example, 40 to 530 degrees Celsius using an R lamp (2), or a high-sensitivity thermocouple (2) is used. directly detects and controls the temperature of the wafer. Then, the gas inlet (14) is opened, and a film growth gas such as WF, which constitutes a reaction gas, and a carrier gas such as H2 and Ar, which constitute a reaction gas, flow out using a flow rate control mechanism (15) to perform chemical vapor phase growth. During this process, if the wafer (2) contacting surface of the support (2) is made of ceramic or the like with low thermal conductivity, the heat distribution on the wafer (2) will be uniform and uneven processing can be prevented.

上記のように化学的な気相成長を行なうと、半導体ウェ
ハ■の被処理面等に形成されたホール等に金属例えばW
(タングステン)の膜を選択的に堆積することができる
When chemical vapor phase growth is performed as described above, metal such as W
(Tungsten) film can be selectively deposited.

そして、所望の膜形成が終了すると、反応ガスの流出が
止められ、昇降機構(eで支持体(へ)がウェハ■を支
持した状態で降下し、ゲートバルブ(18)が開かれ(
I)、伸縮回転自在なハンドアーム(19)により半導
体ウェハ■を反応チャンバ■より搬出する(J)ととも
にゲートバルブ(18)を閉じて(K)処理が完了する
。この処理が完了後、カセット(20)内に未処理ウェ
ハが無いか確認しくL)、未処理ウェハがある場合再び
上記のエツチング処理および化学的気相成長処理を実行
し1.未処理ウェハがない場合、終了する。
When the desired film formation is completed, the outflow of the reaction gas is stopped, the support body (to) descends with the lifting mechanism (e) supporting the wafer (2), and the gate valve (18) is opened (
I) The semiconductor wafer (1) is carried out from the reaction chamber (1) by the extendable and rotatable hand arm (19) (J), and the gate valve (18) is closed (K) to complete the process. After this process is completed, check whether there are any unprocessed wafers in the cassette (20). If there are any unprocessed wafers, perform the above etching process and chemical vapor deposition process again.1. If there are no unprocessed wafers, the process ends.

又、上記のように被処理基板例えば半導体ウェハ■の被
処理面に、化学的気相成長法により薄膜例えばW(タン
グステン)膜を成膜する際、密閉容器を構成する反応チ
ャンバ(υの壁表面に極わずかではあるがW膜が付着し
堆積してしまうことがある。この反応チャンバ■の壁表
面に付着堆積したW膜をプラズマエツチングによりセル
フクリーニングすることも可能である。次に、このセル
フクリーニング処理について説明する。
Furthermore, when forming a thin film such as a W (tungsten) film by chemical vapor deposition on the surface of a substrate to be processed, such as a semiconductor wafer (2), as described above, the wall of the reaction chamber (υ) constituting a closed container is A very small amount of W film may adhere and accumulate on the surface.It is also possible to self-clean the W film that has adhered and deposited on the wall surface of the reaction chamber (2) by plasma etching.Next, this Self-cleaning processing will be explained.

設置板■に被処理基板例えば半導体ウェハ■を設置しな
い状態で1反応チャンバω内を所望の低圧状態例えば数
十〜数百1mTOrrに保つように真空ポンプ(13)
で排気制御を行なう、この排気状態でガス導入口(14
)を開いて、流量調節器(15)で流量を調節しながら
処理ガス例えばNF3 を反応チャンバ■内に供給する
。そして、設置板■に接続している導電体の支持体0に
RF電源■から電力例えば400 (W)を印加する。
A vacuum pump (13) is used to maintain the inside of one reaction chamber ω at a desired low pressure, for example, several tens to several hundred mTorr, without placing a substrate to be processed, such as a semiconductor wafer (■), on the installation plate (■).
Exhaust control is performed at the gas inlet (14) in this exhaust state.
) is opened and a processing gas such as NF3 is supplied into the reaction chamber (1) while adjusting the flow rate with a flow rate regulator (15). Then, power of 400 (W), for example, is applied from the RF power source (2) to the conductor support 0 connected to the installation plate (2).

このことにより、上記導電体の支持体0に接続している
グラファイト製の設置板■に電力が印加され、反応チャ
ンバ■が接地電極のため、上記設置板■との間に放電が
おこり、反応チャンバ■内に供給された処理ガスである
NF3 がプラズマ化され、このプラズマ化されたガス
により、反応チャンバ(ト)の壁表面に付着し堆積した
W膜を例えば2000〜3000人、/+inプラズマ
エツチングする。
As a result, electric power is applied to the graphite installation plate (■) connected to the support 0 of the conductor, and since the reaction chamber (■) is the ground electrode, an electric discharge occurs between it and the installation plate (■), causing a reaction. The processing gas NF3 supplied into the chamber (2) is turned into plasma, and this plasma gas causes the W film deposited on the wall surface of the reaction chamber (G) to be heated by, for example, 2,000 to 3,000 people, /+in plasma. Etching.

上記のようなプラズマエツチングによる反応チャンバの
セルフクリーニング処理は1反応チャンバにW膜がある
程度堆積した毎に行なう。例えば予め所定数の被処理基
板のCVD処理を実行した毎に行なうように設定してお
く。又、CVD処理のガスの種類により反応チャンバの
壁表面に堆積する量が異なるので適宜セルフクリーニン
グのタイミングを選択的に決定して良いことは言うまで
もない。
The self-cleaning process of the reaction chamber by plasma etching as described above is performed every time a certain amount of W film is deposited in one reaction chamber. For example, it is set in advance to be performed every time a predetermined number of substrates are subjected to CVD processing. Furthermore, since the amount deposited on the wall surface of the reaction chamber varies depending on the type of gas used in the CVD process, it goes without saying that the self-cleaning timing may be selectively determined as appropriate.

上記のようにセルフクリーニングを所定毎に実行するこ
とにより、反応チャンバ内をいつも清浄な状態とするこ
とができ1反応チャンバに付着堆積したW膜等が塵とな
り、CVD処理に悪影響を与えることを防止できる。
By performing self-cleaning at predetermined intervals as described above, the interior of the reaction chamber can be kept clean at all times. It can be prevented.

上述したように、被処理基板例えば半導体ウェハを設置
する設置板を、耐熱性で電気良心体で構成したものを使
用することにより、洗浄のためのエツチング処理時に、
上記耐熱性電気良港体に電力を印加し、処理ガスを均一
にプラズマ化してエツチング処理を安定して行なうこと
が可能となり、又、成膜時に、上記設置板側から加熱光
である赤外光を照射しなからCVD処理を行なえるので
均一で安定した成膜が可能となる。
As mentioned above, by using a heat-resistant and electrically conductive mounting plate for mounting the substrate to be processed, such as a semiconductor wafer, during the etching process for cleaning,
By applying electric power to the heat-resistant electric port body, it is possible to uniformly transform the processing gas into plasma and perform the etching process stably.In addition, during film formation, infrared light, which is a heating light, is emitted from the installation plate side. Since the CVD process can be performed without irradiating, uniform and stable film formation is possible.

この発明は上記実施例に限定されるものではなく、例え
ば被処理基板を設置する設置板は、耐熱性電気良導体で
あれば何れでも良く、例えば導電性のセラミックスや超
電導体のセラミックスでも良いことは言うまでもない。
The present invention is not limited to the above-mentioned embodiments. For example, the installation plate on which the substrate to be processed is placed may be made of any material as long as it is heat-resistant and has good electrical conductivity. For example, it may be made of conductive ceramics or superconducting ceramics. Needless to say.

又、設置板形状も、略円環状のものに限定されるもので
はなく、円板状のプレート型でも良い、この円板状の設
置板を使用する場合、CVD処理による被処理基板の加
熱は、設置板からの輻射熱により行ない、エツチングお
よびCVD処理時には連続加熱状態で実行しても良い。
Furthermore, the shape of the installation plate is not limited to a substantially annular shape, but may be a disk-shaped plate. When using this disk-shaped installation plate, heating of the substrate to be processed by CVD processing is difficult. The etching and CVD processes may be performed under continuous heating conditions.

この時、設置板に冷却機構を設け、エツチング時には冷
却し、CVD時には加熱状態とする如く構成しても良い
。又、円板状の設置板とすると、より均一にプラズマの
発生が可能となる。さらにエツチング処理するものは自
然酸化膜でなくとも良く、後に行なうCVD処理の前工
程としてプラズマエツチングを実行しても良い。さらに
又、設置板■とガス導入口(14)の間に設けた円板状
制御板(17)の位置を移動機構(14)で調整するこ
とで、設置された半導体ウェハ■の被処理面に、より均
一に反応ガスが接する如く、反応ガスの流れを制御する
ことができる。さらに又、CVD処理による成膜におい
ても、どのような処理でも良く例えばプラズマCVD処
理で行なっても良いことは言うまでもない。
At this time, the mounting plate may be provided with a cooling mechanism so that it is cooled during etching and heated during CVD. Furthermore, if the installation plate is in the form of a disk, plasma can be generated more uniformly. Furthermore, the material to be etched need not be a natural oxide film, and plasma etching may be performed as a pre-process of the CVD processing to be performed later. Furthermore, by adjusting the position of the disc-shaped control plate (17) provided between the installation plate ■ and the gas inlet (14) using the moving mechanism (14), the processing surface of the installed semiconductor wafer ■ In addition, the flow of the reaction gas can be controlled so that the reaction gas comes into contact with the reactor more uniformly. Furthermore, it goes without saying that any kind of treatment may be used for film formation by CVD treatment, such as plasma CVD treatment.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明装置の一実施例を説明するための装置構
成説明図、第2図は第1図装置の設置板説明図、第3図
は第1図装置の処理動作を示すフロー図である。 1・・・反応チャンバ    2・・・半導体ウェハ3
・・・設置板       4・・・切欠き部7・・・
RF電源
FIG. 1 is an explanatory diagram of the device configuration for explaining one embodiment of the device of the present invention, FIG. 2 is an explanatory diagram of the installation board of the device in FIG. 1, and FIG. 3 is a flow diagram showing the processing operation of the device in FIG. 1. It is. 1... Reaction chamber 2... Semiconductor wafer 3
... Installation plate 4 ... Notch part 7 ...
RF power supply

Claims (1)

【特許請求の範囲】[Claims]  電極間のガスをプラズマ化し処理する装置において、
上記一方の電極に接して被処理基板を設け、この被処理
基板を設けた電極を耐熱性電気良導体で構成したことを
特徴とするプラズマ処理装置。
In a device that processes gas between electrodes by turning it into plasma,
A plasma processing apparatus characterized in that a substrate to be processed is provided in contact with one of the electrodes, and the electrode on which the substrate to be processed is provided is made of a heat-resistant electrically conductive material.
JP13792888A 1988-06-03 1988-06-03 Plasma treating device Pending JPH01307443A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13792888A JPH01307443A (en) 1988-06-03 1988-06-03 Plasma treating device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13792888A JPH01307443A (en) 1988-06-03 1988-06-03 Plasma treating device

Publications (1)

Publication Number Publication Date
JPH01307443A true JPH01307443A (en) 1989-12-12

Family

ID=15209962

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13792888A Pending JPH01307443A (en) 1988-06-03 1988-06-03 Plasma treating device

Country Status (1)

Country Link
JP (1) JPH01307443A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS495266A (en) * 1972-05-01 1974-01-17
JPS58209111A (en) * 1982-05-31 1983-12-06 Toshiba Corp Plasma generator
JPS6246994A (en) * 1985-08-23 1987-02-28 Nippon Telegr & Teleph Corp <Ntt> Method and apparatus for growing thin film
JPS62165320A (en) * 1986-01-16 1987-07-21 Nippon Ee S M Kk Wafer fitting device and formation of thin film on wafer using thereof
JPS6237922B2 (en) * 1978-12-28 1987-08-14 Iseki Agricult Mach

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS495266A (en) * 1972-05-01 1974-01-17
JPS6237922B2 (en) * 1978-12-28 1987-08-14 Iseki Agricult Mach
JPS58209111A (en) * 1982-05-31 1983-12-06 Toshiba Corp Plasma generator
JPS6246994A (en) * 1985-08-23 1987-02-28 Nippon Telegr & Teleph Corp <Ntt> Method and apparatus for growing thin film
JPS62165320A (en) * 1986-01-16 1987-07-21 Nippon Ee S M Kk Wafer fitting device and formation of thin film on wafer using thereof

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