JPH01307291A - Manufacture of substrate mounting circuit using independent resistor - Google Patents

Manufacture of substrate mounting circuit using independent resistor

Info

Publication number
JPH01307291A
JPH01307291A JP63138722A JP13872288A JPH01307291A JP H01307291 A JPH01307291 A JP H01307291A JP 63138722 A JP63138722 A JP 63138722A JP 13872288 A JP13872288 A JP 13872288A JP H01307291 A JPH01307291 A JP H01307291A
Authority
JP
Japan
Prior art keywords
resistor
resistors
insulating substrate
pattern
printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63138722A
Other languages
Japanese (ja)
Inventor
Teruchiyo Nakahori
中堀 輝千代
Hidenori Kobayashi
秀徳 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitani Electronics Industry Corp
Original Assignee
Mitani Electronics Industry Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitani Electronics Industry Corp filed Critical Mitani Electronics Industry Corp
Priority to JP63138722A priority Critical patent/JPH01307291A/en
Publication of JPH01307291A publication Critical patent/JPH01307291A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve yield at a time when a circuit is constituted by forming a printed wiring pattern to an insulating substrate, shaping a resistor to a separate insulating substrate in parallel with the pattern, extracting the resistor having a value adapted to a resistor mounting section and setting up the resistor to said printed pattern wiring section. CONSTITUTION:Printed wiring patterns 12, 13 are formed to an insulating substrate 11 in a process A. On the other hand, resistors 22 are shaped to a separate insulating substrate 21 through a thick-film or thin-film technique in a process B in parallel with the process A, and the resistors 22 having a value adapted to the resistor mounting sections of the printed pattern wirings are extracted. The resistors 22 are fitted to the printed pattern wiring sections acquired in said process A in a process C. A fixing method by adhesives and solder melting is utilized as the mounting method of the resistors 22, and a film resistor in accurate thickness is shaped onto the surface of the substrate 21 through the thin-film technique or the thick-film technique as a method in which the resistors 22 required are obtained. Accordingly, the value of the resistors can be acquired precisely, yield can be improved and the time required for trimming can be shortened.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は、厚膜、薄膜技術及び半導体技術により基板
実装回路を製造する方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Field of Application) The present invention relates to a method of manufacturing a substrate mounted circuit using thick film, thin film technology and semiconductor technology.

(従来の技術) 一般の回路にはその構成素子として抵抗体が必ず必要で
ある。この抵抗体を回路に組込む技術としては、従来か
らあるように、■端子を有する抵抗器を半田等により導
体パターン間のスルーホールに接続する方法、あるいは
■導体パターンの端子間にチップ抵抗を接着剤などで仮
固定し、半田装置においてチップ抵抗端子と導体パター
ンを半田付けする方法がある。更に、■厚膜技術あるい
は薄膜技術により導体パターンの隙間に積層する方法、
■半導体IC技術によりパターン幅などを調整して形成
する方法などがある。
(Prior Art) A general circuit always requires a resistor as a component thereof. Conventional techniques for incorporating this resistor into a circuit include: ■ Connecting a resistor with terminals to the through-hole between the conductor patterns by soldering, or ■ Bonding a chip resistor between the terminals of the conductor pattern. There is a method in which the chip resistor terminals and the conductor pattern are temporarily fixed with a soldering agent or the like and then soldered to the chip resistor terminals and the conductor pattern using a soldering device. Furthermore, ■methods of laminating in gaps between conductor patterns using thick film technology or thin film technology;
2) There is a method of forming by adjusting the pattern width etc. using semiconductor IC technology.

ここで、サーマルヘッドのように絶縁基板と回路が一体
化されたものにおいて、抵抗体を組込む場合には、従来
、印刷基板の上にスクリーンとスキージを用(1てパタ
ーン印刷を行なって抵抗体を形成するか、または本件出
願人が出願した特開昭60−172533号公報に記載
されるような露光、現像処理を用いた技術がある。
Here, when incorporating a resistor in a thermal head in which an insulating substrate and a circuit are integrated, conventionally, a screen and squeegee are used on the printed circuit board (1) to print a pattern and then mount the resistor. There is a technique using exposure and development treatment as described in Japanese Patent Application Laid-Open No. 172533/1983 filed by the applicant of the present invention.

(発明が解決しようとする課題) 抵抗体を製°造する従来の技術は、上記のサーマルヘッ
ドにおいては、あくまでも予め導体パターンの製造工程
に対して一連に連なっており、導体パターンの上に抵抗
膜を形成する製造方法である。従って、抵抗膜を形成す
るときには、必ずその下部に別の回路パターンの層が存
在する。このように、下部の層が存在しこれが厚くなれ
ばなる程抵抗膜の線幅の精度や厚みの精度は劣化し、所
望とする抵抗値を得難くなる。このため従来の基板実装
回路は、歩留りが悪く抵抗体を実装した後でトリミング
工程を必要とし、その製造に長時間を要するという問題
がある。
(Problem to be Solved by the Invention) In the conventional technology for manufacturing a resistor, in the above-mentioned thermal head, the resistor is connected in advance to the manufacturing process of the conductor pattern, and the resistor is placed on the conductor pattern. This is a manufacturing method for forming a film. Therefore, when forming a resistive film, there is always a layer with another circuit pattern underneath it. As described above, the thicker the lower layer is, the more the accuracy of the line width and thickness of the resistive film deteriorates, making it difficult to obtain a desired resistance value. For this reason, conventional board-mounted circuits have a problem of poor yields, requiring a trimming process after mounting the resistor, and requiring a long time to manufacture.

そこでこの発明は、抵抗体の値を正確に製造することが
でき歩留りの向上を得、もってトリミングに要する時間
を大幅に低減できる基板実装回路の製造方法を提供する
ことを目的とする。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for manufacturing a circuit board mounted circuit that can manufacture resistors with accurate values, improve yield, and significantly reduce the time required for trimming.

、 (課題を解決するための手段) この発明は、絶縁基板に少なくとも印刷配線パターンを
形成する工程と、これに平行して別途絶縁基板に厚膜あ
るいは薄膜技術により抵抗体を形成し、該印刷パターン
配線の抵抗取付は部に適応した値の抵抗体を取り出す工
程と、取出された抵抗体を先の印刷パターン配線部分に
装着する工程とを有するものである。
(Means for Solving the Problems) The present invention includes a step of forming at least a printed wiring pattern on an insulating substrate, and in parallel with this step, separately forming a resistor on the insulating substrate by thick film or thin film technology, and Attaching a resistor to patterned wiring involves the steps of taking out a resistor of a value suitable for the part, and mounting the taken out resistor on the previously printed pattern wiring part.

(作用) 上記の方法に、より、抵抗体が別途精度よく製造されて
いるために回路を構成したときの歩留りが向上する。ま
たトリミングを要する割合いも少なくなり作業効率が向
上する。
(Function) According to the above method, since the resistor is separately manufactured with high precision, the yield when constructing the circuit is improved. In addition, the percentage of potatoes that require trimming is reduced, improving work efficiency.

(実施例) 以下、この発明の実施例を図面を参照して説明する。(Example) Embodiments of the present invention will be described below with reference to the drawings.

第1図はこの発明の一実施例における工程説明図である
。工程Aでは絶縁基板11に印刷配線パターン12.1
3が形成される。一方この工程Aに平行して工程Bでは
、別途絶縁基板21に厚膜あるいは薄膜技術により抵抗
体22を形成され。
FIG. 1 is a process explanatory diagram in one embodiment of the present invention. In step A, a printed wiring pattern 12.1 is printed on the insulating substrate 11.
3 is formed. On the other hand, in a step B parallel to this step A, a resistor 22 is separately formed on the insulating substrate 21 by thick film or thin film technology.

該印刷パターン配線の抵抗取付は部に適応した値の抵抗
体が取り出される。そして取出された抵抗体は、工程C
において先の工程Aで得られた印刷パターン配線部分に
装着される。
To attach a resistor to the printed pattern wiring, a resistor having a value suitable for the part is taken out. Then, the resistor taken out is processed in step C.
At step A, it is attached to the printed pattern wiring portion obtained in the previous step A.

抵抗体の装着方法としては、接着剤による方法や半田溶
融による固定方法が利用される。また、工程Bにおいて
、必要な抵抗体を得る方法としては多種の実施例が可能
である。例えば、基板21の面に正確な厚みの膜抵抗を
薄膜技術あるいは厚膜技術により形成する。この膜抵抗
の厚みは、従来の如くパターン上に形成するのではなく
平坦な基板の絶縁層の上に形成するのであるから精度よ
く得られる。そしてこの膜抵抗を例えばレーザビームに
より必要な抵抗値が得られるように線幅を計算し、必要
な使用場所に適応した棒状あるいは長方形状あるいはL
字状に抵抗片として切出し使用してもよい。あるいは、
最初から必要な形状の抵抗片を厚膜技術あるいは薄膜技
術により形成しておき使用しても良い。
As a method for mounting the resistor, a method using an adhesive or a fixing method using solder melting is used. Furthermore, in step B, various embodiments are possible as a method for obtaining the necessary resistor. For example, a film resistor with an accurate thickness is formed on the surface of the substrate 21 by thin film technology or thick film technology. The thickness of this film resistor can be obtained with high accuracy because it is not formed on a pattern as in the conventional case, but is formed on an insulating layer of a flat substrate. Then, calculate the line width of this film resistance to obtain the necessary resistance value using a laser beam, for example, and shape it into a bar, rectangle, or L shape that is suitable for the required place of use.
It may also be cut out and used as a resistor piece in the shape of a letter. or,
A resistor piece having the required shape may be formed from the beginning by thick film technology or thin film technology and then used.

このような製造工程であると、抵抗体の値を正確に製造
することができ結果的には従来よりも歩留りの向上を得
ることができる。またトリミングに要する時間を大幅に
低減できる。
With such a manufacturing process, the resistor can be manufactured with accurate values, and as a result, the yield can be improved compared to the conventional method. Furthermore, the time required for trimming can be significantly reduced.

このような製造方法であると、更に以下に述べるような
多くの利点がある。従来の如(、導体パターンの上に直
接抵抗体を形成するのではなく、正確な値の抵抗体を別
途用意するのであるから、工程Bにおいては、各種の形
状や値の抵抗体を用意することができ、また全く同様な
形状、値の抵抗体、あるいは形状が異なり値が同じの抵
抗体、さらに形状が同じで値が異なる抵抗体を種々用意
することができる。このために工程Cにおいて抵抗体を
交換する必要が生じたときには、1つの回路全体を無駄
にすることな(別の抵抗を装着することができる。
Such a manufacturing method has many advantages as described below. As in the conventional method (instead of forming a resistor directly on the conductor pattern, a resistor with an accurate value is prepared separately, so in process B, resistors of various shapes and values are prepared. In addition, it is possible to prepare a variety of resistors with exactly the same shape and value, resistors with different shapes and the same value, and resistors with the same shape and different values.For this purpose, in step C. When it becomes necessary to replace a resistor, another resistor can be installed without wasting an entire circuit.

さらに、この製造方法が有効な効果を発揮する場合とし
ては、印刷技術を適用しにくいような実装回路に抵抗体
を張付けたりする場合である。例えば、抵抗体を取付け
る面が湾曲していたり、狭いエツジ面であったり、周囲
に凹凸面が存在して狭い隙間に取付けなければ成らない
場合である。
Furthermore, this manufacturing method is effective when a resistor is attached to a mounted circuit to which printing technology is difficult to apply. For example, when the surface on which the resistor is mounted is curved, has a narrow edge, or has an uneven surface around it, the resistor must be mounted in a narrow gap.

第2図はサーマルヘッドの基板の隙間に抵抗体を装着す
る場合の例を示している。 サーマルヘッドは、サブ基
板31に櫛形の共通電極41を形成し、メイン基板32
に複数の並列ドライブ電極42を形成し、画電極の間に
発熱抵抗52をサンドイッチ状に挟み込む構成であり、
ドライブ電極には、選択的にドライブ回路43からの電
流を洪給することができる。尚、側基板31.32問い
は、スペーサ51が配置される(同図(a))。
FIG. 2 shows an example in which a resistor is mounted in a gap between a substrate of a thermal head. The thermal head includes a comb-shaped common electrode 41 formed on a sub-board 31, and a comb-shaped common electrode 41 formed on a main board 32.
A plurality of parallel drive electrodes 42 are formed in the image electrodes, and a heating resistor 52 is sandwiched between the picture electrodes.
The drive electrodes can be selectively flooded with current from the drive circuit 43. Note that spacers 51 are arranged on the side substrates 31 and 32 (FIG. 3(a)).

このサーマルヘッドの電気的回路構成は同図(b)に示
すようになる。サーマルヘッドは、その印字部は、同図
(C)に示すように、感熱紙あるいはリボンに接触する
エツジ部が円滑に成るように仕上げられる。また熱伝達
効率を上げるために、エツジ部の基板31.32間に生
じた隙間には、抵抗体23が充填され、その上にオーバ
ーコート層60が形成される。
The electrical circuit configuration of this thermal head is shown in FIG. 4(b). The printing portion of the thermal head is finished so that the edge portion that comes into contact with the thermal paper or ribbon is smooth, as shown in FIG. 2C. Further, in order to increase heat transfer efficiency, the gap created between the substrates 31 and 32 at the edge portion is filled with a resistor 23, and an overcoat layer 60 is formed thereon.

ここで、サーマルヘッドの抵抗対23としては、第1図
の工程Bにおいて切出した抵抗体を使用することにより
作業効率は格段と向上できる。従来であると、この狭い
エツジ部に印刷技術により何回も抵抗素材を印刷してい
たが、本発明の製造方法を用いる事により一回のはめこ
み作業に充填を終える事ができる。
Here, by using the resistor cut out in step B of FIG. 1 as the resistor pair 23 of the thermal head, the working efficiency can be greatly improved. Conventionally, resistive material was printed many times on this narrow edge portion using printing technology, but by using the manufacturing method of the present invention, filling can be completed in one fitting operation.

(発明の効果) 以上説明したようにこの発明によると、抵抗・体の値を
正確に製造することができ歩留りの向上を得、もってト
リミングに要する時間を大幅に低減できる。
(Effects of the Invention) As explained above, according to the present invention, it is possible to manufacture the resistor/body values accurately, improve the yield, and thereby significantly reduce the time required for trimming.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例における工程説明図、第2
図はこの発明の詳細な説明するために示した図であり、
同図(a)はサーマルヘッドの分解斜視図、同図(b)
はサーマルヘッドの回路図、同図(C)はサーマルヘッ
ドのエツジ部の説明図である。 11.21・・・絶縁基板、12.13・・・導体パタ
ーン、22・・・抵抗体。 出願人代理人 弁理士 鈴江武彦 (b) 范 2 (c) 図
Fig. 1 is a process explanatory diagram in one embodiment of this invention;
The figure is a diagram shown for detailed explanation of this invention,
The same figure (a) is an exploded perspective view of the thermal head, the same figure (b)
is a circuit diagram of the thermal head, and FIG. 2C is an explanatory diagram of the edge portion of the thermal head. 11.21... Insulating substrate, 12.13... Conductor pattern, 22... Resistor. Applicant's agent Patent attorney Takehiko Suzue (b) Fan 2 (c) Figure

Claims (1)

【特許請求の範囲】[Claims]  絶縁基板に少なくとも印刷配線パターンを形成する工
程と、これに平行して別途絶縁基板に厚膜あるいは薄膜
技術により抵抗体を形成し、該印刷パターン配線の抵抗
取付け部に適応した値の抵抗体を取り出す工程と、取出
された抵抗体を先の印刷パターン配線部分に装着する工
程とを具備したことを特徴とする基板実装回路の製造方
法。
A step of forming at least a printed wiring pattern on an insulating substrate, and in parallel with this step, forming a resistor separately on the insulating substrate by thick film or thin film technology, and forming a resistor with a value suitable for the resistor attachment part of the printed pattern wiring. 1. A method for manufacturing a board-mounted circuit, comprising the steps of taking out the resistor and attaching the taken out resistor to the printed pattern wiring section.
JP63138722A 1988-06-06 1988-06-06 Manufacture of substrate mounting circuit using independent resistor Pending JPH01307291A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63138722A JPH01307291A (en) 1988-06-06 1988-06-06 Manufacture of substrate mounting circuit using independent resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63138722A JPH01307291A (en) 1988-06-06 1988-06-06 Manufacture of substrate mounting circuit using independent resistor

Publications (1)

Publication Number Publication Date
JPH01307291A true JPH01307291A (en) 1989-12-12

Family

ID=15228617

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63138722A Pending JPH01307291A (en) 1988-06-06 1988-06-06 Manufacture of substrate mounting circuit using independent resistor

Country Status (1)

Country Link
JP (1) JPH01307291A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013126270A1 (en) * 2012-02-20 2013-08-29 Apple Inc. Method for creating resistive pathways

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5970588A (en) * 1982-10-15 1984-04-21 Nec Corp Manufacture of laminate ceramic thermal head

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5970588A (en) * 1982-10-15 1984-04-21 Nec Corp Manufacture of laminate ceramic thermal head

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013126270A1 (en) * 2012-02-20 2013-08-29 Apple Inc. Method for creating resistive pathways
US8687369B2 (en) 2012-02-20 2014-04-01 Apple Inc. Apparatus for creating resistive pathways

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