JPH01302182A - Fault point locator - Google Patents

Fault point locator

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Publication number
JPH01302182A
JPH01302182A JP13141088A JP13141088A JPH01302182A JP H01302182 A JPH01302182 A JP H01302182A JP 13141088 A JP13141088 A JP 13141088A JP 13141088 A JP13141088 A JP 13141088A JP H01302182 A JPH01302182 A JP H01302182A
Authority
JP
Japan
Prior art keywords
circuit
condition
interrupter
line
fault point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13141088A
Other languages
Japanese (ja)
Other versions
JP2597653B2 (en
Inventor
Kazuo Ueno
和生 上野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
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Priority to JP63131410A priority Critical patent/JP2597653B2/en
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  • Locating Faults (AREA)

Abstract

PURPOSE:To enable always the locating of a one-wire ground fault trouble, by estimating operating condition of a system according to a breaker condition, a tide condition or the like to select the optimum locating computing system to match the condition. CONSTITUTION:In a two-circuit operation, both circuits of breakers are made. Hence, an own circuit breaker pallet condition 22 and an adjacent circuit breaker pallet condition 23 move to '1' to meet the condition of an AND circuit 24. A timer circuit 25 gives an output '1' by an output of the AND circuit 24. Now when a one-wire ground fault occurs, a one-wire ground fault detection condition 21 is at '1' to meet the condition of an AND circuit 27 with an output of the timer circuit 25 and a I0 type location computing circuit 29 locates a fault point. In other words, a I0 type location computing circuit 29 for which two circuits of breakers are applicable in the theory of locating depending on the condition of 'make' while being excellent in accuracy is selected.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は高抵抗接地系統の平行2回線の1線地線故障時
における故障点標定装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Field of Application) The present invention relates to a failure point locating device in the event of a fault in one ground wire of two parallel circuits in a high resistance grounding system.

(従来の技術) 従来、送電線の故障点標定にはサージ受信方式、或いは
パルスレーダ方式のように進行波を応用し友ものと、送
電線の電圧、電流t−測測定、故障点までのインピーダ
ンスを求める(インピーダンス演算方式)か、或いは平
行2回線の電流の大きさの比から対象標定区間に対する
故障点までの比企求める(電流比演算方式)かにより故
障点金求める方式がある。前者の進行波を利用したもの
は、通信装置、送電線への信号結合装置等の付帯設備を
必要とし高価なものである。後者のインピーダンス演算
方式或いは電流比演算方式の場合、送を線に通常設けら
れている電圧変成器および変流器よシ得られる電圧およ
び電流等の電気量情報のみで故障点を襟足する几め、前
者のような新友な付帯設備を必要としない。さらに、近
年、マイクロコンビ、−夕全応用し九デジタル計算機技
術の著しい発達により、ソフトウェア処理で複雑な演算
も処理可能な後者方式が特に注目を集めるようになりて
きた。
(Prior art) Conventionally, to locate fault points on power transmission lines, traveling waves such as surge reception methods or pulse radar methods have been applied, and voltage and current t-measurements of power transmission lines, as well as distances to fault points, have been applied. There are methods for finding the fault point depending on whether to find the impedance (impedance calculation method) or to find the ratio to the fault point in the target location section from the ratio of the current magnitudes of two parallel lines (current ratio calculation method). The former method, which uses traveling waves, requires ancillary equipment such as a communication device and a signal coupling device to a power transmission line, and is expensive. In the case of the latter impedance calculation method or current ratio calculation method, it is possible to locate the fault point using only electrical quantity information such as voltage and current obtained from the voltage transformer and current transformer normally installed in the transmission line. , does not require additional equipment like the former. Furthermore, in recent years, with the remarkable development of digital computer technology using microcombi and digital computers, the latter method, which is capable of processing complex calculations through software processing, has been attracting particular attention.

ここで、インピーダンス演算方式と電流比演算方式につ
いてその基本原理を説明する。
Here, the basic principles of the impedance calculation method and the current ratio calculation method will be explained.

第5図はインピーダンス演算方式の原理説明図である。FIG. 5 is a diagram explaining the principle of the impedance calculation method.

第5図において各信号の意味は下記である。The meaning of each signal in FIG. 5 is as follows.

x : CT設置点から故障点までの距離(―)i:故
障時の電流         (A)中:故障時の端子
電圧       (V)(V) ÷F:故障時の故障点電圧 R2:故障点抵抗         (Ω)(A) 12:故障時の故障点電流 2:単位長当りのインピーダンス  (ルー)F:故障
点 第5図の点Fで1線地絡故障が発生し友場合÷=i−x
−2+v、       ・・・(1)九=I、・R2
・・・(2) が成立する。今、÷、と略々同位相と考えられる電気量
t−Ipol (極性t)と定義する。Ipolの共役
複素数成分(Ipol” ) 1(1)式の両辺に掛け
て変形し、(3)式を得る。
x: Distance from CT installation point to failure point (-) i: Current at failure (A) Medium: Terminal voltage at failure (V) (V) ÷F: Failure point voltage at failure R2: Failure point resistance (Ω) (A) 12: Fault point current at the time of failure 2: Impedance per unit length (Lou) F: Fault point If a one-wire ground fault occurs at point F in Figure 5, ÷ = i-x
-2+v, ...(1) Nine=I, ・R2
...(2) holds true. Now, ÷ is defined as an electrical quantity t-Ipol (polarity t) which is considered to have approximately the same phase. The conjugate complex component of Ipol (Ipol'') 1 is transformed by multiplying both sides of equation (1) to obtain equation (3).

VIpol −I−x−Z Ipol =V、−1po
l    −(3)ここでv2とIpolが同位相と仮
定すると九=lvFI”λ、″Ipol =l Ipo
l 14’λと表わせるので(3)式の右辺は(4)式
で表現される。
VIpol −I−x−Z Ipol =V, −1po
l - (3) Here, assuming that v2 and Ipol are in phase, 9 = lvFI"λ, "Ipol = l Ipo
Since it can be expressed as l 14'λ, the right side of equation (3) can be expressed as equation (4).

VF ・I p o 1 =l VF l−i jλ・
1Ipoll・g−jλ= IV、l・1Ipol I
g’      ・= (4)(4)式は実軸方向の成
分のみであるためその虚数部は零である。
VF ・I p o 1 = l VF l−i jλ・
1Ipoll・g−jλ= IV, l・1Ipol I
g' .=(4) Since equation (4) has only a component in the real axis direction, its imaginary part is zero.

1m (V、Ipol )=O−(5)従って(3)式
の両辺の虚数部をとり、(5)式を代入すると(6)式
を得る。
1m (V, Ipol)=O-(5) Therefore, by taking the imaginary parts of both sides of equation (3) and substituting equation (5), equation (6) is obtained.

1m(V・Ipol”)−1+n(I−x・乞Ipol
 )=0 ・・16)(6)式から故障点までの距離X
は(7)式で与えられる。
1m(V・Ipol")-1+n(I-x・beginningIpol")
)=0...16) Distance X from equation (6) to the failure point
is given by equation (7).

(7)式を用いて故障点を標定するのが、インピーダン
ス演算方式の原理である。インピーダンス演算方式の例
としては、特願昭59−59578号「送電線故障点標
定方式」等があり、これらはすでに開示された技術であ
る。
The principle of the impedance calculation method is to locate the fault point using equation (7). An example of the impedance calculation method is Japanese Patent Application No. 59-59578 entitled "Transmission Line Fault Point Locating Method", which are already disclosed techniques.

第6図は電流比演算方式の原理説明図である。FIG. 6 is a diagram explaining the principle of the current ratio calculation method.

第6図において各記号の意味は下記である。The meaning of each symbol in FIG. 6 is as follows.

l:標定対象区間全長(―) io、:故障時の自回線零相電流(A)i02:故障時
の隣回線零相電流(A)※。、:故障時の零相電圧(V
) k:標定対象区間全長に対する故障点までの比ion 
”故障時の対向端零相電流(A)北。:単位長当りの零
相自己インピーダンス(ルー)壱m:単位長当りの零相
相互インピーダンス(ルー)÷OF ”故障点零相電圧
(V) F:故障点 第6図の点Fで141地絡故障が発生した場合、故障回
H@では01式が、又健全回線側では(6)式がそれぞ
れ成立する。
l: Total length of the target section (-) io,: Zero-sequence current of own line at the time of failure (A) i02: Zero-sequence current of adjacent line at the time of failure (A)*. ,: Zero-sequence voltage at the time of failure (V
) k: Ratio of the length of the target section to the failure point ion
"Zero-sequence current at the opposite end (A) north at the time of failure: Zero-sequence self impedance per unit length (Lou) 1m: Zero-sequence mutual impedance per unit length (Lou) ÷ OF" Zero-sequence voltage at the fault point (V ) F: Fault point When a 141 ground fault occurs at point F in Figure 6, Equation 01 holds true for the fault line H@, and Equation (6) holds true for the healthy line.

÷。A=io1  ・kl 11北。十量。2 ・kl
  −Zrn+Vo、     ・・・αカap式=(
6)式とおいて整理すると(至)式を得る。
÷. A=io1 ・kl 11 north. Ten amounts. 2 ・kl
−Zrn+Vo, ...α Kaap formula=(
6) If we rearrange the equation as Eq. (to), we obtain Eq.

10、−kt <i。−z!!、)= 102<2−k
)l−c’z0−礼>+1(1−k)1・(牙。−テr
n)  ・・・(ト)(至)式をkについて解くとa◆
式を得る。
10, -kt <i. -z! ! , )=102<2-k
)l-c'z0-rei>+1(1-k)1・(tusk.-ter
n) ... (g) (to) Solving the equation for k gives a◆
Get the formula.

04式には対向端の零相電流i。、が含1れているため
この成分を除去することを考え64式を変形し。
Equation 04 shows the zero-sequence current i at the opposite end. , so we modified Equation 64 to remove this component.

(イ)式を得る。(b) Obtain the formula.

< io、 + 102)k−2io2= io、o−
k>    ・as今、電気量としてVpol (極性
量)全定義しα0式の両辺にVpolの共役複素数成分
を掛けさらにその実軸方向成分をとると(ト)式を得る
< io, + 102) k-2io2= io, o-
k> ・as Now, by fully defining Vpol (polar quantity) as an electric quantity, multiplying both sides of the α0 expression by the conjugate complex component of Vpol, and then taking its real axis direction component, we obtain equation (G).

Re ((Iol + 102)”vP’自−Re (
2・I02 ・Vpol” )=R@ (I O!1 
(1−k )Vp o 1 )  ・・・Qlここで対
向端子の零相電流i。11が虚軸方向成分(充電々流又
ハリアクドル電流)のみと仮定すると01式の右辺は零
となりαη式を得る。
Re ((Iol + 102)"vP'self-Re (
2・I02・Vpol” )=R@(I O!1
(1-k)Vpo1)...Ql where the zero-sequence current i of the opposing terminal. Assuming that 11 is only the component in the imaginary axis direction (charging current or halacdle current), the right side of equation 01 becomes zero, and the αη equation is obtained.

Re ((Io、+Io2)k−Vpol )==Re
 (2・Io2’Vpol” )−Qj)αη式から標
定対象区間全長に対する故障点までの距離の比には(1
1式で与えられる。
Re ((Io, +Io2)k-Vpol)==Re
(2・Io2'Vpol")-Qj) From the αη formula, the ratio of the distance to the fault point to the total length of the area to be located is (1
It is given by one equation.

α神式を用いて故障点を標定するのが電流比演算方式の
原理である。電流比演算方式の例としては特開昭61−
98119r故障点標定装置」が提案されており、これ
もすでに開示され次技術である。
The principle of the current ratio calculation method is to locate the failure point using the α formula. An example of the current ratio calculation method is JP-A-61-
No. 98119r failure point locating device" has been proposed, which has already been disclosed and is the next technology.

以上説明してき次ように高抵抗接地系統の場合1a!地
縁故障に対してはインピーダンス演算方式と電流比演算
方式の二つが現在有効な方式として考案されているが、
両者を比較した場合その精度面から言うと後者の電流比
演算方式が優れているという状況にある。
Having explained the above, in the case of a high resistance grounding system, 1a! Two methods are currently being devised as effective for ground faults: the impedance calculation method and the current ratio calculation method.
When comparing the two, the latter current ratio calculation method is superior in terms of accuracy.

しかしながら電流比演算方式は永久故障発生時の2回め
の標定、或いは片回線運用時の標定等に対しては演算原
理上適用ができないという問題がある。
However, the current ratio calculation method has a problem in that it cannot be applied to second orientation when a permanent failure occurs or orientation during single-line operation due to the calculation principle.

本発明は上記問題点を解決するためになされたものであ
り、し中断器条件或いは潮流条件等により系統の運用状
況を推定し、状況に応じ次最適の標定演算方式?:選択
することで、1線地絡故障に対する標定を常に可能とす
る故障点標定装置を提供すること全目的としている。
The present invention was made to solve the above problems, and it estimates the operating status of the system based on interrupter conditions or power flow conditions, and determines the next optimal orientation calculation method depending on the situation. : The overall purpose is to provide a fault point locating device that makes it possible to always locate a one-line ground fault by selecting:

〔発明の構成〕[Structure of the invention]

(!!題を解決する之めの手段) 上記目的を達成するため本発明では電力系統の電流電圧
情報をもとに自端から故障点までの位置を標定する、高
抵抗接地系の平行2回線送電線用の故障点標定装置にお
いて、自端子にて2回線分の電流、・電圧値を同一時刻
に周期的にサンプリングしてディジタル量に変換する手
段と、系統故障の発生時に故障点までのインピーダンス
金演算して故障点を足める第1の標定演算手段と、系統
故障の発生時に2回線を構成する各回線の零相電流の比
を演算して故障点を定める第2の標定演算手段と、系統
から入力される情報をもとに系統の運用状態を推定し、
前記容筒1及び第2の標定演算手段全切換える手段とか
ら構成し次。
(!! Means for Solving the Problem) In order to achieve the above object, the present invention provides a high-resistance grounding system with two parallel In a fault point locating device for line power transmission lines, there is a means for periodically sampling the current and voltage values of two lines at the same time at the own terminal and converting them into digital quantities, and a means for locating the fault point when a system fault occurs. a first location calculation means for calculating the impedance of the circuit and adding the fault point; and a second location calculation means for determining the fault point by calculating the ratio of the zero-sequence current of each line constituting the two circuits when a system fault occurs. Estimates the operational status of the grid based on calculation means and information input from the grid,
It is composed of the container 1 and a means for switching all of the second orientation calculation means.

(作用) したがって1線地絡故障発生時に、し中断器情報或いは
潮流の有無等の条件を用いて、系統の運用状態を推定し
もし2回線運用であればより精度のよい標定の可能な電
流比較演算方式とし、又、1回線のみの運用であればイ
ンピーダンス演算方式とすることができる。
(Function) Therefore, when a single-line ground fault occurs, the operating status of the system can be estimated using interrupter information or conditions such as the presence or absence of power flow. A comparison calculation method can be used, or an impedance calculation method can be used if only one line is operated.

(実施例) 以下図面1fr参照して実施例を説明する。(Example) An embodiment will be described below with reference to drawing 1fr.

第4図は本発明による故障点標定装置をマイクo =r
 y k’ユータ等を応用したデジタル演算処理装置を
用いて構成した場合のハードウェア構成を含む実施例を
示している。第4図において、1は故障点標定の対象と
なる平行2回線送電線2m。
FIG. 4 shows the failure point locating device according to the present invention with microphone o = r
An embodiment including a hardware configuration using a digital arithmetic processing device to which a yk' computer or the like is applied is shown. In Fig. 4, 1 is a 2m parallel two-circuit power transmission line that is the target of failure point location.

2bFiそれぞれの送電線に設置された変流器、3は電
圧変成器%4&#4bはそれぞれの送電線のし中断器の
開閉状態を知る九めのし中断器のノ母レフト条件、5は
本発明の故障点標定装置、6は入力電気量のレベルを変
換する入力変換器、7F′1入力電気量の高調波成分を
除去し基本波成分を抽出するフィルタ回路(FIL)、
8はサンプルホールド回路(S/H)、9はマルチプレ
クサ回路(MPX)、10はアナログ量をデジタル量に
変換するAD変換回路(A/D )、11は入力インタ
ーフェイス回路、12flランダムアクセスメモリ(R
AM )、13はソフトウェア−算を制御する中央演算
回路(CPU)、14は演算プログラムを収納するリー
ドオンリメモリ(ROM)、15は出力インターフェイ
ス回路、16は出力回路を示している。
2bFi is the current transformer installed on each transmission line, 3 is the voltage transformer%4&#4b is the main left condition of the interrupter on each transmission line, and 5 is the main left condition of the interrupter on each transmission line. Fault point locating device of the present invention, 6 is an input converter that converts the level of the input electrical quantity, 7F'1 is a filter circuit (FIL) that removes harmonic components of the input electrical quantity and extracts the fundamental wave component;
8 is a sample hold circuit (S/H), 9 is a multiplexer circuit (MPX), 10 is an AD conversion circuit (A/D) that converts an analog quantity into a digital quantity, 11 is an input interface circuit, and 12fl random access memory (R
AM), 13 is a central processing circuit (CPU) that controls software calculations, 14 is a read-only memory (ROM) that stores calculation programs, 15 is an output interface circuit, and 16 is an output circuit.

これらのハードウェアの構成はマイコン応用のデジタル
演算処理装置では一般的なものである几め、以下簡単に
応動を説明し、詳細な説明は省略する。
These hardware configurations are common in microcomputer-applied digital arithmetic processing devices, so responses will be briefly explained below and detailed explanations will be omitted.

電力系統の電気量は、変流器2ae2b、電圧変成器3
を介して、故障点標定装置5へ導入される。故障点標定
装置5に導入された電気量は、入力変換器6、フィルタ
回路7、サンプルホールド回路8、マルチブレフサ回路
9、AD変換回路10を順番に介してデジタル量に変換
され、ランダムアクセスメモリ12に記憶される。同じ
く故障点標定装置5に導入されたしゃ断器のパレット条
件4m、4bFi入力インターフエイス回路11を介し
てランダムアクセスメモリ12に記憶される。中央演算
回路13はランダムアクセスメモリ12に記憶されたこ
れらの情報を用い、リードオンリメモリ14に記憶され
ている後述するソフトウェア演算処理を実行し、故障点
を標定する。標定結果は出力インターフェイス回路15
を介して出力回路16へ導入し、外部に表示される。
The amount of electricity in the power system is determined by current transformer 2ae2b and voltage transformer 3.
It is introduced into the failure point locating device 5 via. The electrical quantity introduced into the fault point locating device 5 is converted into a digital quantity via an input converter 6, a filter circuit 7, a sample hold circuit 8, a multi-blephr circuit 9, and an AD converter circuit 10 in order. is memorized. Similarly, the pallet conditions of the circuit breaker introduced in the failure point locating device 5 are stored in the random access memory 12 via the 4m, 4bFi input interface circuit 11. Using the information stored in the random access memory 12, the central processing circuit 13 executes software calculation processing stored in the read-only memory 14, which will be described later, to locate the failure point. The orientation result is output to the output interface circuit 15.
The signal is introduced into the output circuit 16 via the terminal and displayed externally.

第1図は第4図の故障点標定装f5に納められている本
発明の一実施例を示す機能ブロック図である。
FIG. 1 is a functional block diagram showing an embodiment of the present invention housed in the failure point locating device f5 of FIG.

第1図にふ・いて、21Fi1線地絡故障検d条件で故
障検出リレーの組み合わせ等によ、!Mfii地絡故障
を検出した場合に出力を生ずるものである。
Based on Figure 1, 21Fi 1 line ground fault detection condition d, by combination of fault detection relays, etc.! It produces an output when an Mfii ground fault is detected.

具体的には短絡内部故障を検出する短絡距離リレー囚と
地絡内部故障を検出する地絡方向リレー(Blを用いて
A不動作かりB動作の条件でl#!地絡故障を判別し、
更に各相電圧の最小電圧和を検出して故障相を選別する
等の方法により構成されるものであるが、ここではその
具体的な内容を限定するものではなく1線地絡故障を検
出できるものであればよい。22は自回線のし中断器の
パレット条件(し中断器が投入されている場合に出力を
生ずる)23は隣回線のしゃ断器のパレット条件(22
に同じ)24.27.28はアンド回路、25は出力を
遅延させるタイマー回路、26はNOT回路、29は前
述した工形標定演算回路、30は同じく前述し念z形標
定演算回路を示している。
Specifically, a short-circuit distance relay that detects short-circuit internal faults and a ground-fault direction relay that detects ground-fault internal faults (using Bl, it determines l#! ground fault under the conditions of A non-operation and B operation,
Furthermore, it is configured by a method such as detecting the minimum voltage sum of each phase voltage and selecting a faulty phase, but the specific content is not limited here, and it is possible to detect a single-wire ground fault. It is fine as long as it is something. 22 is the pallet condition of the circuit breaker of the own line (will generate an output when the circuit interrupter is turned on); 23 is the pallet condition of the circuit breaker of the adjacent line (22
24, 27, and 28 are AND circuits, 25 is a timer circuit for delaying the output, 26 is a NOT circuit, 29 is the aforementioned construction positioning calculation circuit, and 30 is the same as previously described Z-shape orientation calculation circuit. There is.

このような構成において、標定対象区間に故障が発生し
た場合の応動を以下に説明する。
In such a configuration, the response when a failure occurs in the location target section will be described below.

(1)2回線運用時の1線地絡故障に対する標定2回線
運用時は両回線のし中断器が「入」の状態にある。従っ
て自回線し中断器パレット条件22及び隣回線し中断器
パレット条件23が11″となり、AND回路24の条
件が成立する。
(1) Identification of one-line ground fault during two-line operation When two lines are operated, the interrupters for both lines are in the "on" state. Therefore, the interrupter palette condition 22 for the own line and the interrupter palette condition 23 for the adjacent line become 11'', and the condition of the AND circuit 24 is satisfied.

タイマー回路25は後で説明する時限(′11を有して
いるが、この時限はこの場合特に問題とはならずアンド
回路24の出力によシタイマー回路25の出力が1″に
なっていると考えてさしつかえない。さて1線地路故障
である次め11s地絡故障検出条件21が11″となっ
ており、タイマー回路25の出力とのアンド回路27の
条件が成立し、I0形標定演算回路29によシ故障点標
定が行なわれる。即ち、両回線のし中断器が「入」の条
件にょシ標定原理上適用可能でしかも精度面でも優れて
いる工。形標定演算回路が選択されたことになる。
The timer circuit 25 has a time limit ('11) which will be explained later, but this time limit is not a particular problem in this case, and if the output of the timer circuit 25 is 1'' due to the output of the AND circuit 24, There is no need to think about it.Now, the next 11s ground fault detection condition 21, which is a 1 line ground fault, is 11'', and the condition of the AND circuit 27 with the output of the timer circuit 25 is satisfied, and the I0 type orientation calculation is performed. Fault point location is performed by the circuit 29. In other words, under the condition that both line interrupters are "on", this method is applicable in terms of the fault location principle and has excellent accuracy.The shape location calculation circuit is selected. That means that.

(i)2回線運用時の1線地絡永久故f!il’l:対
する再閉路投入時の2回目の標定 2回線運用であるが系統保護機能の働きによシ故障発生
回線のし中断器が「切」となる。
(i) 1 line ground fault permanent failure when operating 2 lines f! il'l: During the second orientation two-line operation at the time of re-closing, the interrupter of the faulty line is turned off due to the system protection function.

更に再閉路機能の働きにニジし中断器を投入していく場
合、故障が継続している(永久故障)ために再度故障モ
ードとなるが、この故障に対する標定を考える。
Furthermore, if you interrupt the operation of the reclosing function and turn on the interrupter, the failure mode will re-enter because the failure continues (permanent failure), but consider the orientation for this failure.

自回線の故障モードを想定すると、系統保護機能の働き
Kより自回線しゃ断器が「切」となるため自回線しゃ断
器パレット条件22が*Onとなり、アンド回路24の
条件不成立によ少タイマー回路25は一旦リセットされ
ている。この状況において、再閉路機能の働きによシ自
回線し中断器が投入されると、自回線し中断器・ンレソ
ト条件22が′″l′となってくるため、アンド回路2
4が再度成立し、タイマー回路25が起動する。
Assuming a failure mode of the own line, the own line breaker is turned off due to the function K of the grid protection function, so the own line breaker pallet condition 22 becomes *On, and the condition of the AND circuit 24 is not met, so the timer circuit is activated. 25 has been reset once. In this situation, if the re-closing function causes the self-circuit to close and the interrupter is turned on, the AND circuit 2
4 is established again, and the timer circuit 25 is activated.

タイマー回路25の出力が1”となるまでには時限σ)
の時間を要する。
It takes a time σ) for the output of the timer circuit 25 to reach 1".
It takes time.

一方1線地絡故障検出条件21は自回線し中断器パレッ
ト条件22とほぼ同時に成立するため1線地絡故障検出
条件21とNOT回路26によるアンド回路280条件
が成立し、Z形標定演算回路30により故障点標定か行
なわれる。
On the other hand, since the 1-wire ground fault detection condition 21 is satisfied almost simultaneously with the self-circuit interrupter pallet condition 22, the 1-wire ground fault detection condition 21 and the AND circuit 280 condition by the NOT circuit 26 are satisfied, and the Z-shaped orientation calculation circuit 30, the fault point is located.

即ち、自端(先行端)シ中断器投入直後の故障に対して
は、後述するように対向端(後続端)のし中断器が未投
入であるために、I0形標定演算が原理上適用できない
ために2形標定演算回路が選択されたことになる。
In other words, in case of a failure immediately after the interrupter at the own end (leading end) is turned on, the I0 type orientation calculation is applied in principle because the interrupter at the opposite end (following end) is not turned on, as will be described later. Since this is not possible, the type 2 orientation calculation circuit is selected.

ここでタイマー回路25の時限(T)の意味を説明する
Here, the meaning of the time limit (T) of the timer circuit 25 will be explained.

この時限(Tlは高抵抗接地系統の再閉路方式に起因す
るものである。高抵抗接地系統においては故障発生時、
故障の種類によらず3相のし中断器を開放する方式が一
般的である。
This time limit (Tl) is due to the reclosing method of high resistance grounding systems.In high resistance grounding systems, when a fault occurs,
Regardless of the type of failure, the general method is to open the three-phase interrupter.

従って再閉路方式としては背後電源のある端子側のし中
断器を先に投入しく先行端子投入)残った端子側は送電
線側の電圧と母線側の電圧を同期検定した後に投入する
(後続端子投入)いわゆる同時再閉路方式又は送電線電
圧ありと母線電圧なしにて投入する方式を採用している
。つまシ先行端子のし中断器投入タイミングと後□続端
子のし中断器投入タイミングは同期検定するための時限
又は送電線電圧が確立したことを確認する時限だけずれ
ていることになる。故障点標定装置の場合、原理的に電
源端側(通常先行端側)に設置される。
Therefore, in the re-closing method, the circuit interrupter on the terminal side with the rear power source is turned on first (the preceding terminal is turned on), and the remaining terminal side is turned on after synchronously verifying the voltage on the transmission line side and the voltage on the bus bar side (the subsequent terminal The so-called simultaneous reclosing method or the method of turning on with transmission line voltage and without bus voltage is adopted. The interrupter input timing of the leading terminal and the interrupter input timing of the succeeding terminal differ by the time limit for synchronization verification or the time limit for confirming that the power transmission line voltage has been established. In the case of a failure point locating device, it is in principle installed at the power supply end (usually the leading end).

従って自端側(先行端側)のし中断器が投入された時点
では対向端側(後続端側)のし中断器は未投入の状態で
あるためI形標定演算は原理上適用できない。
Therefore, when the current interrupter at the own end (leading end) is turned on, the interrupter at the opposite end (following end) is not turned on, so the I-type orientation calculation cannot be applied in principle.

後続端側のし中断器が投入された時点ではじめて工。形
標定演算が可能となる。以上のことからタイマー回路2
5の時限FT+は、同期検定又は送電線電圧確認による
先行端子と後続端子のし中断器投入時間差以上にて設定
されるべきものである。もし伺らかの要因で後続端子側
に故障点標定装置が設置される場合にはこのタイマー回
路の時限(T)は零としてよいことは言うまでもない。
It is only possible to start work when the trailing end interrupter is turned on. Shape orientation calculation becomes possible. From the above, timer circuit 2
The time limit FT+ of No. 5 should be set to be equal to or greater than the interrupter closing time difference between the preceding terminal and the succeeding terminal based on synchronization verification or transmission line voltage confirmation. It goes without saying that if a failure point locating device is installed on the subsequent terminal side for some reason, the time limit (T) of this timer circuit may be set to zero.

011)片口線(自回al)運用中の1線地絡故障に対
する標定 隣回線が休止であるため、隣回線し中断器パレット条件
23は0”となりアンド回路24の条件が不成立のため
タイマー回路25の出力は0″となっている。従って1
線地絡故障検出条件21とNOT回路26によるアンド
回路28の条件が成立し2形標定演算回路30によシ故
障点標定か行なわれる。即ち、隣回し中断器「切」によ
シI0形標定演算が原  1浬上できないために2形標
定演算回路が選択されたことKなる。ここでし中断器パ
レット条件であるが、休止端においてもし中断器の点検
等によシし中断器が「人」の状態となることも考えられ
る。従ってし中断器/4レット条件22.23に対して
は図示しない断路器の条件をANDで構成した方がよい
。更に片口  1線運用はあらかじめ知ることができる
ものだ  コから運転員の操作によシ片口線運用モード
を設定し、2形標定演算に固定するように構成しても勿
論かまわない。           1第2図は本発
明の他の実施例を示す機能ブロック図である。第2図に
おいて31は自回線の対向  1端し中断器のパレット
条件、32Fi隣回線の対向  (端し中断器のパレッ
ト条件であシ、その他は第1図の同一番号を符したもの
と同一機能である。第1図の実施例との相違は下記の通
シである。
011) Location of one-line ground fault during operation of single-ended line (own line AL) Since the adjacent line is out of service, the interrupter pallet condition 23 of the adjacent line becomes 0'' and the condition of the AND circuit 24 is not satisfied, so the timer circuit The output of 25 is 0''. Therefore 1
When the line ground fault detection condition 21 and the condition of the AND circuit 28 by the NOT circuit 26 are satisfied, the type 2 location calculation circuit 30 locates the fault point. In other words, the Type 2 orientation calculation circuit was selected because the I0 type orientation calculation could not be performed on the original position due to the adjacent interrupter being turned off. Here, regarding the interrupter pallet conditions, if the interrupter is inspected at the end of rest, it is possible that the interrupter will be in the "human" state. Therefore, for the interrupter/4-let conditions 22 and 23, it is better to construct the conditions of the disconnector (not shown) by AND. Furthermore, since the Katakuchi 1 line operation can be known in advance, it is of course possible to set the Katakuchi line operation mode by the operation of the operator and fix it to the type 2 orientation calculation. FIG. 1 is a functional block diagram showing another embodiment of the present invention. In Figure 2, 31 is the pallet condition for the interrupter at the opposite end of the own line, 32Fi is the pallet condition for the interrupter at the opposite end of the adjacent line, and the rest are the same as those marked with the same numbers in Figure 1. The difference from the embodiment shown in FIG. 1 is as follows.

(1)シ中断器パレット条件が自端子のみならず対向端
を含めて全て導入されている。
(1) The interrupter palette condition is introduced not only for the own terminal but also for all terminals including the opposite terminal.

(2)  タイマー回路25が削除されている。(2) The timer circuit 25 has been deleted.

第1図の実施例において、タイマー回路25が必要であ
った理由は対向端のし中断器の情報が得られていなかっ
たために他ならない。対向端のし中断器が投入されるタ
イミングをタイマー回j8によシ推定していたものであ
る。従って本実施例によれば、全端子のし中断器パレッ
ト条件がよシ正511に得られるため、第1図の実施例
と同等以上の幼果が得られることは云うまでもない。
In the embodiment of FIG. 1, the reason why the timer circuit 25 was necessary was because information about the interrupter at the opposite end was not obtained. The timing at which the interrupter at the opposite end is turned on is estimated by the timer j8. Therefore, according to this embodiment, since the conditions for all the terminals and the interrupter pallet can be obtained in a better manner, it goes without saying that the same or better quality of young fruit can be obtained as in the embodiment shown in FIG.

ただし、第2図の発明は第1図の発明に比べて対向端の
しゃ断器の情報を必要とする。通常の送α線においては
対向端子は数10km程も遠方にあるためこの距離を介
してし中断器情報を自端子へ天送する手段が本実施例に
は不可欠である。もし頂定対象区間に設置されている系
統保護装#等(デジタル電流差動装置等が該当)から対
向端子のし中断器情報が容易に得られる場合には、本実
施例は有効なものとなる。
However, the invention shown in FIG. 2 requires more information about the breaker at the opposite end than the invention shown in FIG. In the case of normal α-ray transmission, the opposing terminal is several tens of kilometers away, so a means for transmitting the interrupter information to the own terminal via this distance is essential to this embodiment. If the opposite terminal interrupter information can be easily obtained from the system protection device #, etc. (corresponding to digital current differential device, etc.) installed in the section subject to capping, this example will be effective. Become.

第3図は本発明の更に他の実施例を示す機能ブロック図
である。第3図において33は自回線の潮流条件(有時
”1″)34は隣回線の潮流条件(有時”1”)であシ
、その他は第1図の同一番号を符したものと同一機能で
ある。
FIG. 3 is a functional block diagram showing still another embodiment of the present invention. In Figure 3, 33 is the power flow condition of the own line (if present is "1"), 34 is the power flow condition of the adjacent line (if present is "1"), and the rest are the same as those with the same numbers in Figure 1. It is a function.

第1図の実施例との相違点は下記の通ルである。The differences from the embodiment shown in FIG. 1 are as follows.

(1)シ中断器ノンレット条件のかわシに潮流条件を導
入している。
(1) A current condition is introduced in addition to the interrupter non-let condition.

(2)  タイマー回路25が削除されている。(2) The timer circuit 25 has been deleted.

潮流条件33.34は送を線に常時流れている負荷電流
の有無を検出するものであシ、これは例えば過を流リレ
ーの原理によりすでに導入している電気量を用いて容易
に構成できる。
Power flow conditions 33 and 34 are for detecting the presence or absence of a load current that is constantly flowing in the transmission line, and can be easily configured using the electrical quantity that has already been introduced, for example, based on the principle of overcurrent relay. .

本実施例は潮流が流れている場合には少なくとも送電線
の両端のし中断器が投入されそおシ、運用状態にあるこ
とを利用して、し中断器の・ンレクト条件の代わシとし
て潮流条件を使うように構成したものである。従って本
実施例によれば前述の他の実施例に比べて、し中断器情
報を取り込まないでも路間等の効果が得られるという利
点がある。
This embodiment utilizes the fact that at least the interrupters at both ends of the transmission line are likely to be turned on when the power is flowing, and is in operation, and uses the current condition as an alternative to the disconnect condition for the interrupter. It is configured to use . Accordingly, this embodiment has an advantage over the other embodiments described above in that it is possible to obtain effects such as line spacing without taking in interrupter information.

ただし、潮流は運用されている系統に全て存在するとは
言えず、又あったとしてもそのレベルによっては潮流検
出に使用するリレーの検出レベル以下の場合に誤判定と
なるため本方式を実施するにあたっては適用される送電
線の運用状態を検討する必要がある。
However, it cannot be said that tidal currents exist in all systems in operation, and even if they exist, depending on the level, if the level is below the detection level of the relay used to detect tidal currents, an erroneous determination may be made. It is necessary to consider the operational status of the applicable transmission lines.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明では既に開示されている技
術であ゛る2形標定演算方式とI0形標定演算方式を用
いて、し中断器情報あるいは潮流情報等から系統の運用
状態を推定し、その運用状態における最適の演算方式を
選択して標定するように構成したために、永久故障時の
2回目の標定あるいは片口線運用時の標定に対しても常
に故障点を正確に標定することが可能となり、しかもサ
ージ受信方式・ぐルスレーダ方式のように高価を付帯設
備を必要としない故障点標定装置を提供できる。
As explained above, in the present invention, the operational state of the system is estimated from interrupter information or tidal flow information using the already disclosed technologies, ie, the 2-type orientation calculation method and the 10-type orientation calculation method. Since the system is configured to select and locate the optimum calculation method for the operating state, it is possible to always accurately locate the failure point even for the second orientation in the event of a permanent failure or for the orientation during single-head line operation. It is possible to provide a failure point locating device that does not require expensive incidental equipment like the surge reception method or the gust radar method.

ζこで本発明では!。形標定演算方式が原理上適用でき
ない場合に、Z形標定演算方式を用いることとしている
が、2形標定演算方式にしても、I0形標定演算方式よ
り多少精度面で劣るとはいうものの、実用上は十分な精
度を有しているため本発明の効果は大きい。
ζIn this invention! . When the shape orientation calculation method cannot be applied in principle, the Z shape orientation calculation method is used, but even if the 2 shape orientation calculation method is slightly inferior in accuracy to the I0 shape orientation calculation method, it is still practical. Since the above has sufficient accuracy, the effect of the present invention is great.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例を示す機能ブロック図、#!2
■は本発明の他の実施例を示す機能ブロック図、第3図
は更に他の実施例の機能ブロック図、第4図は本発明を
デジタル演算処理装置を用いて構成した場合のハードウ
ェア構成図、第5図はインピーダンス演算方式の原理説
明図、第6図は電流比演算方式の原理説明図である。 21・・・1線地絡故障検出条件、 22・・・自回線し中断器・fレット条件、23・・・
隣回線し中断器・fレット条件、24.27.28・・
・アンド回路、 25・・・タイマー回路、 26・・・NOT回路、2
9・・弓。形標定演算回路、30・・・2形標定演算回
路、31・・・自回線対向端し中断器/4レット条件、
32・・・隣回線対向端しゃ断器・fレット条件、33
・・・自回線潮流条件、34・・・隣回線潮流条件。 代理人 弁理士  則 近 憲 佑 同     第子丸   健
FIG. 1 is a functional block diagram showing an embodiment of the present invention, #! 2
■ is a functional block diagram showing another embodiment of the present invention, FIG. 3 is a functional block diagram of still another embodiment, and FIG. 4 is a hardware configuration when the present invention is configured using a digital arithmetic processing device. 5 is a diagram explaining the principle of the impedance calculation method, and FIG. 6 is a diagram explaining the principle of the current ratio calculation method. 21...1 line ground fault detection condition, 22...own line interrupter/flet condition, 23...
Adjacent line interrupter/flet condition, 24.27.28...
・AND circuit, 25... Timer circuit, 26... NOT circuit, 2
9. Bow. shape orientation calculation circuit, 30... type 2 orientation calculation circuit, 31... own line opposite end interrupter/4 let condition,
32... Adjacent line opposite end breaker/flet condition, 33
... Own line power flow condition, 34... Adjacent line power flow condition. Agent Patent Attorney Noriyuki Chika Yudo Ken Daishimaru

Claims (1)

【特許請求の範囲】[Claims] 電力系統の電流、電圧情報をもとに自端から故障点まで
の位置を標定する、高抵抗接地系の平行2回線送電線用
の故障点標定装置において、自端子にて2回線分の電流
、電圧値を同一時刻に周期的にサンプリングしてディジ
タル量に変換する手段と、系統故障の発生時に故障点ま
でのインピーダンスを演算して故障点を定める第1の標
定演算手段と、系統故障の発生時に2回線を構成する各
回線の零相電流の比を演算して故障点を定める第2の標
定演算手段と、系統から入力される情報をもとに系統の
運用状態を推定し前記各第1及び第2の標定演算手段を
切換える手段とを備えたことを特徴とする故障点標定装
置。
Fault point locating equipment for parallel two-circuit transmission lines in high-resistance grounding systems locates the position from the own terminal to the fault point based on the current and voltage information of the power system. , means for periodically sampling voltage values at the same time and converting them into digital quantities; first orientation calculation means for determining the fault point by calculating impedance to the fault point when a system fault occurs; A second location calculation means calculates the ratio of the zero-sequence currents of each line constituting the two lines at the time of occurrence and determines the fault point, and a second location calculation means that estimates the operating state of the system based on information input from the system and A failure point locating device comprising: means for switching between first and second locating means.
JP63131410A 1988-05-31 1988-05-31 Fault location device Expired - Lifetime JP2597653B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63131410A JP2597653B2 (en) 1988-05-31 1988-05-31 Fault location device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63131410A JP2597653B2 (en) 1988-05-31 1988-05-31 Fault location device

Publications (2)

Publication Number Publication Date
JPH01302182A true JPH01302182A (en) 1989-12-06
JP2597653B2 JP2597653B2 (en) 1997-04-09

Family

ID=15057320

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63131410A Expired - Lifetime JP2597653B2 (en) 1988-05-31 1988-05-31 Fault location device

Country Status (1)

Country Link
JP (1) JP2597653B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59165909A (en) * 1983-03-11 1984-09-19 株式会社明電舎 Parallel multichannel ground-fault protecting system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59165909A (en) * 1983-03-11 1984-09-19 株式会社明電舎 Parallel multichannel ground-fault protecting system

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