JPH01300592A - Thick-film multilayer wiring board - Google Patents
Thick-film multilayer wiring boardInfo
- Publication number
- JPH01300592A JPH01300592A JP63131041A JP13104188A JPH01300592A JP H01300592 A JPH01300592 A JP H01300592A JP 63131041 A JP63131041 A JP 63131041A JP 13104188 A JP13104188 A JP 13104188A JP H01300592 A JPH01300592 A JP H01300592A
- Authority
- JP
- Japan
- Prior art keywords
- insulating layer
- resistor
- built
- layer
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009966 trimming Methods 0.000 abstract description 13
- 230000000694 effects Effects 0.000 abstract description 4
- 239000000356 contaminant Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 57
- 238000000034 method Methods 0.000 description 10
- 239000000758 substrate Substances 0.000 description 8
- 239000000919 ceramic Substances 0.000 description 7
- 238000007639 printing Methods 0.000 description 5
- 238000007650 screen-printing Methods 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 238000010304 firing Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 2
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、厚膜多層配線基板に関する。さらに具体的に
は、印刷多層法によってセラミック基板上に電極、誘電
体絶縁層、抵抗体などを順次積層して形成された厚膜多
層配線基板に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thick film multilayer wiring board. More specifically, the present invention relates to a thick film multilayer wiring board formed by sequentially laminating electrodes, dielectric insulating layers, resistors, etc. on a ceramic substrate by a printed multilayer method.
セラミック多層配線技術のひとつとして、多層印刷法が
ある。この方法は、セラミック基板上に導体ペースト、
絶縁層材料、抵抗ペーストなどを順次印刷し、乾燥し、
焼成する工程を繰り返゛すことによって厚膜多層配線基
板を形成する方法であり、そのうちの抵抗はレーザ光で
トリミングされる。Multilayer printing is one of the ceramic multilayer wiring technologies. This method uses conductor paste on a ceramic substrate,
Insulating layer material, resistance paste, etc. are printed in sequence, dried,
This is a method of forming a thick film multilayer wiring board by repeating the firing process, and the resistance of the wiring board is trimmed with a laser beam.
第２図に示すものは、多層印刷法によって形成された従
来の厚膜多層配線基板の構造であり、アルミナ基板等の
セラミック基板１１の上に電極１２と内蔵抵抗１３を形
成し、この上に結晶化ガラスなどの誘電体絶縁層１４を
印刷によって積層しである。What is shown in FIG. 2 is the structure of a conventional thick film multilayer wiring board formed by a multilayer printing method, in which electrodes 12 and built-in resistors 13 are formed on a ceramic substrate 11 such as an alumina substrate, and A dielectric insulating layer 14 made of crystallized glass or the like is laminated by printing.
しかし、この第２図に示す厚膜多層配線基板にあっては
、内蔵抵抗１３の上でセラミック基板１１の全体にわた
って４０〜５０μ程度の均一な厚みの絶縁層１４を形成
しであるので、レーザ光によって内蔵抵抗１３のトリミ
ング作業を行う場合には、レーザ光によって厚い絶縁層
１４とともに内蔵抵抗１３のトリミングを行わなければ
ならない、この為、大きなレーザ出力を要し、内蔵抵抗
１３への熱影響が大きくなり、また切りがすが多くなっ
て、トリミング精度及び特性が悪化してしまう。However, in the thick film multilayer wiring board shown in FIG. 2, an insulating layer 14 having a uniform thickness of about 40 to 50 μm is formed over the built-in resistor 13 over the entire ceramic substrate 11, so that the laser When trimming the built-in resistor 13 using light, the built-in resistor 13 must be trimmed together with the thick insulating layer 14 using a laser beam. Therefore, a large laser output is required and there is a thermal effect on the built-in resistor 13. The amount of trimming becomes large and the number of cuts increases, resulting in deterioration of trimming accuracy and characteristics.
また、第３図に示すものは他の従来例であり、内蔵抵抗
１３の形成されている箇所には絶縁層１４を形成せず、
内蔵抵抗１３が絶縁層１４の開孔１５から露出するよう
にしたものである。この第３図の従来例では、内蔵抵抗
１３が露出しているので、レーザ光によるトリミング作
業の安定性及び精度は良好であるが、内蔵抵抗１３が露
出しているため、経時的な特性変化や異物の付着といっ
た問題があり、外部からの影響を受は易かった。Furthermore, the one shown in FIG. 3 is another conventional example in which the insulating layer 14 is not formed at the location where the built-in resistor 13 is formed.
A built-in resistor 13 is exposed through an opening 15 in an insulating layer 14. In the conventional example shown in FIG. 3, the built-in resistor 13 is exposed, so the stability and precision of the trimming operation using laser light are good. However, since the built-in resistor 13 is exposed, the characteristics change over time. There were problems such as the adhesion of foreign substances and foreign matter, and they were easily susceptible to external influences.
従来の厚膜多層配線基板にあっては、上述のように、内
蔵抵抗の上に厚い絶縁層を積層したものでは、レーザ光
によるトリミング作業の安定性及び精度に問題があり、
内蔵抵抗を露出させたものでは、内蔵抵抗保護の点で問
題があった。As mentioned above, in conventional thick-film multilayer wiring boards in which a thick insulating layer is laminated on top of a built-in resistor, there are problems with the stability and accuracy of trimming operations using laser light.
Those with exposed built-in resistors had problems in terms of protecting the built-in resistors.
したがって、本発明は、絶縁層により内蔵抵抗を覆って
抵抗保護を図りつつ、レーザ光により信頼性の高いトリ
ミング作業を行えるようにすることにある。Therefore, an object of the present invention is to cover the built-in resistor with an insulating layer to protect the resistor while enabling highly reliable trimming work to be performed using a laser beam.
〔課題を解決するための手段〕
本発明の厚膜多層配線基板は、表面に内蔵抵抗を形成さ
れた下層部の上に絶縁層を積層し、この絶縁層の内蔵抵
抗を覆う箇所の膜厚を他の箇所の膜厚よりも薄くしたこ
とを特徴としている。[Means for Solving the Problems] The thick film multilayer wiring board of the present invention has an insulating layer laminated on a lower layer portion on which a built-in resistor is formed, and the film thickness of the insulating layer at a portion covering the built-in resistor is reduced. The film is characterized by being thinner than other parts.
Ｃ作用〕
本発明にあっては、上記のごとく内蔵抵抗を覆う箇所の
絶縁層の膜厚を薄くしであるので、大きなレーザ光出力
を要せず、抵抗体に対し過度の熱影響が生じず、クラッ
クなどの発生を未然に防止でき、精度の高い安定したト
リミング作業を行うことができる。また、切りかすの発
生量も少なくなる。更に、内蔵抵抗を覆う薄い絶縁層に
よって内蔵抵抗を異物等から保護することができる。Effect C] In the present invention, as mentioned above, the thickness of the insulating layer in the area covering the built-in resistor is made thinner, so a large laser light output is not required and excessive thermal influence is caused to the resistor. First, it is possible to prevent the occurrence of cracks, etc., and to perform highly accurate and stable trimming work. Furthermore, the amount of chips generated is also reduced. Furthermore, the built-in resistor can be protected from foreign matter and the like by the thin insulating layer covering the built-in resistor.
以下、本発明の一実施例を添付図に基づいて詳述する。 Hereinafter, one embodiment of the present invention will be described in detail based on the accompanying drawings.
第１図には、三層構成の厚膜多層配線基板４の一部を示
しである。第−層Ｉは、アルミナ基板等のセラミック基
板５の上に、スクリーン印刷法によって電極６ａ等の第
−層回路６を形成したものである。第二層■は、第−層
Ｉの上に印刷、乾燥及び焼成工程を複数回繰り返して厚
さ４０〜５０μ程度の例えば結晶化ガラスからなる誘電
体絶縁層７を形成し、この絶縁層７の表面にスクリーン
印刷法によって電極８ａや内蔵抵抗１等の第二層回路８
を形成したものである。第三層■は、第二層■（下層部
２）の上に例えば結晶化ガラスの誘電体絶縁層３を形成
し、この絶縁層３の表面に電極９ａ等の第三層回路９を
形成したものである。FIG. 1 shows a part of a thick film multilayer wiring board 4 having a three-layer structure. The -th layer I is obtained by forming a -th layer circuit 6 such as an electrode 6a on a ceramic substrate 5 such as an alumina substrate by a screen printing method. The second layer (2) is formed by repeating printing, drying, and firing processes multiple times on the -layer I to form a dielectric insulating layer 7 made of, for example, crystallized glass and having a thickness of approximately 40 to 50 μm. The second layer circuit 8, such as the electrode 8a and the built-in resistor 1, is printed on the surface of the screen by screen printing.
was formed. For the third layer (2), a dielectric insulating layer 3 made of, for example, crystallized glass is formed on the second layer (2) (lower layer part 2), and a third layer circuit 9 such as an electrode 9a is formed on the surface of this insulating layer 3. This is what I did.
上記の各電極６ａ、８ａ、９ａは、Ａｕ系ペーストやＡ
ｇ系ペースト、あるいはＣｕペーストなどをスクリーン
印刷した後、絶縁層に焼き付けて形成されており、内蔵
抵抗１も酸化ルテニウム系などのペーストをスクリーン
印刷した後、絶縁層７や電極８ａに焼き付けて形成され
ている。Each of the above electrodes 6a, 8a, 9a is made of Au-based paste or
The built-in resistor 1 is formed by screen printing a paste such as ruthenium oxide or ruthenium oxide paste, and then baking it onto the insulating layer 7 or electrode 8a. has been done.
上記の第三層■の絶縁層３は、はぼ全体が絶縁特性を得
るのに必要な厚み、例えばＬ；４０〜５０μ程度の厚み
に形成されているが、内蔵抵抗１を覆う箇所３ａでは絶
縁層３は薄く形成されており、例えば１＝１０〜１０数
μ程度の厚みに形成されている。なお、この絶縁層３の
薄い箇所３ａは必ずしも内蔵抵抗ｌの全体にわたる必要
はなく、すくなくとも内蔵抵抗１のトリミングに必要な
面積だけあれば良い。このように第三層■の絶縁層３の
厚みを部分的に変える手段としては、例えば次のような
方法が考えられる。この絶縁層３は第二層■の上にペー
スト状の誘電体材料をスクリーン印刷し、乾燥し、更に
焼成する工程を複数回繰り返して形成されるものである
ので、第一回目の工程では内蔵抵抗１を覆うように第二
層■の全体に薄い絶縁層３を形成し、第二回目の工程以
後は、異なる印刷用スクリーンを用いて内蔵抵抗１以外
の箇所３ｂにのみ絶縁層３を形成する。こうすると、内
蔵抵抗１の箇所３ａでは一層となるので薄い絶縁層３と
なるが、内蔵抵抗１以外の箇所３ｂでは複数層となるの
で厚い絶縁層３となるのである。The insulating layer 3, which is the third layer (3), is formed to a thickness necessary for the entire portion to obtain insulating properties, for example, L: about 40 to 50 μm, but at the part 3a that covers the built-in resistor 1, The insulating layer 3 is formed thinly, for example, with a thickness of about 1=10 to several tens of μm. Note that the thin portion 3a of the insulating layer 3 does not necessarily have to cover the entire built-in resistor 1; it is sufficient that it has at least an area necessary for trimming the built-in resistor 1. As a means for partially changing the thickness of the insulating layer 3 of the third layer (3) in this way, the following method can be considered, for example. This insulating layer 3 is formed by repeating the process of screen printing a paste-like dielectric material on the second layer (2), drying it, and then firing it several times. A thin insulating layer 3 is formed over the entire second layer 3 so as to cover the resistor 1, and after the second step, a different printing screen is used to form the insulating layer 3 only at locations 3b other than the built-in resistor 1. do. In this case, the portion 3a of the built-in resistor 1 has a single layer, resulting in a thin insulating layer 3, but the portion 3b other than the built-in resistor 1 has multiple layers, resulting in a thick insulating layer 3.
こうして厚膜多層配線基板４が組まれた後、レーザトリ
ミングによって絶縁層３の薄い箇所３ａを通して内蔵抵
抗１にレーザ光を照射し、絶縁層３とともに内蔵抵抗１
を部分的に蒸発除去するのである。この時、内蔵抵抗１
の箇所３ａでの絶縁層３の厚みは他の箇所３ｂよりも薄
くなっているので、大きなレーザ光出力を要せず、抵抗
体に対し過度の熱影響を与えずに確実に内蔵抵抗３のト
リミングを行え、トリミング精度も向上させることがで
きるのである。しかも、上記のような方法で絶縁層３の
薄い箇所３ａを形成することにより絶縁層３の薄い箇所
３ａを十分な位置精度で形成することができ、このため
トリミング時には、絶縁層３の薄い箇所３ａの縁を位置
決め用の基準とし、絶縁層３の下の内蔵抵抗１の位置の
認識精度を向上させることができ、レーザ光の照***度
を高めることができる。一方、内蔵抵抗１は、薄いなが
らも絶縁層３によって覆われているので、異物が内蔵抵
抗１に直接付着して傷付いたり、電気特性に影響を受け
たりすることも防止できるのである。After the thick film multilayer wiring board 4 is assembled in this way, the built-in resistor 1 is irradiated with laser light through the thin part 3a of the insulating layer 3 by laser trimming, and the built-in resistor 1 is irradiated with the insulating layer 3.
is partially removed by evaporation. At this time, built-in resistor 1
The thickness of the insulating layer 3 at the location 3a is thinner than the other locations 3b, so a large laser beam output is not required and the built-in resistor 3 can be reliably heated without excessive thermal influence on the resistor. It is possible to perform trimming and improve trimming accuracy. Furthermore, by forming the thin portions 3a of the insulating layer 3 using the method described above, the thin portions 3a of the insulating layer 3 can be formed with sufficient positional accuracy. By using the edge of 3a as a reference for positioning, it is possible to improve the recognition accuracy of the position of the built-in resistor 1 under the insulating layer 3, and it is possible to improve the irradiation accuracy of the laser beam. On the other hand, since the built-in resistor 1 is covered with the insulating layer 3, although it is thin, it is possible to prevent foreign matter from directly adhering to the built-in resistor 1 and damaging it or affecting its electrical characteristics.
上記実施例では、厚膜多層配線基板は三層構造となって
いたが、これに限るものでなく、三層以上の場合でもよ
く、あるいはアルミナ等のセラミック基板の上に内蔵抵
抗を形成された二層構造のものであっても良い。In the above embodiment, the thick film multilayer wiring board has a three-layer structure, but it is not limited to this, and may have three or more layers, or a built-in resistor may be formed on a ceramic substrate such as alumina. It may have a two-layer structure.
Ｃ発明の効果〕
本発明によれば、薄い絶縁層を通して内蔵抵抗をトリミ
ングできるので、内蔵抵抗の抵抗値を高精度でかつバラ
ツキも小さく調整することができる。一方、内蔵抵抗は
露出しておらず、薄いながらも絶縁層によって覆われて
いるので、内蔵抵抗の経時的な特性変化を防止でき、ま
た異物や塵埃などが内蔵抵抗に付着することを防止する
ことができ、異物等による特性劣化を防止できる。C Effects of the Invention] According to the present invention, the built-in resistor can be trimmed through the thin insulating layer, so the resistance value of the built-in resistor can be adjusted with high precision and with small variations. On the other hand, the built-in resistor is not exposed and is covered with a thin insulating layer, which prevents the characteristics of the built-in resistor from changing over time, and also prevents foreign objects and dust from adhering to the built-in resistor. This makes it possible to prevent characteristic deterioration due to foreign matter and the like.
第１図は本発明の一実施例を示す一部破断した断面図、
第２図は従来例を示す一部破断した断面図、第３図は他
の従来例を示す一部破断した断面図である。
１・・・内蔵抵抗 ２・・・下層部
３・・・絶縁層 ３ａ・・・絶縁層の薄い箇所３ｂ
・・・絶縁層の厚い箇所FIG. 1 is a partially broken sectional view showing an embodiment of the present invention;
FIG. 2 is a partially broken sectional view showing a conventional example, and FIG. 3 is a partially broken sectional view showing another conventional example. 1... Built-in resistance 2... Lower layer part 3... Insulating layer 3a... Thin part of the insulating layer 3b
...Places where the insulation layer is thick
Claims (1)
を積層し、この絶縁層の内蔵抵抗を覆う箇所の膜厚を他
の箇所の膜厚よりも薄くしたことを特徴とする厚膜多層
配線基板。(1) An insulating layer is laminated on the lower layer on which a built-in resistor is formed, and the thickness of the insulating layer is made thinner at the part that covers the built-in resistor than at other parts. Thick film multilayer wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63131041A JPH01300592A (en) | 1988-05-28 | 1988-05-28 | Thick-film multilayer wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63131041A JPH01300592A (en) | 1988-05-28 | 1988-05-28 | Thick-film multilayer wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01300592A true JPH01300592A (en) | 1989-12-05 |
Family
ID=15048638
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63131041A Pending JPH01300592A (en) | 1988-05-28 | 1988-05-28 | Thick-film multilayer wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01300592A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006031577A3 (en) * | 2004-09-13 | 2006-06-01 | Electro Scient Ind Inc | Reduction of thermoelectric effects during laser trimming of resistors |
-
1988
- 1988-05-28 JP JP63131041A patent/JPH01300592A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006031577A3 (en) * | 2004-09-13 | 2006-06-01 | Electro Scient Ind Inc | Reduction of thermoelectric effects during laser trimming of resistors |
| GB2434253A (en) * | 2004-09-13 | 2007-07-18 | Electro Scient Ind Inc | Reduction of thermoelectric effects during laser trimming of resistors |
| US7667159B2 (en) | 2004-09-13 | 2010-02-23 | Electro Scientific Industries, Inc. | Resolving thermoelectric potentials during laser trimming of resistors |
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