JPH01297828A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH01297828A
JPH01297828A JP12778888A JP12778888A JPH01297828A JP H01297828 A JPH01297828 A JP H01297828A JP 12778888 A JP12778888 A JP 12778888A JP 12778888 A JP12778888 A JP 12778888A JP H01297828 A JPH01297828 A JP H01297828A
Authority
JP
Japan
Prior art keywords
bonding material
metal member
semiconductor device
opened
lowered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12778888A
Other languages
English (en)
Inventor
Masanobu Kawai
川合　正信
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP12778888A priority Critical patent/JPH01297828A/ja
Publication of JPH01297828A publication Critical patent/JPH01297828A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205—Shape
    • H01L2224/32057—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 産業上の利用分野 本発明は電子機器の回路構成に用いられる半導体装置に
関するものである。
従来の技術 近年、樹脂シート内に半導体装置チップを埋め込んで利
用する技術が、たとえばチップオンボードとして注目さ
れている。第３図は従来のチップオンボードの構成図を
示すものである。第３図において、１はダイスボンド金
属部材、２はアウトリード金属部材、４は半導体装置チ
ップ、５はリード線、６は接合材、７は絶縁材、８は支
持部材である。以上のように構成されたチップオンボー
ドは半導体装置チップを小型、低コストに実装する工法
として、時計、電卓等の用途に広く利用されている。
発明が解決しようとする課題 上記の従来の構成では、メモリー用集積回路。
カスタム用集積回路等、近年の半導体装置チップの大寸
法化により、ダイスボンド金属部材１の面積が増加し、
このことを−因として、半導体装置チップ４．接合材６
．金属部材１．絶縁材７．支持材８の膨脹係数差による
応力ストレスが、表面実装組立工程におけるハンダ付作
業等の熱工程で発生し、上記リード線５の切断や、接合
材６と金属部材１との剥離による熱抵抗の増加を引き起
こすことがある。また、接合材６は半導体装置チップ４
の面積が大きいほど、ダイスボンド工程において、−様
に塗布することは難しく、空気を抱き込み、この空気の
存在が、熱抵抗上昇や、クラックの原因となる欠点を有
していた。本発明は上記従来の問題点を解決するもので
半導体装置チップ寸法が太き（とも、ハンダ付工程にお
けるクラッり等の機械損傷やリード線の断線、熱抵抗の
増加のない半導体装置を提供することを目的とする。
課題を解決するための手段 この目的を達成するために、本発明は、接合材を介して
半導体チップの固着される金属部材に、端面側で開放さ
れた溝を放射線状に複数条設けた構成である。
作用 この構成によって、接合材は金属部材と絶縁部材の両部
材との接合が可能となり、おうとつの接合面は接着力を
増すとともに、放射線上の溝はダイスボンド時に接合部
へ混入した空気を外部に放出する通路となり、熱衝撃試
験によっても高い信頼性が確認された。また熱抵抗はハ
ンダリフロー工程を終えた後の測定値においても良好で
あった。
実施例 第１図は本発明の実施例装置で用いたダイスボンド金属
部材の実施例の平面図であり、ダイスボンド金属部材１
には、その外周端面倒を開放した溝部３を持っている。
第２図は半導体装置チップを接合させた要部断面図で、
接合材は半導体装置チップ面と金属部材面および絶縁部
材面とで接合する。第２図において、金属基板、ガラス
エポキシ基板、ポリイミド基板等で構成する支持部材に
、いわゆる、プリント基板８に、銅、銅＋銀メツキ、銅
＋ニッケル＋金メツキ等でなる金属部材１，２を絶縁部
材７同金属部材のパターン形成の際に、同時に、溝３を
介して、ダイレクト印刷、エツチング法で形成し、摘下
法、スタンピング法等で接合材６を配し、これを介して
、半導体装置チップ４を固着させる。
本実施例の性能を試験した結果を次に示す。
Ｘ線透視による気泡発生割合　　気泡発生なし熱衝撃試
験−６５℃（３０分）、＋１２５℃（３０分）１０００
サイクル以上 価格比　　　　　従来比と同じ リフロー半田付後の熱抵抗変化　　変化なし発明の効果 本発明によれば、ダイスボンド金属部材に外周を開放し
た溝を放射状に複数条設けることにより、ダイスボンド
の際に接合材中に残る気泡をなくし、熱抵抗を下げると
ともに、熱衝撃における熱膨脹係数差による接着力の低
下を押え信頼性の高い半導体装置を実現することができ
る。
【図面の簡単な説明】
第１図は本発明実施例装置に用いた金属部材の平面図、
第２図は本発明実施例の要部断面図、第３図は従来例の
要部断面図である。 １・・・・・・ダイスボンド金属部材、２・・・・・・
アウトリード金属部材、３・・・・・・外周を開口した
溝部、４・・・・・・半導体装置チップ、５・・・・・
・リード線、６・・・・・・接合材、７・・・・・・絶
縁部材、８・・・・・・支持部材。

Claims (1)

    【特許請求の範囲】
  1. 　接合材を介して半導体装置チップの底面を固着させる
    金属部材に、端面側で開放された溝を放射状に複数条設
    けたことを特徴とする半導体装置。
JP12778888A 1988-05-25 1988-05-25 半導体装置 Pending JPH01297828A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12778888A JPH01297828A (ja) 1988-05-25 1988-05-25 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12778888A JPH01297828A (ja) 1988-05-25 1988-05-25 半導体装置

Publications (1)

Publication Number Publication Date
JPH01297828A true JPH01297828A (ja) 1989-11-30

Family

ID=14968695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12778888A Pending JPH01297828A (ja) 1988-05-25 1988-05-25 半導体装置

Country Status (1)

Country Link
JP (1) JPH01297828A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5232532A (en) * 1991-05-27 1993-08-03 Sony Corporation Chip device bonding machine
US5641995A (en) * 1995-03-22 1997-06-24 Hewlett-Packard Company Attachment of ceramic chip carriers to printed circuit boards
US6831372B2 (en) * 2001-09-28 2004-12-14 Infineon Technologies Ag Electronic devices with semiconductor chips and a leadframe with device positions and methods for producing the same
JP2008159742A (ja) * 2006-12-22 2008-07-10 Fujitsu Component Ltd 半導体素子の実装構造

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5066165A (ja) * 1973-10-12 1975-06-04
JPS62171131A (ja) * 1986-01-23 1987-07-28 Nec Corp 半導体装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5066165A (ja) * 1973-10-12 1975-06-04
JPS62171131A (ja) * 1986-01-23 1987-07-28 Nec Corp 半導体装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5232532A (en) * 1991-05-27 1993-08-03 Sony Corporation Chip device bonding machine
US5641995A (en) * 1995-03-22 1997-06-24 Hewlett-Packard Company Attachment of ceramic chip carriers to printed circuit boards
US6831372B2 (en) * 2001-09-28 2004-12-14 Infineon Technologies Ag Electronic devices with semiconductor chips and a leadframe with device positions and methods for producing the same
JP2008159742A (ja) * 2006-12-22 2008-07-10 Fujitsu Component Ltd 半導体素子の実装構造
US7948091B2 (en) 2006-12-22 2011-05-24 Fujitsu Component Limited Mounting structure for semiconductor element

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