JPH01296856A - Synchronizing signal separating device - Google Patents

Synchronizing signal separating device

Info

Publication number
JPH01296856A
JPH01296856A JP12774388A JP12774388A JPH01296856A JP H01296856 A JPH01296856 A JP H01296856A JP 12774388 A JP12774388 A JP 12774388A JP 12774388 A JP12774388 A JP 12774388A JP H01296856 A JPH01296856 A JP H01296856A
Authority
JP
Japan
Prior art keywords
signal
output
pulse
lpf
slicer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12774388A
Other languages
Japanese (ja)
Inventor
Hideo Tsubouchi
坪内 秀雄
Yoshimitsu Saka
善光 坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP12774388A priority Critical patent/JPH01296856A/en
Publication of JPH01296856A publication Critical patent/JPH01296856A/en
Pending legal-status Critical Current

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  • Synchronizing For Television (AREA)

Abstract

PURPOSE:To form a synchronizing signal in a luminance signal and a synchronizing pulse signal with a small time difference by synthesizing the synchronizing signal delayed through an LPF with a signal passed through an HPF and a slicer. CONSTITUTION:A signal of a synchronizing pulse part only is taken out by a synchronizing pulse separating circuit 2 and a noise component is removed by an LPF. An HPF 4 is connected to an LPF3, a differential pulse is generated, this is set to a suitable level by a slicer 5 and the output is added with the output of the LPF 3 by an adder 6. The fall of the synchronizing pulse, which is the output of the adder 6, becomes the steep gradient by the differentiated output of the HPF 4.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は同期パルス分離回路により、輝度信号から同期
パルス部分を取り出し、同期パルス発生回路により同期
信号を作り出すようにした同期信号分離装置に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a synchronization signal separation device in which a synchronization pulse separation circuit extracts a synchronization pulse portion from a luminance signal and a synchronization pulse generation circuit generates a synchronization signal. .

従来の技術 従来、この種の同期分離回路は第3図に示すような構成
で、第4図の波形図のような動作をなすものであった。
2. Description of the Related Art Conventionally, this type of synchronous separation circuit has a configuration as shown in FIG. 3, and operates as shown in the waveform diagram of FIG. 4.

第3図において、端子8に入力された映像輝度信号は同
期パルス分離回路9により同期パルス部分のみ取り出さ
れ、第4図Aの波形となる。第4図Aの波形には、同期
パルスと共にノイズが含まれており、これを除去するた
めに低域フィルタ(LPF)10を同期パルス分離回路
9の後に設けている。このLPFIOの出力波形を第4
図Bに示す。そして、上記LPFIOの出力は同期パル
ス発生回路11に入力され、ここで同期信号Cが形成さ
れる。
In FIG. 3, only the sync pulse portion of the video luminance signal input to the terminal 8 is extracted by the sync pulse separation circuit 9, resulting in the waveform shown in FIG. 4A. The waveform of FIG. 4A includes noise along with the synchronization pulse, and in order to remove this noise, a low pass filter (LPF) 10 is provided after the synchronization pulse separation circuit 9. The output waveform of this LPFIO is
Shown in Figure B. The output of the LPFIO is input to the synchronization pulse generation circuit 11, where the synchronization signal C is generated.

発明が解決しようとする課題 このような従来の構成では、LPFIOを通過すること
により、ノイズ成分を除去すると共に同期パルスの立ち
下がりにおいて、なまりが生じ第4図Bのような波形に
なり、次の同期パルス発生回路11内のスレッショルド
レベルに到達するまでの時間差tが生じることとなり、
この時間差tは入力信号レベルやエンファシスの状態に
より変化してしまう。同期信号はクロマ信号系のパース
トゲートパルスを作る場合に使われており、前記時間差
tが変化すると、パーストゲートパルスのタイミングも
ずれることとなる。
Problems to be Solved by the Invention In such a conventional configuration, noise components are removed by passing through the LPFIO, and at the same time, at the falling edge of the synchronization pulse, the waveform becomes as shown in Figure 4B, resulting in the following: There will be a time difference t until the threshold level in the synchronization pulse generation circuit 11 is reached.
This time difference t changes depending on the input signal level and the emphasis state. The synchronization signal is used to create a burst gate pulse of a chroma signal system, and if the time difference t changes, the timing of the burst gate pulse will also shift.

本発明はこのような問題点を解決するもので、上記同期
パルス発生回路内のスレッショルドレベルに到達する時
間を小さくすることを目的とするものである。
The present invention is intended to solve these problems, and aims to reduce the time required to reach the threshold level in the synchronization pulse generation circuit.

課題を解決するための手段 この問題点を解決するために、本発明はLPFの出力に
高域フィルタ(HPF)とスライサとを直列に接続して
、そのスライサの出力とLPFの出力とを加算して同期
パルス発生回路に入力するようにしたものである。
Means for Solving the Problem In order to solve this problem, the present invention connects a high-pass filter (HPF) and a slicer in series to the output of the LPF, and adds the output of the slicer and the output of the LPF. The signal is input to the synchronization pulse generation circuit.

作用 本発明によると、LPFを経由して遅延された同期パル
スを、HPFおよびスライサを通過した信号と合成する
ことにより、輝度信号中の同期信号と時間差の小さい同
期パルス信号を形成することができる。
According to the present invention, by combining the sync pulse delayed through the LPF with the signal passed through the HPF and the slicer, it is possible to form a sync pulse signal with a small time difference from the sync signal in the luminance signal. .

実施例 第1図は本発明の実施例同期信号分離装置を表わすブロ
ック図であり、その各ブロックの出力波形を第2図で、
同ブロック図中のノードに対応させて、A−Eとして表
わす。第1図において、同期パルス分離回路2により同
期パルス部分のみ取り出された信号Aはノイズ成分も含
まれており、これを除去するためにLPF3に入力され
る。そして、その出力Bはノイズ成分の除去を行なうと
同時に、上記同期パルスの立ち下がりにおいてなまりが
生じている。そこで、LPF3にHPF4を接続して微
分パルスCを作りだし、これをスライサ5により適切な
レベルに設定し、その出力をLPF3の出力と加算器6
により加算する。この波形りは波形Bと波形Cの和であ
り、同期パルスの立ち下がりはHPF4の微分された出
力により急勾配になる。従って、次の同期パルス発生回
路7でスレッショルドレベルに達するまでの時間t′は
従来の方式の時の時間tと比べ極めて短(なり、輝度信
号の同期パルスAと同期信号Eとの差が小さくなる。
Embodiment FIG. 1 is a block diagram showing a synchronization signal separation device according to an embodiment of the present invention, and FIG. 2 shows the output waveforms of each block.
The nodes in the same block diagram are represented as A to E in correspondence with each other. In FIG. 1, the signal A from which only the synchronizing pulse portion is extracted by the synchronizing pulse separation circuit 2 also contains a noise component, and is input to the LPF 3 to remove this component. While the noise component is removed from the output B, at the same time, the fall of the synchronization pulse is rounded. Therefore, HPF4 is connected to LPF3 to create a differential pulse C, which is set to an appropriate level by slicer 5, and its output is combined with the output of LPF3 and adder 6.
Add by. This waveform is the sum of waveform B and waveform C, and the fall of the synchronization pulse becomes steep due to the differentiated output of HPF4. Therefore, the time t' required for the next synchronization pulse generating circuit 7 to reach the threshold level is extremely short compared to the time t in the conventional method (and the difference between the synchronization pulse A and the synchronization signal E of the luminance signal is small). Become.

発明の効果 以上のように本発明によれば輝度信号の同期パルスと極
めて時間差の小さな同期信号を得ることができる。
Effects of the Invention As described above, according to the present invention, a synchronization signal having an extremely small time difference from the synchronization pulse of a luminance signal can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す同期信号分離装置の回
路ブロック図、第2図はこの同期信号分離装置の動作を
説明する波形図、第3図は従来の同期信号分離装置の回
路ブロック図、第4図は従来の同期信号分離装置の動作
を説明する波形図である。 1.8・・・・・・輝度信号入力端子、2,9・・・・
・・同期パルス分離回路、3.10・・自・・LPF、
4・・・・・・HPF、5・・・・・・スライサ、6・
・・・・・加算器、7,11・・・・・・同期パルス発
生回路。 代理人の氏名 弁理士 中尾敏男 ほか1名第1図 第2図
FIG. 1 is a circuit block diagram of a sync signal separation device showing an embodiment of the present invention, FIG. 2 is a waveform diagram explaining the operation of this sync signal separation device, and FIG. 3 is a circuit of a conventional sync signal separation device. The block diagram and FIG. 4 are waveform diagrams illustrating the operation of a conventional synchronization signal separation device. 1.8...Brightness signal input terminal, 2,9...
...Synchronous pulse separation circuit, 3.10...Self...LPF,
4...HPF, 5...Slicer, 6...
... Adder, 7, 11 ... Synchronous pulse generation circuit. Name of agent: Patent attorney Toshio Nakao and one other person Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 輝度信号を同期パルス分離回路に入力して同期パルス部
分のみを取り出して低域フィルタを通過させたのち、高
域フィルタとスライサとを直列に経由させて、このスラ
イサの出力と上記低域フィルタの出力とを加算器により
加算し、その合成信号を同期パルス発生回路に入力する
構成をそなえた同期信号分離装置。
The luminance signal is input to the sync pulse separation circuit, only the sync pulse part is extracted, and passed through a low-pass filter.Then, the signal is passed through a high-pass filter and a slicer in series, and the output of this slicer is combined with the output of the above-mentioned low-pass filter. A synchronization signal separation device that has a configuration in which the outputs are added by an adder and the combined signal is input to a synchronization pulse generation circuit.
JP12774388A 1988-05-25 1988-05-25 Synchronizing signal separating device Pending JPH01296856A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12774388A JPH01296856A (en) 1988-05-25 1988-05-25 Synchronizing signal separating device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12774388A JPH01296856A (en) 1988-05-25 1988-05-25 Synchronizing signal separating device

Publications (1)

Publication Number Publication Date
JPH01296856A true JPH01296856A (en) 1989-11-30

Family

ID=14967588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12774388A Pending JPH01296856A (en) 1988-05-25 1988-05-25 Synchronizing signal separating device

Country Status (1)

Country Link
JP (1) JPH01296856A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03195271A (en) * 1989-12-25 1991-08-26 Matsushita Electric Ind Co Ltd Synchronizing separator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03195271A (en) * 1989-12-25 1991-08-26 Matsushita Electric Ind Co Ltd Synchronizing separator

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