JPH01268047A - Formation of polysilicon resistor - Google Patents
Formation of polysilicon resistorInfo
- Publication number
- JPH01268047A JPH01268047A JP9720188A JP9720188A JPH01268047A JP H01268047 A JPH01268047 A JP H01268047A JP 9720188 A JP9720188 A JP 9720188A JP 9720188 A JP9720188 A JP 9720188A JP H01268047 A JPH01268047 A JP H01268047A
- Authority
- JP
- Japan
- Prior art keywords
- polysilicon
- film
- resistor
- amorphous silicon
- resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 66
- 229920005591 polysilicon Polymers 0.000 title claims abstract description 65
- 230000015572 biosynthetic process Effects 0.000 title description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 16
- 238000010438 heat treatment Methods 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims description 15
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 11
- 239000012535 impurity Substances 0.000 abstract description 11
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 11
- 229910052785 arsenic Inorganic materials 0.000 abstract description 7
- 239000007789 gas Substances 0.000 abstract description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 6
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 abstract description 6
- 229910052710 silicon Inorganic materials 0.000 abstract description 6
- 239000010703 silicon Substances 0.000 abstract description 6
- 229910052751 metal Inorganic materials 0.000 abstract description 5
- 239000002184 metal Substances 0.000 abstract description 5
- 239000012299 nitrogen atmosphere Substances 0.000 abstract description 5
- 238000000137 annealing Methods 0.000 abstract description 4
- 238000005516 engineering process Methods 0.000 abstract description 4
- 239000002994 raw material Substances 0.000 abstract description 4
- 239000000758 substrate Substances 0.000 abstract description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 abstract description 3
- 229910007264 Si2H6 Inorganic materials 0.000 abstract description 2
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 abstract description 2
- 238000001459 lithography Methods 0.000 abstract description 2
- -1 Arsenic ions Chemical class 0.000 abstract 1
- 239000000126 substance Substances 0.000 abstract 1
- 239000010408 film Substances 0.000 description 37
- 239000013078 crystal Substances 0.000 description 19
- 239000000969 carrier Substances 0.000 description 10
- 238000005468 ion implantation Methods 0.000 description 6
- 238000000151 deposition Methods 0.000 description 5
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 230000001133 acceleration Effects 0.000 description 3
- 239000012298 atmosphere Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000005036 potential barrier Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013039 cover film Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/0802—Resistors only
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置の製造方法に関し、特にデジタルＩ
ＣやアナログＩＣに使用されているポリシリコン抵抗の
形成方法に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a semiconductor device.
This invention relates to a method for forming polysilicon resistors used in C and analog ICs.
従来、この種のポリシリコン抵抗の形成方法はシリコン
酸化膜上又はシリコン窒化膜上に減圧化学気相成長装置
で原料ガスにＳ ｉ Ｈ４を用いて成長温度６５０℃で
約０．２μｍの膜厚のポリシリコン膜を成長する。この
後不純物として、例えばヒ素を加速電圧７０ＫｅＶ、ド
ース１．ＯＸ １０１６ａｎ−２のイオン注入条件でポ
リシリコン膜にドープし９５０℃の窒素雰囲気中で５５
分間の熱処理を行い、不純物の活性化を行う。次にリン
グラフィ技術等を用いてポリシリコン抵抗パターンを形
成し、ポリシリコン膜上にカバー膜を堆積し、最後にポ
リシリコン膜と導伝性をとるためのメタルを堆積してポ
リシリコン抵抗を形成していた。この様にして形成した
ポリシリコン抵抗は層抵抗で約５００Ω／口で、−２５
℃から１２５℃間の温度変化をさせたときの抵抗の温度
係数は−１０００〜−２０００ｐｐｍ／℃と非常に大き
い負の温度係数をもっている。Conventionally, this type of polysilicon resistor was formed on a silicon oxide film or a silicon nitride film using a low pressure chemical vapor deposition apparatus using SiH4 as a raw material gas at a growth temperature of 650°C to a film thickness of approximately 0.2 μm. A polysilicon film is grown. After that, as an impurity, for example, arsenic is added at an acceleration voltage of 70 KeV and a dose of 1. The polysilicon film was doped under the ion implantation conditions of OX 1016an-2 and 55°C in a nitrogen atmosphere at 950°C.
Heat treatment is performed for 1 minute to activate impurities. Next, a polysilicon resistor pattern is formed using phosphorography technology, a cover film is deposited on the polysilicon film, and finally a metal is deposited to provide conductivity with the polysilicon film to form a polysilicon resistor. was forming. The polysilicon resistor formed in this way has a layer resistance of about 500 Ω/hole, and -25
The temperature coefficient of resistance when changing the temperature between 125°C and 125°C is -1000 to -2000 ppm/°C, which is a very large negative temperature coefficient.
上述した従来のポリシリコン抵抗の形成方法では、シリ
コン結晶粒の制御が難しく、所望の抵抗値が得られても
その抵抗値の温度変化に対する変化量が大きいという問
題点がある。これは一般には次の様に考えられている。The conventional method for forming a polysilicon resistor described above has the problem that it is difficult to control silicon crystal grains, and even if a desired resistance value is obtained, the amount of change in the resistance value with respect to temperature changes is large. This is generally considered as follows.
ポリシリコン膜の抵抗及び抵抗の温度変化はポリシリコ
ン膜の結晶構造とキャリアの挙動とが関係している。ポ
リシリコン膜の結晶構造はポリシリコン結晶粒とその結
晶粒界部から成っている。このうちポリシリコン結晶粒
内でのキャリアの挙動は、単結晶シリコンと類似してい
ると考えられ、温度が上昇するとキャリアの散乱確率が
高くなり抵抗は上昇する方向にある。これに対し結晶粒
界部及びその近傍の結晶欠陥を多く含む領域ではキャリ
アの捕獲準位が多く存在するため、この捕獲準位にとら
えられたキャリアは周囲のポリシリコン結晶粒子内に空
間電荷層を形成しキャリアを散乱させる。このため捕獲
されたキャリアが結晶粒界での電位を高め、電位障壁を
形成する。しかし温度が上昇すると捕獲されたキャリア
が捕獲準位より流出し上述した電位障壁が低下するため
ポリシリコン結晶粒界部及びその近傍では温度上昇に伴
って抵抗は下降する方向にある。このため従来のポリシ
リコン抵抗形成方法では、ポリシリコン膜の結晶構造、
特にポリシリコン結晶粒の大きさと結晶粒界総量を制御
しにくく、非常に多くの結晶粒界が存在するためポリシ
リコン抵抗の温度を上昇させるとポリシリコン結晶粒内
での抵抗の上昇成分よりも結晶粒界付近での抵抗の下降
成分の方が大きくなり、従来例に示した通り抵抗の温度
係数は非常に大きい負の値を示す。このためこの様なポ
リシリコン抵抗を用いるＩＣやＬＳＩではそれらのデバ
イスの温度変化に伴うデバイスの保証特性や回路設計上
のマージンなどの点で大きな負担となるなどの問題点が
生じている。The resistance of a polysilicon film and the temperature change in resistance are related to the crystal structure of the polysilicon film and the behavior of carriers. The crystal structure of a polysilicon film consists of polysilicon crystal grains and their grain boundaries. Among these, the behavior of carriers within polysilicon crystal grains is considered to be similar to that of single crystal silicon, and as the temperature rises, the scattering probability of carriers increases and the resistance tends to increase. On the other hand, there are many trapping levels for carriers in the crystal grain boundaries and regions containing many crystal defects in the vicinity, so carriers trapped in these trapping levels form a space charge layer within the surrounding polysilicon crystal grains. forms and scatters carriers. Therefore, the captured carriers increase the potential at the grain boundaries and form a potential barrier. However, as the temperature rises, the captured carriers flow out from the trap level and the above-mentioned potential barrier lowers, so that the resistance tends to decrease at and near the polysilicon crystal grain boundaries as the temperature rises. For this reason, in the conventional polysilicon resistor formation method, the crystal structure of the polysilicon film
In particular, it is difficult to control the size of polysilicon crystal grains and the total amount of grain boundaries, and since there are a large number of grain boundaries, when the temperature of polysilicon resistance is increased, the increase in resistance within the polysilicon crystal grains is The decreasing component of the resistance near the grain boundaries becomes larger, and the temperature coefficient of resistance exhibits a very large negative value as shown in the conventional example. For this reason, ICs and LSIs using such polysilicon resistors have problems such as a large burden on guaranteed characteristics of the devices and circuit design margins due to temperature changes of those devices.
本発明のポリシリコン抵抗の形成方法はシリコン酸化膜
上又はシリコン窒化膜上にノン・ドープのアモルファス
・シリコン膜を堆積し、さらにイオン注入法又はプラズ
マ・ドープ法などを用いて不純物の導入を行う。この時
、ノン・ドープのアモルファス・シリコン膜のかわりに
、７モルファ゛ス・シリコン膜堆積中に不純物をドープ
したアモルファス・シリコン膜を用いてもよい。次にポ
リシリコン結晶粒制御のための熱処理を行う。熱処理条
件は５５０℃から１２００℃の温度範囲の中で、所望の
抵抗値で抵抗の温度変化が小さくなるようなポリシリコ
ン結晶構造をもつように任意の温度で行う。熱処理雰囲
気は窒素雰囲気又はそれにかわる不活性ガス雰囲気又は
水素雰囲気中で行う。ポリシリコン結晶粒制御のための
熱処理は不純物ドープ前に行ってもよい。The method for forming a polysilicon resistor of the present invention involves depositing a non-doped amorphous silicon film on a silicon oxide film or silicon nitride film, and then introducing impurities using an ion implantation method or a plasma doping method. . At this time, instead of the non-doped amorphous silicon film, an amorphous silicon film doped with an impurity during the deposition of the 7-morphous silicon film may be used. Next, heat treatment is performed to control polysilicon crystal grains. The heat treatment is carried out at an arbitrary temperature within the temperature range of 550° C. to 1200° C. so as to obtain a polysilicon crystal structure that has a desired resistance value and a small temperature change in resistance. The heat treatment atmosphere is a nitrogen atmosphere, an inert gas atmosphere or a hydrogen atmosphere. Heat treatment for controlling polysilicon crystal grains may be performed before doping with impurities.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図（ａ）及び（ｂ）は、不純物にヒ素を用いた場合
のポリシリコン抵抗の一実施例を工程順に示す断面図で
ある。FIGS. 1(a) and 1(b) are cross-sectional views showing an example of a polysilicon resistor using arsenic as an impurity in the order of steps.
先ず、第１図（ａ）のようにシリコン基板１１の上に、
シリコン酸化膜（ＳｉＯ□）１２を形成し、その上にア
モルファス・シリコン１３を減圧化学気相成長装置（Ｌ
ＰＣＶＤ）を用いて原料ガスにＳｉＨ４又はＳｉ２Ｈ６
ガスを使用して成長温度５５０℃で約０．２μｍ堆積し
た。さらに、これを窒素雰囲気中で６００℃１２時間の
アニールを行い、ポリシリコンに変換した後に不純物の
ヒ素を加速電圧５０ＫｅＶ、 ドース５． Ｏｘ １
０ ”ｃｍ−”の条件でイオン注入を行った。ここでイ
オン注入はアニール前に行ってもよい。First, as shown in FIG. 1(a), on a silicon substrate 11,
A silicon oxide film (SiO□) 12 is formed, and amorphous silicon 13 is deposited on it using a low pressure chemical vapor deposition apparatus (L).
SiH4 or Si2H6 is added to the raw material gas using PCVD).
A thickness of about 0.2 μm was deposited at a growth temperature of 550° C. using a gas. Furthermore, this was annealed for 12 hours at 600°C in a nitrogen atmosphere to convert it into polysilicon, and then arsenic as an impurity was added at an acceleration voltage of 50 KeV and a dose of 5. Ox 1
Ion implantation was performed under the condition of 0 cm-. Here, ion implantation may be performed before annealing.
次に、リソグラフィ技術などを用いて形成したポリシリ
コン抵抗を第１図（ｂ）に示す。ここでは（ａ）図での
アモルファス・シリコンから形成したヒ素のドープされ
たポリシリコン膜１４が示されている。さらにカバーの
ＣＶＤシリコン酸化膜１５、ポリシリコンと導電性をと
るためのメタル１６が示されている。Next, FIG. 1(b) shows a polysilicon resistor formed using lithography technology or the like. Here, an arsenic-doped polysilicon film 14 formed from the amorphous silicon shown in FIG. 3A is shown. Furthermore, a CVD silicon oxide film 15 of the cover and a metal 16 for providing conductivity with polysilicon are shown.
上述してきたポリシリコン抵抗では層抵抗が約３１０Ω
／口、抵抗の温度係数は２５℃から１２５℃の間で±５
０ｐｐｍ／℃を示し、従来のポリシリコン抵抗では層抵
抗が約３００Ω／口のとき、その抵抗の温度係数が−ｌ
ｏ ｏ Ｏｐｐｍ／℃程度であることと比較すると格段
に優也ていることがわかる。The layer resistance of the polysilicon resistor mentioned above is approximately 310Ω.
/Temperature coefficient of resistance is ±5 between 25℃ and 125℃
0ppm/℃, and when the layer resistance of conventional polysilicon resistors is approximately 300Ω/portion, the temperature coefficient of the resistance is -l.
It can be seen that this is much better when compared with the fact that it is about Oppm/°C.
第２図（ａ）及び（ｂ）は実施例２を示し、不純物にポ
ロンを用いた場合のポリシリコン抵抗作成の工程順に示
す断面図である。FIGS. 2(a) and 2(b) show Example 2, and are sectional views showing the order of steps for producing a polysilicon resistor when poron is used as an impurity.
先ず、第２図（ａ）のようにシリコン基板２１の上にシ
リコン酸化膜（Ｓ ｉ Ｏｘ） ２２を形成し、その上
にアモルファス・シリコン２３を減圧化学気相成長装置
（ＬＰＣＶＤ）を用いて原料ガスに５ｉＨａ又は５ｉ２
Ｈ，ガスを使用して成長温度５５０℃で約０．２μｍ堆
積した。さらにこれを窒素雰囲気中で１０００℃、４０
分間のアニールを行いポリシリフンに変換した後に不純
物のポロンを加速電圧５０ＫｅＶ、 ドース１． Ｏ
Ｘ １０ ”ａｎ−”の条件でイオン注入を行った。こ
こでイオン注入はアニール前に行ってもよい。First, as shown in FIG. 2(a), a silicon oxide film (S i Ox) 22 is formed on a silicon substrate 21, and amorphous silicon 23 is deposited thereon using a low pressure chemical vapor deposition (LPCVD) 5iHa or 5i2 in raw material gas
The film was deposited to a thickness of about 0.2 μm at a growth temperature of 550° C. using H, gas. Furthermore, this was heated at 1000°C for 40°C in a nitrogen atmosphere.
After annealing for 1 minute to convert it into polysilicon, the impurity poron was heated at an acceleration voltage of 50 KeV and at a dose of 1. O
Ion implantation was performed under the condition of X 10 "an-". Here, ion implantation may be performed before annealing.
次に、リングラフィ技術などを用いて形成したポリシリ
コン抵抗を第２図（ｂ）い示す。ここでは（ａ）図での
アモルファス・シリコンから形成したポロンのドープさ
れたポリシリコン膜２４が示されている。さらにカバー
〇〇ＶＤシリコン酸化膜２５、ポリシリコンと導電性を
とるためのメタル２６が示されている。Next, FIG. 2(b) shows a polysilicon resistor formed using a phosphorography technique or the like. Here, a poron-doped polysilicon film 24 formed from the amorphous silicon shown in FIG. 2A is shown. Furthermore, a cover 〇〇VD silicon oxide film 25 and a metal 26 for providing conductivity with polysilicon are shown.
上述１．できた実施例２ではポリシリコンの層抵抗が約
ＩＫΩ１０、抵抗の温度係数は２５℃から１２５℃の間
で＋５０ｐｐｍ／Ｔを示し、従来のポリシリコン抵抗で
は層抵抗が約ＩＫΩ１０のとき、その抵抗の温度係数が
−１，０００〜−１５００ｐｐｍ／℃程度であることと
比較するとポリシリコン抵抗を用いた回路設計などの点
で非常に有利である７〔発明の効果〕
以上説明したように本発明は、各種ＩＣ，ＬＳＩに使即
されているポリシリコン抵抗を形成する際、はじめにア
モルファス・シリコン膜を堆積し、これを熱処理して粒
子の大きさが制御されたポリシリコン膜をもつことを特
徴とする。ポリシリフン抵抗の電気特性、主に抵抗の温
度変化は先にも述べた通りポリシリコン膜の結晶構造と
ドープされた不純物によるキャリアの挙動に関係がある
。このため抵抗の温度変化を小さくするためにはポリシ
リコン抵抗の温度を上昇させた際のポリシリコン結晶粒
子内での抵抗上昇成分とポリシリコン結晶粒界及びその
近傍に分布しているキャリアにより抵抗下降成分とが互
いに相殺する様なポリシリコン膜の構造（主に結晶粒の
大きさと結晶粒界総量との関係）にする必要があり、所
望の抵抗値でその抵抗の温度変化を小さくするためには
、それぞれの抵抗値にみ合ったポリシリコン膜構造にし
なければならない。ここで先に述べたようにシリコン酸
化膜又はシリコン窒化膜などの上にアモルファス・シリ
コン膜を堆積し熱処理を行うことによって所望のポリシ
リコン膜を得られ、その結果、従来よりも優れた抵抗の
温度係数をもつポリシリコン抵抗が形成でき、かつ回路
設計ヒの負担も軽減できる効果がある。Above 1. In Example 2, the layer resistance of polysilicon is about IKΩ10, and the temperature coefficient of resistance is +50ppm/T between 25°C and 125°C.When the layer resistance of conventional polysilicon resistor is about IKΩ10, its resistance is Compared to the temperature coefficient of about -1,000 to -1,500 ppm/°C, it is very advantageous in terms of circuit design using polysilicon resistors.7 [Effects of the Invention] As explained above, the present invention When forming polysilicon resistors used in various ICs and LSIs, the method is characterized by first depositing an amorphous silicon film and then heat-treating it to form a polysilicon film with controlled particle size. shall be. The electrical characteristics of a polysilicon resistor, mainly the temperature change in resistance, are related to the crystal structure of the polysilicon film and the behavior of carriers due to doped impurities, as described above. Therefore, in order to reduce the temperature change in resistance, when the temperature of the polysilicon resistor is increased, the resistance increases due to the resistance increasing component within the polysilicon crystal grains and the carriers distributed at and near the polysilicon crystal grain boundaries. It is necessary to create a polysilicon film structure (mainly the relationship between the size of crystal grains and the total amount of grain boundaries) such that the downward components cancel each other out, and in order to reduce the temperature change in the resistance at the desired resistance value. To achieve this, a polysilicon film structure must be created that matches each resistance value. As mentioned earlier, the desired polysilicon film can be obtained by depositing an amorphous silicon film on a silicon oxide film or silicon nitride film, etc. and performing heat treatment, resulting in a film with better resistance than before. A polysilicon resistor having a temperature coefficient can be formed, and the burden on circuit design can be reduced.
また現在のアモルファス・シリコン膜の堆積方法には、
減圧又は常圧の熱化学気相成長法、プラズマ化学気相成
長法２スパツタリング成長法、蒸着法２分子線ビーム成
長法、イオンビーム成長法などがあり、これらのいずれ
の方法を用いても本発明の効果を得ることができる。Additionally, current amorphous silicon film deposition methods include
There are methods such as reduced pressure or normal pressure thermal chemical vapor deposition, plasma chemical vapor deposition, two sputtering growth methods, vapor deposition, two molecular beam growth methods, and ion beam growth methods. The effects of the invention can be obtained.
第１図（ａ）及び（ｂ）、第２図（ａ）及び（ｂ）は本
発明方法を工程順に示す断面図である。
１１．２１・・・・・・シリコン基板、１２，２２・・
・・・・シリコン酸化膜、１３・・・・・・ヒ素をドー
プしたアモルファス・シリコン、１４・・・・・・ヒ素
をドープしたポリシリコン、１５．２５・・・・・・Ｃ
ＶＤシリコン酸化膜、１６．２６・・・・・・メタル、
２３・・・・・・ポロンをドープしたアモルファス・シ
リコン、２４・・・・・・ポロンをドープしたポリシリ
コン。
代理人 弁理士 内 原 音
竿１図
矛Ｚ図FIGS. 1(a) and (b) and FIGS. 2(a) and (b) are cross-sectional views showing the method of the present invention in the order of steps. 11.21...Silicon substrate, 12,22...
...Silicon oxide film, 13...Amorphous silicon doped with arsenic, 14...Polysilicon doped with arsenic, 15.25...C
VD silicon oxide film, 16.26...metal,
23... Amorphous silicon doped with poron, 24... Polysilicon doped with poron. Agent Patent Attorney Hara Uchi Musical Pole 1 Diagram Z
Claims (1)
シリコン膜を形成し、その後熱処理を行って多結晶化さ
せたポリシリコン膜を抵抗として用いることを特徴とす
るポリシリコン抵抗の形成方法。A method for forming a polysilicon resistor, characterized in that when forming a polysilicon resistor, an amorphous silicon film is first formed, and then a polysilicon film that is polycrystallized by heat treatment is used as the resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9720188A JPH01268047A (en) | 1988-04-19 | 1988-04-19 | Formation of polysilicon resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9720188A JPH01268047A (en) | 1988-04-19 | 1988-04-19 | Formation of polysilicon resistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01268047A true JPH01268047A (en) | 1989-10-25 |
Family
ID=14185994
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9720188A Pending JPH01268047A (en) | 1988-04-19 | 1988-04-19 | Formation of polysilicon resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01268047A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5037766A (en) * | 1988-12-06 | 1991-08-06 | Industrial Technology Research Institute | Method of fabricating a thin film polysilicon thin film transistor or resistor |
| US5783257A (en) * | 1994-06-17 | 1998-07-21 | Tokyo Electron Limited | Method for forming doped polysilicon films |
| JP2008263052A (en) * | 2007-04-12 | 2008-10-30 | Renesas Technology Corp | Method of manufacturing semiconductor device |
-
1988
- 1988-04-19 JP JP9720188A patent/JPH01268047A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5037766A (en) * | 1988-12-06 | 1991-08-06 | Industrial Technology Research Institute | Method of fabricating a thin film polysilicon thin film transistor or resistor |
| US5783257A (en) * | 1994-06-17 | 1998-07-21 | Tokyo Electron Limited | Method for forming doped polysilicon films |
| JP2008263052A (en) * | 2007-04-12 | 2008-10-30 | Renesas Technology Corp | Method of manufacturing semiconductor device |
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