JPH01255217A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH01255217A JPH01255217A JP8231988A JP8231988A JPH01255217A JP H01255217 A JPH01255217 A JP H01255217A JP 8231988 A JP8231988 A JP 8231988A JP 8231988 A JP8231988 A JP 8231988A JP H01255217 A JPH01255217 A JP H01255217A
- Authority
- JP
- Japan
- Prior art keywords
- silicon substrate
- oxide
- diffusion
- heat treatment
- diffusing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 239000004065 semiconductor Substances 0.000 title claims description 13
- 239000000758 substrate Substances 0.000 claims abstract description 37
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 35
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 35
- 239000010703 silicon Substances 0.000 claims abstract description 35
- 238000009792 diffusion process Methods 0.000 claims abstract description 16
- 238000010438 heat treatment Methods 0.000 claims abstract description 15
- 239000012535 impurity Substances 0.000 claims abstract description 14
- 238000005530 etching Methods 0.000 claims abstract description 7
- 230000001590 oxidative effect Effects 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 43
- 239000000126 substance Substances 0.000 claims description 10
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract description 10
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 abstract description 8
- 229910052796 boron Inorganic materials 0.000 abstract description 8
- 230000008021 deposition Effects 0.000 abstract description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 4
- 239000007789 gas Substances 0.000 abstract description 4
- 229910052757 nitrogen Inorganic materials 0.000 abstract description 4
- 239000001301 oxygen Substances 0.000 abstract description 4
- 229910052760 oxygen Inorganic materials 0.000 abstract description 4
- 239000000463 material Substances 0.000 abstract 3
- 239000011521 glass Substances 0.000 description 14
- 230000003647 oxidation Effects 0.000 description 11
- 238000007254 oxidation reaction Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 5
- 238000005137 deposition process Methods 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 229910001873 dinitrogen Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
Landscapes
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
この発明は、半導体装置の製造方法に関し、特にＮ型シ
リコン基板ヘボロン等のＰ型不純物を拡散し、Ｐ−Ｎ接
合を形成する場合の拡散工程を改良した半導体装置の製
造方法に関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and in particular, to a method for manufacturing a semiconductor device, and in particular to a method for diffusing a P-type impurity such as heboron into an N-type silicon substrate to form a P-N junction. The present invention relates to a method for manufacturing a semiconductor device with improved processes.
［従来の技術］
Ｐ型不純物としてボロンを用いた従来のボロン拡散工程
の一例を第４図に示す。[Prior Art] FIG. 4 shows an example of a conventional boron diffusion process using boron as a P-type impurity.
図において、まず工程（４−１）では不純物源としてボ
ロンナイトライド（Ｂ Ｎ）を用い、デボージション拡
散を実施する。このデポジション拡散工程（４−１）の
詳細を第５図に示す。In the figure, first, in step (4-1), boron nitride (BN) is used as an impurity source and deposition diffusion is performed. The details of this deposition diffusion step (4-1) are shown in FIG.
すなわち、工程（５−１）でシリコン基板を炉内に挿入
し、次いで、（５−２）で加熱温度８００℃、窒素と酸
素の混合ガス雰囲気中で約１５分間、熱処理した後、次
の工程（５−３）で同じく加熱温度８００℃、窒素、酸
素及び水素の混合カス中で約１分間熱処理する。次に、
工程（５−４）では、加熱温度を１０００℃に上げ、窒
素カス雰囲気中において、約６０分間、熱処理する。That is, in step (5-1), a silicon substrate is inserted into a furnace, and then in step (5-2), it is heat-treated at a heating temperature of 800°C in a mixed gas atmosphere of nitrogen and oxygen for about 15 minutes, and then the following process is performed. In step (5-3), heat treatment is performed for about 1 minute in a mixed gas of nitrogen, oxygen and hydrogen at a heating temperature of 800°C. next,
In step (5-4), the heating temperature is raised to 1000° C., and heat treatment is performed for about 60 minutes in a nitrogen gas atmosphere.
次の工程（５−５）では、加熱温度を８００℃まで降温
させた後、最後の工程（５−６）でシリコン基板を炉内
から取り出す。In the next step (5-5), the heating temperature is lowered to 800° C., and then in the last step (5-6) the silicon substrate is taken out from the furnace.
以上てデポジション拡散工程（４−１）を終了し、第４
図に示すデイグラス処理工程（４−２）に移る。With this, the deposition diffusion step (4-1) is completed, and the fourth
The process moves to the dayglass treatment step (4-2) shown in the figure.
すなわち、デイグラス処理工程（４−２）では、拡散炉
から引出したシリコン基板の表面に付着している不要物
を所定の希釈フッ酸で除去する。次いで、工程（４−３
）では、必要な拡散深度を得るために、１２５０℃、４
０時間程度の高温、長時間のドライブインを行なう。That is, in the day glass treatment step (4-2), unnecessary substances adhering to the surface of the silicon substrate taken out from the diffusion furnace are removed using a predetermined diluted hydrofluoric acid. Next, step (4-3
), in order to obtain the required diffusion depth, 1250℃, 4
Drive-in for a long time at high temperatures for about 0 hours.
しかしながら、上記デイグラス工程（４−２）で除去で
きない付着物がシリコン基板上に残存し、この付着物が
その後のドライブイン工程（４−３）で活性化し、不純
物源となってしまうため、ドライブイン後の正確な不純
物濃度の制御ができなかった。However, deposits that cannot be removed in the day glass step (4-2) remain on the silicon substrate, and these deposits are activated in the subsequent drive-in step (4-3) and become a source of impurities. It was not possible to accurately control the impurity concentration after immersion.
この欠点を回避するため、従来では工程（４−４）に示
すように、デイグラス工程（４−２）後、シリコン基板
を約８００℃、２０分間酸化性雰囲気中で熱処理をする
酸化処理工程を実施し、再デグラス処理工程（４−５）
を経た後、ドライブイン工程（４−６）を実施していた
。In order to avoid this drawback, conventionally, as shown in step (4-4), after the day glass step (4-2), an oxidation treatment step is performed in which the silicon substrate is heat-treated at approximately 800°C for 20 minutes in an oxidizing atmosphere. Implementation and re-deglassing process (4-5)
After passing through, the drive-in process (4-6) was carried out.
因に、第１回目のデグラス処理工程（４−２）を経た後
のシリコン基板上に残存するＢｘＳｉｙと呼ばれるエツ
チング不能な付着物の残膜は数百へであり、これが第２
回目の再デグラス工程（４−５）を実施すると、付着物
の残膜は、数十Ａ程度となり、実用上殆ど問題のない程
度まで除去できることが判明した。Incidentally, after the first degrassing process (4-2), the number of unetchable deposits called BxSiy remaining on the silicon substrate is in the hundreds, and this is the result of the second process.
When the second re-degrasping step (4-5) was carried out, the remaining film of the deposits was about several tens of amperes, and it was found that it could be removed to an extent that caused almost no problem in practical use.
［解決しようとする課題］
従来の半導体装置の製造方法においては、ボロン拡散工
程終了後、毎回ボロンの不純物濃度が均一にならず、ば
らつきが多いことに鑑み、ドライブイン工程前に酸化処
理工程、再デイグラス工程を実施しており、本来的には
不要である工程を経なければならず、工程数が増加し、
半導体装置の製造原価を引上げる一因となる等の問題点
があった。[Problem to be solved] In the conventional semiconductor device manufacturing method, the impurity concentration of boron is not uniform every time after the boron diffusion process, and there are many variations. Therefore, an oxidation treatment process, We are implementing a re-day glass process, which requires going through a process that is originally unnecessary, increasing the number of processes,
There have been problems such as increasing the manufacturing cost of semiconductor devices.
［発明の目的］
この発明は、上記のような課題を解消するためになされ
たもので、ドライブイン工程前の酸化処理工程及び再デ
イグラス処理工程を経ることなく、確実にシリコン基板
上の付着物を除去でき、製造工程の短縮により安価な半
導体装置が得られる製造方法を提供することを目的とす
る。[Purpose of the Invention] This invention was made to solve the above-mentioned problems, and it is possible to reliably remove deposits on a silicon substrate without going through an oxidation treatment process and a re-day glass treatment process before the drive-in process. It is an object of the present invention to provide a manufacturing method that can eliminate the semiconductor device and obtain an inexpensive semiconductor device by shortening the manufacturing process.
［問題点を解決するための手段］
この発明に係る半導体装置の製造方法は、Ｐ型不純物と
してのボロンをＮ型シリコン基板へ拡散するに当り、所
定の不純物原子量を拡散した後、次いでその拡散温度以
下の温度で、かつ、酸化性雰囲気中で熱処理し、拡散時
にシリコン基板に付着する物質を酸化物に変質させ、次
工程の酸化物エツチング工程で、シリコン基板上の不要
な付着物質を除去するようにしたものである。[Means for Solving the Problems] In the method for manufacturing a semiconductor device according to the present invention, when boron as a P-type impurity is diffused into an N-type silicon substrate, a predetermined amount of impurity atoms is diffused, and then the diffusion is performed. Heat treatment is performed at a temperature below that temperature and in an oxidizing atmosphere to transform the substances that adhere to the silicon substrate during diffusion into oxides, and in the next oxide etching process, unnecessary adhered substances on the silicon substrate are removed. It was designed to do so.
［作用］
この発明の半導体装置の製造方法においては、酸化処理
工程及び再デイグラス処理工程を経ることなく、１回の
デイグラス処理工程によりシリコン基板上の不要な付着
物質を完全に除去できる。[Function] In the method for manufacturing a semiconductor device of the present invention, unnecessary deposits on a silicon substrate can be completely removed by a single dayglass treatment step without going through an oxidation treatment step and a re-dayglass treatment step.
［実施例］ 以下に、この発明の詳細な説明する。[Example] The present invention will be explained in detail below.
この発明の製造工程の全体は、第１図に示すように、デ
ボジョン拡散工程（１−１）、デイグラス処理工程（１
−２）、ドライブイン工程（１−３）から成る。The entire manufacturing process of this invention is as shown in FIG.
-2) and a drive-in process (1-3).
上記のデポジション拡散工程（１−１）の詳細を第２図
に示す。Details of the above deposition and diffusion step (1-1) are shown in FIG.
第２図において、シリコン基板を炉内に挿入する工程（
２−１）ないし窒素ガス雰囲気中で８００℃まで降温す
る工程（２−５）までは、従来の工程と同様である。し
かしながら、各種の実験を通して生まれたものであるが
、次の工程（２−６）で、窒素と酸素の混合ガス中にお
いて、約８分間、熱処理するところに本発明の最大の特
徴がある。In Figure 2, the step of inserting the silicon substrate into the furnace (
The steps from 2-1) to step (2-5) of lowering the temperature to 800° C. in a nitrogen gas atmosphere are the same as the conventional steps. However, although it was developed through various experiments, the greatest feature of the present invention is that in the next step (2-6), heat treatment is performed in a mixed gas of nitrogen and oxygen for about 8 minutes.
この熱処理工程（２−６）を経て次の工程（２−７）で
炉内から取り出したりシリコン基板は、その表面の付着
物の層を殆どすべて酸化物に変質させることに成功した
。After this heat treatment step (2-6), the silicon substrate was removed from the furnace in the next step (2-7), and almost all of the layer of deposits on the surface of the silicon substrate was successfully transformed into oxides.
すなわち、上記の付着物を酸化物にすることができれば
、続く第１回のデイグラス工程（１−２）では、全てそ
の付着物をエツチングにより除去することができるので
、次のドライブイン工程（１−３）後の不純物濃度をき
わめて安定化させことができる。In other words, if the above-mentioned deposits can be made into oxides, all the deposits can be removed by etching in the subsequent first day glass step (1-2). -3) The subsequent impurity concentration can be extremely stabilized.
第３図は、上記の処理結果を示すグラフである。FIG. 3 is a graph showing the results of the above processing.
すなわち、そのグラフ左側縦軸にシリコン基板表面の表
面抵抗ρ５を採り、右側縦軸にシリコン基板上に残る除
去不能な膜厚が採ってあり、また、横軸に本発明での酸
化処理時間が採っである。That is, the vertical axis on the left side of the graph shows the surface resistance ρ5 of the surface of the silicon substrate, the vertical axis on the right side shows the thickness of the unremovable film remaining on the silicon substrate, and the horizontal axis shows the oxidation treatment time in the present invention. It is taken.
このグラフにおいて、酸化処理時間が０分では、本発明
の酸化処理を行なわない従来の工程と同様となる。In this graph, when the oxidation treatment time is 0 minutes, the process is similar to the conventional process in which the oxidation treatment of the present invention is not performed.
また、図において、曲線ｌはボロンデポジション工程（
１−１）が終了したときの変化で、本発明の処理時間が
長くなるに従い、シリコン基板の表面抵抗ρ３は除徐に
高くなっていくが、あまり大きな変化はない。In addition, in the figure, the curve l is the boron deposition process (
The change when 1-1) is completed, as the processing time of the present invention becomes longer, the surface resistance ρ3 of the silicon substrate gradually increases, but there is no significant change.
曲線２はデイグラス処理工程後のシリコン基板表面に残
存するＢｘＳ ｉ ｙといわれるエツチングにより除去
することができない不要付着物質の膜厚を示している。Curve 2 shows the thickness of an unnecessary adhering substance called BxS i y that remains on the surface of the silicon substrate after the day glass treatment process and cannot be removed by etching.
図から明らかなように、熱処理工程（２−６）で５〜１
０分の処理時間後にデイグラス処理工程（１−２）を経
ての上記の付着物質の残存膜厚は、急激に減少する。As is clear from the figure, in the heat treatment step (2-6), 5 to 1
After a treatment time of 0 minutes, the remaining film thickness of the above-mentioned adhered substance after the day glass treatment step (1-2) decreases rapidly.
曲線３はデイグラス処理工程が終了したシリコン基板表
面の表面抵抗ρ８を示し、曲線２の残存する付着物の膜
厚の減少と共に、ρ５は高くなり、やがてばらつきのな
い安定した状態となる。Curve 3 shows the surface resistance ρ8 of the silicon substrate surface after the day glass treatment process is completed, and as the film thickness of the remaining deposits in curve 2 decreases, ρ5 increases and eventually reaches a stable state with no variations.
すなわち、残存膜厚のばらつきの少なさがそのまま、ト
ライブイン工程後のシリコン基板の表面抵抗ρ５のばら
つきの少なさとなって表われている。That is, the small variation in the residual film thickness is directly reflected in the small variation in the surface resistance ρ5 of the silicon substrate after the tribe-in process.
［発明の効果］
この発明は上記のように構成したので、酸化処理工程及
び再デイグラス処理工程を経ることなく、１回のデイグ
ラス処理工程でシリコン基板上の付着物質を除去できる
ため、従来の製造工程に比較し、ボロン拡散全体の処理
工程が短縮され、従って半導体装置の製造原価の低減に
寄与するところ大であると共に、ドライブイン後のシリ
コン基板の表面抵抗を安定化させることができる等の優
れた効果がある。[Effects of the Invention] Since the present invention is configured as described above, it is possible to remove the deposited substances on the silicon substrate in one day glass treatment process without going through the oxidation treatment process and the re-day glass treatment process, which makes it possible to remove the adhered substances on the silicon substrate in one day glass treatment process, thereby making it possible to remove the adhered substances on the silicon substrate without going through the oxidation treatment process and re-day glass treatment process. The overall process for boron diffusion is shortened compared to the conventional process, which greatly contributes to reducing the manufacturing cost of semiconductor devices, as well as stabilizing the surface resistance of the silicon substrate after drive-in. It has excellent effects.
第１図は、この発明の半導体装置の製造方法の全体を示
す工程図、第２図は上記工程中、デポジション工程の詳
細を示す処理工程図、第３図は、この発明の処理工程を
実施した場合の酸化処理時間とシリコン基板の表面抵抗
及びその基板表面に生成される付着物の残存膜厚との関
係を示すグラフ、第４図は、従来の半導体装置の製造方
法の全体を示す工程図、第５図は上記従来の工程中、デ
ポジション工程の詳細を示す処理工程図である。
１−１・・・デポジション拡散工程
１−２・・・デイグラス処理工程
１−３・・・ドライブイン工程
２−６・・・酸化性雰囲気熱処理工程FIG. 1 is a process diagram showing the entire method of manufacturing a semiconductor device according to the present invention, FIG. 2 is a process diagram showing details of the deposition process in the above steps, and FIG. 3 is a process diagram showing the process steps of the present invention. FIG. 4 is a graph showing the relationship between the oxidation treatment time, the surface resistance of the silicon substrate, and the residual film thickness of deposits generated on the surface of the substrate when the oxidation treatment is carried out. Process diagram, FIG. 5 is a process diagram showing details of the deposition process in the above-mentioned conventional process. 1-1... Deposition diffusion step 1-2... Day glass treatment step 1-3... Drive-in step 2-6... Oxidizing atmosphere heat treatment step
Claims (1)
定の不純物原子量を拡散した後、次いでその拡散温度以
下の温度で、かつ、酸化性雰囲気中で熱処理し、当該拡
散時に前記シリコン基板に付着する物質を酸化物に変質
させ、次工程の酸化物エッチング工程で、前記シリコン
基板上の不要な物質を除去するようにしたことを特徴と
する半導体装置の製造方法。When diffusing a P-type impurity into an N-type silicon substrate, after diffusing a predetermined atomic weight of the impurity, heat treatment is performed at a temperature below the diffusion temperature and in an oxidizing atmosphere, so that the impurity adheres to the silicon substrate during the diffusion. 1. A method of manufacturing a semiconductor device, characterized in that the substance on the silicon substrate is transformed into an oxide, and the unnecessary substance on the silicon substrate is removed in a subsequent oxide etching process.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8231988A JPH01255217A (en) | 1988-04-05 | 1988-04-05 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8231988A JPH01255217A (en) | 1988-04-05 | 1988-04-05 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01255217A true JPH01255217A (en) | 1989-10-12 |
Family
ID=13771246
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8231988A Pending JPH01255217A (en) | 1988-04-05 | 1988-04-05 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01255217A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5334556A (en) * | 1993-03-23 | 1994-08-02 | Texas Instruments Incorporated | Method for improving gate oxide integrity using low temperature oxidation during source/drain anneal |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5969923A (en) * | 1982-10-15 | 1984-04-20 | Fuji Electric Co Ltd | Diffusing method for boron |
-
1988
- 1988-04-05 JP JP8231988A patent/JPH01255217A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5969923A (en) * | 1982-10-15 | 1984-04-20 | Fuji Electric Co Ltd | Diffusing method for boron |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5334556A (en) * | 1993-03-23 | 1994-08-02 | Texas Instruments Incorporated | Method for improving gate oxide integrity using low temperature oxidation during source/drain anneal |
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