JPH01245619A - Phase synchronizing oscillator - Google Patents
Phase synchronizing oscillatorInfo
- Publication number
- JPH01245619A JPH01245619A JP63072301A JP7230188A JPH01245619A JP H01245619 A JPH01245619 A JP H01245619A JP 63072301 A JP63072301 A JP 63072301A JP 7230188 A JP7230188 A JP 7230188A JP H01245619 A JPH01245619 A JP H01245619A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- self
- circuit
- frequency
- free
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims description 7
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 6
- 230000001360 synchronised effect Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
- 238000004891 communication Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は位相同期発振器に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a phase-locked oscillator.
通信システムの分野において、注目する信号が有する周
波数の整数倍の周波数を発生できる位相同期発振器は極
めて有用であり、又、応用範囲も広い。In the field of communication systems, phase-locked oscillators that can generate a frequency that is an integral multiple of the frequency of a signal of interest are extremely useful and have a wide range of applications.
第２図は従来の位相同期発振器の一例のブロック図であ
る。FIG. 2 is a block diagram of an example of a conventional phase-locked oscillator.
第２図において、外部からの入力信号１ｏは、位相比較
回路２の一方の入力に供給され位相比較回路２の他方の
入力には分周回路５５の出力である帰還信号１２．が供
給されている。In FIG. 2, an external input signal 1o is supplied to one input of a phase comparison circuit 2, and the other input of the phase comparison circuit 2 is supplied with a feedback signal 12. is supplied.
位相比較回路２は入力信号１ｏと帰還信号１１とを比較
し両者の位相差を出力する。フィルタ３は入力される位
相差に周波数の重みを付加した処理を行った制御入力信
号とし、可変周波数発振回路４に供給する。可変周波数
発振回路４は制御入力信号にしたがってその出力周波数
を制御され、制御された出力周波数は出力信号１３１と
して出力されると同時に、分周回路５ａで分周されて帰
還信号１２．として位相比較回路２に帰還される。The phase comparator circuit 2 compares the input signal 1o and the feedback signal 11 and outputs the phase difference between them. The filter 3 processes the input phase difference with a frequency weight and supplies it to the variable frequency oscillation circuit 4 as a control input signal. The variable frequency oscillator circuit 4 has its output frequency controlled in accordance with the control input signal, and the controlled output frequency is outputted as an output signal 131, and at the same time is divided by the frequency dividing circuit 5a to generate the feedback signal 12. The signal is fed back to the phase comparator circuit 2 as a signal.
第２図に示す従来の構成での通常の動作状態においては
、信号１０と帰還信号１２．、の位相差が所定の値に維
持され、入力信号１０の有する周波数の整数倍に等しい
周波数となるよう可変周波数発振回路４への制御入力信
号が調整され維持される。In normal operating conditions in the conventional arrangement shown in FIG. 2, the signal 10 and the feedback signal 12 . , is maintained at a predetermined value, and the control input signal to the variable frequency oscillation circuit 4 is adjusted and maintained so that the frequency is equal to an integral multiple of the frequency of the input signal 10.
しかし、自走動作時は、入力信号１０が断となるため、
通常動作時に発生している制御入力信号を維持すること
ができない。However, during self-propelled operation, the input signal 10 is disconnected, so
Unable to maintain control input signals occurring during normal operation.
上述した従来の位相同期発振器は、自走動作時の可変周
波数発振回路の出力周波数が通常動作時の出力周波数に
比べて大幅な偏差を有するという欠点がある。The conventional phase-locked oscillator described above has a drawback in that the output frequency of the variable frequency oscillator circuit during free-running operation has a large deviation compared to the output frequency during normal operation.
本発明の位相同期発振器は、外部からの入力信号と自走
動作信号とを入力して自走動作時に前記自走動作信号を
出力する選択回路と、該選択回路の出力と帰還信号とを
比較して両者の位相差を出力する位相比較回路と、前記
位相差にもとづく制御入力に応じて発振周波数が変化す
る可変周波数発振器と、該可変周波数発振器の出力を分
周した前記帰還信号と前記帰還信号のタイミング情報を
出力する分周回路と、前記タイミング情報にもとづき前
記帰還信号の位相に対して予め設定された位相差を有す
る前記自走動作信号を出力する自走動作信号発生回路と
を含んで構成される。The phase-locked oscillator of the present invention includes a selection circuit that inputs an external input signal and a free-running operation signal and outputs the free-running operation signal during free-running operation, and compares the output of the selection circuit with a feedback signal. a phase comparison circuit that outputs the phase difference between the two; a variable frequency oscillator whose oscillation frequency changes according to a control input based on the phase difference; the feedback signal obtained by dividing the output of the variable frequency oscillator; A frequency dividing circuit that outputs signal timing information, and a free-running operation signal generation circuit that outputs the free-running operation signal having a preset phase difference with respect to the phase of the feedback signal based on the timing information. Consists of.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例のブロック図である。FIG. 1 is a block diagram of one embodiment of the present invention.
第１図に示すように、本実施例は前述した第２図の位相
同期発振器に選択回路１と、自走動作信号発生回路６と
を追加し、分周回路５からのタイミング情報にもとづき
自走動作信号発生回路６は自走動作信号を発生し、自走
動作時に選択回路１が入力信号の代りに自走動作信号を
選択できるようにした点が第２図の従来例と異なり、そ
の他の点は前述した第２図の位相同期発振器と同様であ
り説明を省略する。As shown in FIG. 1, this embodiment adds a selection circuit 1 and a free-running operation signal generation circuit 6 to the phase-locked oscillator shown in FIG. The difference from the conventional example shown in FIG. 2 is that the running operation signal generation circuit 6 generates a free-running operation signal, and the selection circuit 1 can select the free-running operation signal instead of the input signal during free-running operation. This point is the same as that of the phase synchronized oscillator shown in FIG. 2 described above, and the explanation thereof will be omitted.
第１図において、分周回路５は可変周波数発振回路４の
出力を分周して帰還信号１２を出力すると同時に帰還信
号のタイミング情報を自走動作信号発生回路６に供給す
る。In FIG. 1, a frequency divider circuit 5 divides the output of the variable frequency oscillation circuit 4 to output a feedback signal 12, and at the same time supplies timing information of the feedback signal to a free-running operation signal generation circuit 6.
自走動作信号発生回路６は帰還信号１２に対し予め設定
した北軍の所定の位相差を有する自走動作信号１１を発
生し、選択回路１の一方の入力に印加する。The free-running operation signal generating circuit 6 generates a free-running operation signal 11 having a predetermined phase difference of the northern force with respect to the return signal 12, and applies it to one input of the selection circuit 1.
選択回路１の他の一方の入力には外部から供給される入
力信号１０が供給され、通常動作時には入力信号１０が
選択され、自走動作時には自走動作信号１１が選竺され
て位相比較回路２に選択した結果の信号を供給する。The input signal 10 supplied from the outside is supplied to the other input of the selection circuit 1, and the input signal 10 is selected during normal operation, and the free-running operation signal 11 is selected during free-running operation, and the phase comparator circuit selects the input signal 10. A signal resulting from the selection is supplied to 2.
ここで、通常動作時における入力信号１０と帰還信号１
２の間の位相差と同量の位相差となるように、自走動作
信号１１と帰還信号１２を自走動作信号発生回路６によ
って関係づける。Here, input signal 10 and feedback signal 1 during normal operation
The free-running operation signal 11 and the feedback signal 12 are related to each other by the free-running operation signal generating circuit 6 so that the phase difference is the same as the phase difference between the two.
これにより、自走動作を行わせるために選択回路１によ
って自走動作信号１１を選択した場合、位相比較回路２
の一方の入力に印加される帰還信号１２と他の一方の入
力に印加される選択回路１からの出力の自走動作信号１
１どの位相関係が、通常動作時の入力信号１０と帰還信
号１２との位相関係とほぼ同じになるため、通常動作時
の出力信号１３の周波数と同じ周波数に自走動作時の出
力信号の周波数を維持、できる。As a result, when the selection circuit 1 selects the free-running operation signal 11 to perform the free-running operation, the phase comparison circuit 2
A feedback signal 12 applied to one input of the output signal 1 of the selection circuit 1 and a free-running operation signal 1 of the output from the selection circuit 1 applied to the other input of the
1. Since the phase relationship is almost the same as that between the input signal 10 and feedback signal 12 during normal operation, the frequency of the output signal during free-running operation is the same as the frequency of the output signal 13 during normal operation. can be maintained.
以上説明したように本発明は、通常動作時における出力
信号の周波数と同等の周波数に自走動作時の出力信号を
維持できる効果が、ある。As explained above, the present invention has the advantage that the output signal during free-running operation can be maintained at the same frequency as the frequency of the output signal during normal operation.
第１図は本発明の一実施例のブロック図、第２図は従来
の位相同期発振、器の一例のブロック図である。
１・・・選択回路、２・・・位相比較回路、３・・・フ
ィル６一
夕、４・・可変周波数発振回路、５，５ａ・・・分周回
路、６・・・自走動作信号発生回路、１０・・・入力信
号、１１・・・自走動作信号、１２，１２．・・・帰還
信号、１３．１３．・・・出力信号。FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of an example of a conventional phase synchronized oscillation device. DESCRIPTION OF SYMBOLS 1... Selection circuit, 2... Phase comparator circuit, 3... Fill 6 overnight, 4... Variable frequency oscillation circuit, 5, 5a... Frequency dividing circuit, 6... Free-running operation signal Generation circuit, 10... Input signal, 11... Self-running operation signal, 12, 12. ...Feedback signal, 13.13. ...Output signal.
Claims (1)
作時に前記自走動作信号を出力する選択回路と、該選択
回路の出力と帰還信号とを比較して両者の位相差を出力
する位相比較回路と、前記位相差にもとづく制御入力に
応じて発振周波数が変化する可変周波数発振器と、該可
変周波数発振器の出力を分周した前記帰還信号と前記帰
還信号のタイミング情報を出力する分周回路と、前記タ
イミング情報にもとづき前記帰還信号の位相に対して予
め設定された位相差を有する前記自走動作信号を出力す
る自走動作信号発生回路とを含むことを特徴とする位相
同期発振器。A selection circuit that inputs an external input signal and a free-running operation signal and outputs the free-running operation signal during free-running operation, and compares the output of the selection circuit with a feedback signal and outputs a phase difference between the two. a variable frequency oscillator whose oscillation frequency changes according to a control input based on the phase difference; a feedback signal obtained by dividing the output of the variable frequency oscillator; and a component that outputs timing information of the feedback signal. A phase synchronized oscillator comprising: a cycle circuit; and a free-running operation signal generation circuit that outputs the free-running operation signal having a preset phase difference with respect to the phase of the feedback signal based on the timing information. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63072301A JPH01245619A (en) | 1988-03-25 | 1988-03-25 | Phase synchronizing oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63072301A JPH01245619A (en) | 1988-03-25 | 1988-03-25 | Phase synchronizing oscillator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01245619A true JPH01245619A (en) | 1989-09-29 |
Family
ID=13485310
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63072301A Pending JPH01245619A (en) | 1988-03-25 | 1988-03-25 | Phase synchronizing oscillator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01245619A (en) |
-
1988
- 1988-03-25 JP JP63072301A patent/JPH01245619A/en active Pending
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