JPH01241875A - Superconductor-semiconductor hybrid electronic circuit - Google Patents
Superconductor-semiconductor hybrid electronic circuitInfo
- Publication number
- JPH01241875A JPH01241875A JP63070604A JP7060488A JPH01241875A JP H01241875 A JPH01241875 A JP H01241875A JP 63070604 A JP63070604 A JP 63070604A JP 7060488 A JP7060488 A JP 7060488A JP H01241875 A JPH01241875 A JP H01241875A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- electronic circuit
- superconductor
- josephson junction
- superconducting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 23
- 239000002887 superconductor Substances 0.000 claims abstract description 6
- 239000000463 material Substances 0.000 abstract description 6
- 229910000661 Mercury cadmium telluride Inorganic materials 0.000 abstract description 4
- 230000008878 coupling Effects 0.000 abstract description 4
- 238000010168 coupling process Methods 0.000 abstract description 4
- 238000005859 coupling reaction Methods 0.000 abstract description 4
- 239000000203 mixture Substances 0.000 abstract description 3
- 229910002480 Cu-O Inorganic materials 0.000 abstract 2
- 230000001133 acceleration Effects 0.000 abstract 1
- 230000010354 integration Effects 0.000 description 4
- 230000003321 amplification Effects 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電子回路に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to electronic circuits.
従来の電子回路には、代表的なものとして半導体回路と
超伝導回路とかある。半導体回路は消費電力が比較的に
大きく、熱の発生によって原理的に集積度か限定される
。一方超伝導のジョセフソン回路は素子に電流増幅機能
かないため回路構成が難しく、素子レベルて高速ても複
雑な回路て高速を実現するのは難しい。Typical conventional electronic circuits include semiconductor circuits and superconducting circuits. Semiconductor circuits consume relatively large amounts of power, and their degree of integration is theoretically limited by the generation of heat. On the other hand, superconducting Josephson circuits are difficult to configure because their elements do not have current amplification functions, and even if they are fast at the element level, it is difficult to achieve high speeds with complex circuits.
以上述べたように、従来の電子回路のうち半導体回路て
は消費電力によって集積度が限定される欠点があり、一
方ジョセフソン回路ではジョセフソン素子に電流増幅機
能か備わっていないため全体として複雑な回路では低速
になってしまう。As mentioned above, among conventional electronic circuits, semiconductor circuits have the disadvantage that the degree of integration is limited by power consumption, while in Josephson circuits, the Josephson element does not have a current amplification function, so the overall complexity is high. The circuit becomes slow.
最近高温超伝導体の発見によってエネルギーギャップの
大きなジョセフソン接合が出来ることが分った。又化合
物半導体系てバンドギャップの狭い材料をベースに用い
た論理回路を低温で動作させると論理振幅を小さく出来
ることか分った。The recent discovery of high-temperature superconductors has shown that Josephson junctions with large energy gaps can be formed. It has also been found that the logic amplitude can be reduced by operating a logic circuit based on a material with a narrow bandgap, such as a compound semiconductor, at a low temperature.
本発明の目的は、高速・高集積の集積回路を実現できる
電子回路を提供することにある。An object of the present invention is to provide an electronic circuit that can realize a high-speed, highly integrated circuit.
本発明の電子回路は、超伝導素子と、前記超伝導素子の
エネルギーギャップと高々１桁相違するバンドギャップ
の半導体素子とを混用して構成されたちのてあり、超伝
導−半導体混成電子回路と称すべきものである。The electronic circuit of the present invention is constructed using a mixture of a superconducting element and a semiconductor element whose band gap differs by at most an order of magnitude from the energy gap of the superconducting element, and is a superconducting-semiconductor hybrid electronic circuit. It is something that should be called.
次に本発明の実施例について図面を参照して説明する。 Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の第１の実施例の回路図である。FIG. 1 is a circuit diagram of a first embodiment of the present invention.
この実施例は通常ＣＭＬ （カレント・モード・ロジッ
ク（ｃｕｒｒｅｎｔ ｍｏｄｅ ｌｏｇｉｃ））として
知られている高速の回路形式を超伝導デバイスの使用に
よって改良したものである。抵抗１，２に夫々トランジ
スタ３，４が直列につながり、トランジスタのエミッタ
が弱結合形のジョセフソン接合５によって結合され負の
電源−ＶＣＣにつながっている。接地レベルは６である
。ＶＲは参照電圧、■Ｉｌｌは入力電圧、出力端子はＸ
ｌとＸ２である。This embodiment is an improvement on a high speed circuit type commonly known as CML (current mode logic) through the use of superconducting devices. Transistors 3 and 4 are connected in series with resistors 1 and 2, respectively, and the emitters of the transistors are coupled through a weakly coupled Josephson junction 5 and connected to a negative power supply -VCC. The ground level is 6. VR is the reference voltage, ■Ill is the input voltage, and the output terminal is X
1 and X2.
ここてトランジスタにはＨｇ＋−ｘｃｄｘＴｅをエミッ
タ、ベース２コレクタの材料として用いる。ベースとコ
レクタてｘ ＝ ０．２とすると、ベースとコレクタの
バンドギャップは約６６ｍｅＶになりエミッタではｘ
＝ ０．２１にするとバンドギャップは８５ｍｅＶにな
り、広いバンドギャップのエミッタになる。エミッタへ
のトナーのドーピングは１０１８ｃｍ−３、ベースのア
クセプターのドーピングは１０１７ ｃｍ−３、コレク
タへのドナーのドーピングは１０１６ｃｍ−３とする。Here, in the transistor, Hg+-xcdxTe is used as the emitter, base 2 collector material. If x = 0.2 between the base and collector, the bandgap between the base and collector is about 66 meV, and at the emitter x
= 0.21, the band gap becomes 85 meV, resulting in a wide band gap emitter. The toner doping in the emitter is 1018 cm-3, the acceptor doping in the base is 1017 cm-3, and the donor doping in the collector is 1016 cm-3.
この時ＣＭＬ回路の論理振幅はベースを構成するＨｇ、
）、８ＣｄＯ，２Ｔｅのバンドギャップの約手分位の４
５ｍｅＶに選ぶことが出来る。At this time, the logic amplitude of the CML circuit is Hg, which forms the base,
), 4, which is approximately one digit of the bandgap of 8CdO, 2Te.
You can choose 5meV.
次にジョセフソン接合５には弱結合形のものを用い材料
としてはＹ−Ｂ−Ｃｕ−０を用いる。弱結合はトライエ
ツチングでパターニングすることにより実現できる。こ
の時弱結合接合の材料の超伝導体のエネルギーキャップ
は３０〜４０ｍｅＶか観測されている。従ってこの辺り
の電圧まではジョセフソン接合はほぼ定電流源と考える
ことか出来る。Next, the Josephson junction 5 is of a weak coupling type, and Y-B-Cu-0 is used as the material. Weak coupling can be realized by patterning by tri-etching. At this time, it has been observed that the energy cap of the superconductor material of the weakly coupled junction is 30 to 40 meV. Therefore, up to this voltage, the Josephson junction can be considered almost a constant current source.
従ってＣＭＬの論理振幅に対して、ジョセフソン接合５
は定電流源として動作する。Therefore, for the logic amplitude of CML, Josephson junction 5
operates as a constant current source.
ジョセフソン接合の定電流源では電位低下がないので、
ＣＭＬ回路の論理振幅が電源と接地線間のフルスイング
になるので無駄な電力消費はなく低電圧化出来る。しか
もこの時にはＣＭＯ８回路との結合か容易である。Since there is no potential drop in the Josephson junction constant current source,
Since the logic amplitude of the CML circuit is a full swing between the power supply and the ground line, there is no wasteful power consumption and the voltage can be reduced. Moreover, in this case, it is easy to combine with the CMO8 circuit.
以上の説明で明らかなように、この実施例はＹ−Ｂ−Ｃ
ｕ−０を用いた弱結合形のジョセフソン接合５と、この
ジョセフソン接合を形成する材料のエネルギーギャップ
３０〜４０ｍｅＶと同程度のバンドギャップ６６〜８５
ｍｅ■の半導体ＨｇＣｄＴｅを用いたトランジスタとを
混用して構成された超伝導−半導体混成電子回路であり
、同時にＨｇＣｄＴｅ ）ランジスタ（デバイス構造そ
のものはＳｉ）ランジスタと同じでよい）で構成された
差動回路の定電流源として信号振幅と同じ程度のエネル
ギーキャップをもった超伝導体Ｙ−Ｂ−Ｃｕ−０による
弱結合形のジョセフソン接合を用いたものである。As is clear from the above explanation, this example
A weakly coupled Josephson junction 5 using u-0 and a band gap of 66 to 85, which is similar to the energy gap of 30 to 40 meV of the material forming this Josephson junction.
It is a superconducting-semiconductor hybrid electronic circuit composed of a transistor using the semiconductor HgCdTe of me■, and at the same time a differential circuit composed of a HgCdTe) transistor (the device structure itself may be the same as a Si transistor). As the constant current source of the circuit, a weakly coupled Josephson junction made of superconductor Y-B-Cu-0 having an energy cap of the same magnitude as the signal amplitude is used.
半導体素子と超伝導素子とか同程度のエネルギーキャッ
プをもっているので両者に動作電圧上の差かあまりない
。従って、バッドキャップの小さい半導体を使うと消費
電力を少なくてき、集積度向上の制約が緩和される。又
、半導体素子の電流増幅機能を利用できるので全体とし
て超伝導回路より簡単になる。高速化そのものは、半導
体素子によって限界づけられるとはいえ、低消費電力に
より素子サイズの縮少か可能となる。従って、高集積化
及び高速化の両方の目的を達成できる。Semiconductor elements and superconducting elements have similar energy caps, so there is not much difference in operating voltage between them. Therefore, if a semiconductor with a small bad cap is used, power consumption will be reduced, and restrictions on increasing the degree of integration will be relaxed. In addition, since the current amplification function of semiconductor elements can be used, the circuit as a whole is simpler than a superconducting circuit. Although the speed increase itself is limited by the semiconductor device, it is possible to reduce the device size due to low power consumption. Therefore, the objectives of both high integration and high speed can be achieved.
以上説明したように本発明は、エネルギーギャップが高
々１桁程度しか相違しない半導体素子と超伝導素子とて
電子回路を構成することにより、低消費電力で高集積化
可能な電子回路を実現てきる効果かある。As explained above, the present invention realizes an electronic circuit that can be highly integrated with low power consumption by configuring the electronic circuit using semiconductor elements and superconducting elements whose energy gaps differ by at most one order of magnitude. It's effective.
【図面の簡単な説明】
第１図は本発明の一実施例を示す回路図てある。
１．２・・・抵抗、３．４・・・トランジスタ、５・・
・ジョセフソン接合、６・・・接地端子。
代理人 弁理士 内 原 晋
千 １ 閃BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram showing one embodiment of the present invention. 1.2...Resistor, 3.4...Transistor, 5...
・Josephson junction, 6...ground terminal. Agent Patent Attorney Shinchi Uchihara 1 Sen
Claims (2)
ップと高々１桁相違するバンドギャップの半導体素子と
を混用して構成されていることを特徴とする超伝導−半
導体混成電子回路。(1) A superconducting-semiconductor hybrid electronic circuit comprising a superconducting element and a semiconductor element having a bandgap that is at most one order of magnitude different from the energy gap of the superconducting element.
て信号振幅と同程度のエネルギーギャップを持った超伝
導体による弱結合形のジョセフソン接合を用いたことを
特徴とする超伝導−半導体混成電子回路。(2) A superconductor characterized by using a weakly coupled Josephson junction made of a superconductor with an energy gap comparable to the signal amplitude as a constant current source for a differential circuit composed of semiconductor elements. Semiconductor hybrid electronic circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63070604A JPH01241875A (en) | 1988-03-23 | 1988-03-23 | Superconductor-semiconductor hybrid electronic circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63070604A JPH01241875A (en) | 1988-03-23 | 1988-03-23 | Superconductor-semiconductor hybrid electronic circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01241875A true JPH01241875A (en) | 1989-09-26 |
Family
ID=13436344
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63070604A Pending JPH01241875A (en) | 1988-03-23 | 1988-03-23 | Superconductor-semiconductor hybrid electronic circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01241875A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6051846A (en) * | 1993-04-01 | 2000-04-18 | The United States Of America As Represented By The Secretary Of The Navy | Monolithic integrated high-Tc superconductor-semiconductor structure |
-
1988
- 1988-03-23 JP JP63070604A patent/JPH01241875A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6051846A (en) * | 1993-04-01 | 2000-04-18 | The United States Of America As Represented By The Secretary Of The Navy | Monolithic integrated high-Tc superconductor-semiconductor structure |
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