JPH01200790A - Additional memory control circuit - Google Patents

Additional memory control circuit

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Publication number
JPH01200790A
JPH01200790A JP63024267A JP2426788A JPH01200790A JP H01200790 A JPH01200790 A JP H01200790A JP 63024267 A JP63024267 A JP 63024267A JP 2426788 A JP2426788 A JP 2426788A JP H01200790 A JPH01200790 A JP H01200790A
Authority
JP
Japan
Prior art keywords
write
memory
muse
data
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63024267A
Other languages
Japanese (ja)
Inventor
Takehiko Asano
武彦 浅野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP63024267A priority Critical patent/JPH01200790A/en
Publication of JPH01200790A publication Critical patent/JPH01200790A/en
Pending legal-status Critical Current

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  • Television Signal Processing For Recording (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

PURPOSE:To instantaneously update a high fidelity still picture without fading by inhibiting from writing to an external memory while a fading remains in the output of an MUSE decoder based on the output of a movement discrimination means. CONSTITUTION:A reproduced MUSE signal is inputted from a video disk player A to an MUSE decoder B. A control data detection circuit 10 detects the change of still picture information by generating movement detection information in control data on a decoder B and a write inhibition signal generation circuit 15 inputs the write inhibition signal of the pulse width of five frames to the write control circuit 17 of an additional memory C as the detection of the movement detection information. The circuit 17 inhibits the write action of a picture memory 16 while the write inhibition signal is inputted. Consequently, the memory 16 continues reading as keeping stored the still picture before the change and starts writing when moving picture data are no longer contained. Thus, simultaneous data comprising of only the still picture data are written in the memory 16 and the fading of the still picture is prevented.

Description

【発明の詳細な説明】 (イ] 産業上の利用分野 本発明は高品位静止画ファイルシステムの追加メモリ制
御回路の改良に関するり (ロ) 従来の技術 高品位静止画映像信号を帯域圧縮して成る所謂M[JS
E信号をビデオディスクレコードの記録トラック上に連
続記録し、再生に際しM[JSEデコーダを用いて高品
位映倫信号を再形成する高品位静止画ファイルシステム
に付いては、例えば特開昭61−191592号公報(
HO4N  9/81)等に提案されている。
[Detailed description of the invention] (a) Industrial application field The present invention relates to an improvement of an additional memory control circuit for a high-definition still image file system (b) Conventional technology Band compression of a high-definition still image video signal The so-called M[JS
Regarding a high-quality still image file system that continuously records the E signal on the recording track of a video disc record and regenerates the high-quality video signal using an M[JSE decoder during playback, see, for example, Japanese Patent Laid-Open No. 191592-1983. Publication (
HO4N 9/81), etc.

(ハ)発明が解決しようとする課題 上述する静止画ファイル再生システムの場合、高品位静
止画映像信号はMUSEデコーダ内で所望の再生MUS
E信号が入力された時点で、内蔵メモリの記憶を中断せ
しめる必要があり、動画形成を目的とするMUSEデコ
ーダに大幅な変更を必要とする。
(c) Problems to be Solved by the Invention In the case of the above-mentioned still image file playback system, the high-quality still image video signal is sent to the desired playback MUS in the MUSE decoder.
When the E signal is input, it is necessary to interrupt the storage in the built-in memory, which requires significant changes to the MUSE decoder intended for forming moving images.

そこで、再生MUSFデコーダより得られる高品位映像
信号を外部メモリにて選択記憶する方法が考えられるが
、所望の再生MUSE信号が入力されて少くとも4フイ
ールド全経過でる迄は、MUSEデコーダが先行する再
生MUSE信号と相関がないがないことを検出して動画
処理をするため得られる高品位映像信号の解像度は十分
確保出来ない。
Therefore, a method can be considered in which the high-quality video signal obtained from the reproduction MUSF decoder is selectively stored in an external memory, but the MUSE decoder takes the lead until the desired reproduction MUSE signal is input and at least all four fields have elapsed. Since moving image processing is performed by detecting the presence or absence of correlation with the reproduced MUSE signal, the resolution of the obtained high-quality video signal cannot be ensured sufficiently.

そこで、所望の再生MUSE信号が導出されMUSEデ
コーダが形成した動画データを導出する期間は迫力aメ
モリに高品位映像信号を入力しない様に構成丁れげ、モ
ニタ画面がボケることなく瞬間的に切換えられ一4at
c復敗丑士 (勾 課題全解決するための手段 本発明では、再生される静市画情報の変更iMUSEデ
コーダ内で画像の動きとして検出する動き識別手段と、
該動き峯、I8’+手段の出力に基づいて書込禁止信号
を発する書込禁I五信号発生回路と、書込禁止信号に基
づいてMUSEデコーダの出力の追加画像メモリへの書
込を4フイ一ルド以上の期間に亘って禁+hfる書込制
御回路とを、それぞれ配することを特徴とする。
Therefore, during the period when the desired reproduction MUSE signal is derived and the video data formed by the MUSE decoder is derived, the configuration is set so that high-quality video signals are not input to the powerful a memory, and the monitor screen is instantaneously maintained without blurring. Switched to 4at
Means for Solving All Problems In the present invention, a motion identification means detects the change of the still image information to be reproduced as a motion of the image within the iMUSE decoder;
A write-inhibit I5 signal generation circuit generates a write-inhibit signal based on the output of the I8'+ means, and writes the output of the MUSE decoder to the additional image memory based on the write-inhibit signal. The present invention is characterized in that a write control circuit that prohibits writing for a period longer than one field is provided.

四作 用 よって本発明によれば、靜しヒ画情報の変更をMUSE
デコーダ内の動きm別手段が検出し、MUSEデコーダ
の出方にポゲがある間外部メモリへの書込が禁止される
Therefore, according to the present invention, the silent image information can be changed by MUSE.
Movement within the decoder is detected by separate means, and writing to the external memory is prohibited while there is a bulge at the exit of the MUSE decoder.

N 実施例 以下、本発明を図示せる一実施例に従い説明する。N Example Hereinafter, the present invention will be explained according to an illustrative embodiment.

本実施例は、第1図の回路ブロック図より明らかな様に
−ビデオディスク7ル−ヤ(AlとMUSFデコーダ(
B)とMUSFデコーダ内に組込1れた追加メモリュニ
フ1−(c)とモニタTV(D)とを組合わせて高品位
静+h画ファイルシステムに本発明を採用するものであ
る。
As is clear from the circuit block diagram of FIG.
The present invention is applied to a high-quality still + h image file system by combining B), an additional memory nifter 1-(c) incorporated in the MUSF decoder, and a monitor TV (D).

以下−まず本実施例の一般的な構成に付いて説明する。Below - First, the general configuration of this embodiment will be explained.

ビデオディスクプレーヤ(A)に装着されるビデオディ
スクは、高品位静l上画情報をMUSEエンコーダ(図
示省略)を介してMUSE信号に変換し、更[FM変調
した信号を記録信号してスパイフル状の記録トラック全
形成しており、約100フレーム単位で多数の高品位静
【E画情報を記録している。
The video disc loaded in the video disc player (A) converts high-quality still image information into a MUSE signal via a MUSE encoder (not shown), and then converts the FM-modulated signal into a recording signal into a spiffle shape. All recording tracks are formed, and a large amount of high-quality still image information is recorded in units of approximately 100 frames.

この静1五画ビデオディスクが、ビデオディスク7”’
−ヤ(A 1.1’着されてビ・ンクアップ゛アク士ス
手段121がビ7クア、・ノフーを記録トラ。ツクの始
端にアクセスせしめ、信号処理回路LI+はビフクアツ
ア出方をFM復調して再生MUSE信号を形成導出する
D 再生MUSEi号を入力するM[JSEデコーダは、A
D変換回路(;引にて再生MUSE信号をAD変換する
一、AD変換出カは、ノイズ低減回路+4+を介して2
フイールド前のAD変換データと共にフィールドメモリ
Ai5+に入力され、次のフィールドメモIJIi3(
6)iK転送され、更に次のフィールドでフィールドメ
モリ8 (6I:り読出される。、l前記両7)=ルド
メモ’) 15+t6(ば、高品位映像信号の形成のた
めに4フイ一ルド分のAD変換出カ全常に記憶する□フ
レーム間補間回路(111け入力されるADf換出力出
力出されたAD変換出方全合成して高解像度の静上画デ
ータを形成する。またフィールド内袖開回路f121は
入力されるAD変換出力のみがら動画データを形成する
。ミキサ〔31はこれら静市画データと動画データを動
き検出回路(7)の出力に基づいて混合比を変更し、所
望の混合データ全形成導出している□動き検出回路(7
]ば、■フレーム又は2フレーム前のAD変換データと
入力されるAD変換データを比較して得られる差分検出
情報と、MUSE信号中のコントロールデータに含マれ
る動き検出情報に基づいて適宜動き検出出方全形成して
ミキサ[3iの混合比を決定している。尚、動き検出口
K11+vc接続されているテンポラルフィルタ(81
ば、2フレ一ム差分検出による動き検出ミスを補正する
ための回路である。またAD変換出方を入力するコント
ロールデータ検出回路11+11は、MUSE信号の垂
直〕−ランキング期間に多重されているコントロールデ
ータを検出し動き検出情報を動き検出回路(71に供給
している。MUSFエンコーダは入力される高品位静止
画情報が変更されたときコントロールデータ中に動き検
出情報を多重している。
This still 15-picture video disc is video disc 7"'
-Y (A 1.1') When the link is received, the link-up access means 121 accesses the beginning of the track, and the signal processing circuit LI+ FM demodulates the output of the track. D to form and derive the reproduced MUSE signal by inputting the reproduced MUSEi signal
A D conversion circuit (which performs AD conversion on the reproduced MUSE signal; the AD conversion output is converted to 2 through a noise reduction circuit +4+
It is input to the field memory Ai5+ together with the AD conversion data before the field, and the next field memo IJIi3 (
6) IK is transferred, and then the next field is read out from field memory 8 (6I: re-read., 1 above both 7) = field memo') 15 + t6 (for example, 4 fields worth of information to form a high-quality video signal) □Inter-frame interpolation circuit (111 input ADf conversion outputs) All AD conversion outputs are always memorized.The outputs of the AD conversion outputs are all synthesized to form high-resolution still image data. The open circuit f121 forms video data only from the input AD conversion output.The mixer [31] changes the mixing ratio of these still city image data and video data based on the output of the motion detection circuit (7), and converts the still image data and video data into desired data. □Motion detection circuit (7) that derives all the mixed data
], ① Motion detection is performed as appropriate based on the difference detection information obtained by comparing the AD conversion data of the frame or two frames before and the input AD conversion data, and the motion detection information included in the control data in the MUSE signal. The mixing ratio of the mixer [3i] is determined by forming the entire output. In addition, the temporal filter (81) connected to the motion detection port K11+vc
For example, it is a circuit for correcting a motion detection error caused by two-frame difference detection. Further, the control data detection circuit 11+11, which inputs the AD conversion output method, detects the control data multiplexed in the vertical]-ranking period of the MUSE signal, and supplies motion detection information to the motion detection circuit (71).MUSF encoder The system multiplexes motion detection information into control data when input high-quality still image information is changed.

本実施例の場合ミキサー(131は、この動き検出情報
発生期間の4フイールド以後テンポヲルフイルタ(8)
の出力が発生している期間(約3フレームノ中動画デー
タを一部混合せしめており、混合データが静止画データ
のみVC二つて形成される迄約5フレームの期間を要す
るn この様にして形成導出される混合デー〆はTC■デコー
ダ(141にで同時化されて追加メモリユニット(C)
内の画像メモ!J O,61に入力される。この画像メ
モリ化は一書込制御回路4秒にて同時化データを記憶し
、読出制御回路(1&にて記憶した同時化データを読出
している。lDA変換変換回路上9出された同時化デー
タをアナログ化してその出力をモニタTV(D)に入力
している。従って、讐込禁止信号全書込制御回路Cl7
1に入力して画像メモlJ[161に対する書込を中断
すると、それ以後は記憶されている同時化データにより
高品位静止画像が形成されることになる。従って所望の
高品位静止画像全サーチして再生する場合、対応する記
録トラ・yりの位置迄ビックア・ツブが移動して再生す
る迄の期間中画像メモ!JO61の書込を中断すれば、
モニタTVにはサーチ前の高品位静止画像が映出され続
けることになる。
In this embodiment, the mixer (131) is a tempo filter (8) after the 4th field of this motion detection information generation period.
During the period during which the output is occurring (approximately 3 frames), part of the video data is mixed, and it takes approximately 5 frames until the mixed data is composed of only still image data and two VCs. In this way, The mixed data formed and derived is synchronized by the TC decoder (141) and added to the additional memory unit (C).
Image memo inside! It is input to JO,61. In this image memory, the synchronized data is stored in one write control circuit for 4 seconds, and the stored synchronized data is read out in the read control circuit (1&. is analogized and its output is input to the monitor TV (D).Therefore, the write inhibition signal all write control circuit Cl7
1 and interrupts writing to the image memory lJ[161, from then on a high-quality still image will be formed using the stored synchronized data. Therefore, when searching for and reproducing all desired high-quality still images, the image memo is displayed during the period until the big-a-tube moves to the corresponding recording track position and reproduces it. If you interrupt the writing of JO61,
The high-quality still image before the search continues to be displayed on the monitor TV.

上述する構成は、高品位静IE画ファイルシステムとし
ての一般的な構成であり、本実施例の特徴とするところ
は以下の点にある。
The configuration described above is a general configuration for a high-quality still IE image file system, and the features of this embodiment are as follows.

本実施例では、記録トヲ、ンクを連続再生して高品位静
止画像を順次映出する場合、静止画情報変更時点以後約
5フレームの間モニタ画面上の像がポケる状態を解消す
る点にある。(第2図参照)本実施例では、静止画情報
の変更をコントロールデーヌ中の動き検出情報の発生に
:り検出しており、書込禁止信号発生回路(19は動き
検出情報の検出に伴って、5フレームのパルス幅の書込
禁止信号を、書込制御回路0.71に入力している。l
書込制御回路σ7jは書込禁止信号が入力される期間中
画像メモIJ (161の書込動作を禁止する。その結
果、画像メモリσ61は変更前の靜市画情報全記憶し′
!′Cまま読出を継続し、混合データ中に動画データが
含まれなくなった時点で書込を開始する0従って、画像
メモv061vcは、静止画データのみより成る同時化
データが書込まれることになる。
In this embodiment, when recording high-quality still images are sequentially displayed by continuously reproducing the recorded tracks, the problem is that the image on the monitor screen is not blurred for about 5 frames after the still image information is changed. be. (See Figure 2) In this embodiment, changes in still image information are detected based on the generation of motion detection information during control data, and the write inhibit signal generation circuit (19 is a A write inhibit signal with a pulse width of 5 frames is input to the write control circuit 0.71.
The write control circuit σ7j prohibits the write operation of the image memo IJ (161) during the period when the write inhibit signal is input. As a result, the image memory σ61 stores all the image information before the change.
! 'C Continue reading and start writing when video data is no longer included in the mixed data 0 Therefore, image memo v061vc will be written with synchronized data consisting only of still image data. .

上述する実施例ではコントロールデータ検出回路n(1
を動き識別手段として利用したが、動き検出回路(7)
の出力も動き検出情報に関連する情報であり、動き検出
回路(71やテンポラルフィルタ+81t−動き識別手
段として利用することも可能である0また、本実施例は
、DA変換回路(19を追加メモリユニット(C)内に
設けているが、従来通りMUSEデコーダ(B)内のD
A変換回路(1示省略)を用いることも十分可能であり
斯る構成が本発明に含壕れることは自明である0 −1た書込禁止信号のパルス幅は、テンポラルフィルタ
の影響全無視出来るとするなら2フレームでも良いが、
本実施例より更に動作を確実にするなら5フレ一ム以上
に設定しても良い。また、テンポラルフィルタの特性に
応じこのパルス幅は適宜設定する必要がある。また、本
実施例でFiMUSEエンコーダ(B)内に追加メモリ
ユニット(C)を内蔵しているが、追加メモリュニッl
−(C)を別体としても良く、また追刀ロメモリ(CJ
内の書入、読出制御回路σ7](181と画像メモリa
eとをよニット化してMUSEエンコーダCB)に着脱
し得る様構成しても良い。更に、追加メモリユニウドに
入力する信号は、混合データ又はアナログ化された高品
位映像信号でも良いが、アナログ化された高品位映像信
号を入力する場合には、画像メモリσeの前段にAD変
換回路をまた後段[DA変換回路を設ける必要があるが
、本発明は前述する様な全ての構成を含むものである。
In the embodiment described above, the control data detection circuit n(1
was used as a motion identification means, but the motion detection circuit (7)
The output of the motion detection circuit (71 and temporal filter +81t) is also information related to motion detection information, and can also be used as a motion identification means. Although it is provided in the unit (C), the D in the MUSE decoder (B) is the same as before.
It is quite possible to use an A conversion circuit (1 not shown), and it is obvious that such a configuration is included in the present invention. If possible, 2 frames is fine, but
If the operation is to be made more reliable than in this embodiment, it may be set to 5 frames or more. Further, this pulse width needs to be set appropriately depending on the characteristics of the temporal filter. In addition, in this embodiment, an additional memory unit (C) is built into the FiMUSE encoder (B);
-(C) may be used as a separate body, or Oito Romemory (CJ) may be used separately.
writing/reading control circuit σ7] (181 and image memory a
It is also possible to construct it so that it can be attached to and detached from the MUSE encoder CB) by knitting it. Furthermore, the signal input to the additional memory unit may be mixed data or an analogized high-quality video signal, but when inputting an analogized high-quality video signal, an AD conversion circuit is installed before the image memory σe. Although it is necessary to provide a DA conversion circuit in the latter stage, the present invention includes all the configurations described above.

(ト)発明の効果 工っで、本発明に工れば、高品位静止画面がボケること
なく瞬間的に更新される。
(G) Effects of the Invention If the present invention is implemented, a high-quality still screen can be updated instantaneously without blurring.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す回路プロ・ンク図、第
2図はその要部波形図をそれぞれ顕わす。 (A)・・・ビデオディスクフル−ヤ、(B)・・・M
USEデコーダ、(CJ・・・追加メモリ、(161・
・・画像メモリ、a51・・・禁面信号発生回路、σ7
)・・・書込制御回路0
FIG. 1 shows a circuit diagram showing an embodiment of the present invention, and FIG. 2 shows a waveform diagram of its essential parts. (A)...Video disk fuller, (B)...M
USE decoder, (CJ...additional memory, (161.
...Image memory, a51...Forbidden surface signal generation circuit, σ7
)...Write control circuit 0

Claims (1)

【特許請求の範囲】[Claims] (1)MUSE信号に変換して成る多数の静止画情報を
所定フレームづつ連続記録して成る記録媒体を再生する
再生装置と、再生MUSE信号を入力して高品位映像信
号に変換するMUSEデコーダと、前記高品位映像信号
を記憶する追加メモリと、該追加メモリより得られる高
品位映像信号を映出するモニタとを配して成る高品位静
止画ファイルシステムに於て、 前記MUSEデコーダ中に配され再生される静止画映像
情報の変更を動き変化として識別する動き識別手段と、 該動き識別手段の出力に基づいて書込禁止信号を発する
書込禁止信号発生回路と、 前記書込禁止信号に基づいて前記追加メモリの書込動作
を禁止する書込制御回路とを それぞれ配して成る追加メモリ制御回路。
(1) A playback device that plays back a recording medium that continuously records a large number of still image information converted into MUSE signals in predetermined frames, and a MUSE decoder that inputs the playback MUSE signal and converts it into a high-quality video signal. , in a high-definition still image file system comprising an additional memory for storing the high-definition video signal and a monitor for displaying the high-definition video signal obtained from the additional memory; motion identification means for identifying a change in still image video information that is played back as a motion change; a write protection signal generation circuit that generates a write protection signal based on the output of the motion identification means; and a write control circuit for inhibiting a write operation of the additional memory based on the above.
JP63024267A 1988-02-04 1988-02-04 Additional memory control circuit Pending JPH01200790A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63024267A JPH01200790A (en) 1988-02-04 1988-02-04 Additional memory control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63024267A JPH01200790A (en) 1988-02-04 1988-02-04 Additional memory control circuit

Publications (1)

Publication Number Publication Date
JPH01200790A true JPH01200790A (en) 1989-08-11

Family

ID=12133450

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63024267A Pending JPH01200790A (en) 1988-02-04 1988-02-04 Additional memory control circuit

Country Status (1)

Country Link
JP (1) JPH01200790A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0522522A2 (en) * 1991-07-09 1993-01-13 Canon Kabushiki Kaisha Reproducing apparatus for video signals accompanied by control information

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0522522A2 (en) * 1991-07-09 1993-01-13 Canon Kabushiki Kaisha Reproducing apparatus for video signals accompanied by control information
US5528382A (en) * 1991-07-09 1996-06-18 Canon Kabushiki Kaisha Reproduction apparatus for video signals accompanied by control information

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