JPH0119116Y2 - - Google Patents

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Publication number
JPH0119116Y2
JPH0119116Y2 JP1983025525U JP2552583U JPH0119116Y2 JP H0119116 Y2 JPH0119116 Y2 JP H0119116Y2 JP 1983025525 U JP1983025525 U JP 1983025525U JP 2552583 U JP2552583 U JP 2552583U JP H0119116 Y2 JPH0119116 Y2 JP H0119116Y2
Authority
JP
Japan
Prior art keywords
time
output
control circuit
drive control
hour
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1983025525U
Other languages
Japanese (ja)
Other versions
JPS59131083U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2552583U priority Critical patent/JPS59131083U/en
Publication of JPS59131083U publication Critical patent/JPS59131083U/en
Application granted granted Critical
Publication of JPH0119116Y2 publication Critical patent/JPH0119116Y2/ja
Granted legal-status Critical Current

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  • Electromechanical Clocks (AREA)

Description

【考案の詳細な説明】 本考案は報時時計に関するものである。[Detailed explanation of the idea] The present invention relates to a time signal clock.

従来のハト時計とか、棒リンによる報時時計で
は、機械的構成が大半を占め、その遅れなどによ
つて正時に正確に報時を開始することは難しかつ
た。
Conventional cuckoo clocks and clocks that use rods to signal time are mostly mechanical, and their lag makes it difficult to accurately start the time on the hour.

そこで本考案は、正時よりやや前に、報時機構
を駆動して準備状態に待機させておき、正確に正
時から報時を開始できるようにしたものである。
Therefore, in the present invention, the time reporting mechanism is activated slightly before the hour to standby in a ready state, so that the time reporting can be started accurately on the hour.

以下、本考案の一実施例を図面に基づいて説明
する。
Hereinafter, one embodiment of the present invention will be described based on the drawings.

第1図において、Qは発振器、DVは分周器、
CT1,CT2,CT3はそれぞれ60秒、60分、12時の
カウンタである。カウンタCT1の端子t1からは、
毎分59秒から1秒幅のパルスが生じ、カウンタ
CT2の端子t2からは毎時59分に立上つて0分に立
下るパルスが生じる。そのためゲート回路Gから
は毎時59分59秒に、すなわち、正時の1秒前にパ
ルスが生じ、ワンシヨツトパルス発生器W1から
のパルスによりフリツプフロツプ回路Fがセツト
される。なお、ワンシヨツトパルス発生器W1
よびフリツプフロツプ回路Fにより第1の駆動制
御回路が構成される。フリツプフロツプ回路Fか
らの出力によつてゲート回路G2の出力が“0”
になり、モータMが駆動され、第2図のカムCM
が回転する。このカムCMによつてレバーLが最
上位の位置に達すると、スイツチSが閉じ、第1
図のワンシヨツトパルス発生器W3から1パルス
が発生して、フリツプフロツプ回路Fがリセツト
される。そのためモータMが停止し、報時機構は
第2図示の位置で停止し、報時の準備状態となつ
て待機する。なお、スイツチSおよびワンシヨツ
トパルス発生器W3により検出手段が構成される。
In Figure 1, Q is an oscillator, DV is a frequency divider,
CT 1 , CT 2 , and CT 3 are counters for 60 seconds, 60 minutes, and 12 o'clock, respectively. From terminal t 1 of counter CT 1 ,
A pulse with a width of 1 second is generated from 59 seconds every minute, and the counter
A pulse is generated from the terminal t 2 of CT 2 that rises at 59 minutes and falls at 0 minutes every hour. Therefore, a pulse is generated from the gate circuit G at 59 minutes and 59 seconds every hour, that is, one second before the hour, and the flip-flop circuit F is set by the pulse from the one-shot pulse generator W1 . Note that the one-shot pulse generator W1 and the flip-flop circuit F constitute a first drive control circuit. The output of gate circuit G2 is “0” due to the output from flip-flop circuit F.
, the motor M is driven, and the cam CM in Fig. 2
rotates. When the lever L reaches the highest position by this cam CM, the switch S closes and the first
One pulse is generated from the one-shot pulse generator W3 shown in the figure, and the flip-flop circuit F is reset. As a result, the motor M stops, and the time reporting mechanism stops at the position shown in the second diagram, and stands by in a time reporting preparation state. Note that the switch S and the one-shot pulse generator W3 constitute a detection means.

そして、正時になつてカウンタCT2の端子t2
“0”に立下ると、第2の駆動制御回路を構成す
るワンシヨツトパルス発生器W2から1パルスが
生じ、制御回路Aからの出力が発生し、これによ
つてモータMが回転する。そのため直ちに第2図
のレバーLがカムCMとの係合がはずれて、バネ
Pによつて図面下方に引張られ、その先端部によ
つて棒リンRが打たれて報時が行なわれる。スイ
ツチSの接点信号によつて制御回路A内で報時数
が計数され、この計数内容がカウンタCT3の内容
と一致すると、制御回路Aからの出力が停止し報
時が終了する。
Then, when the terminal t2 of the counter CT2 falls to "0" on the hour, one pulse is generated from the one-shot pulse generator W2 constituting the second drive control circuit, and the output from the control circuit A is generated. occurs, which causes the motor M to rotate. Therefore, the lever L shown in FIG. 2 immediately disengages from the cam CM and is pulled downward in the drawing by the spring P, and the tip of the lever L strikes the rod R to signal the time. The number of time reports is counted in the control circuit A according to the contact signal of the switch S, and when the content of this count matches the content of the counter CT3 , the output from the control circuit A is stopped and the time report ends.

なお、報時機構は上記のように棒リンによるも
のに限らず、ハト時計などに用いてもよい。この
場合には、正時よりやや前に、ハトを扉から出し
て待機させ、正時から直ちに報時を行なうように
するものである。この場合にはフイゴを用いず、
ハトの動きに同期して電子音によつて報時するよ
うにしてもよい。
Note that the time reporting mechanism is not limited to the one using a ring as described above, but may also be used in a cuckoo clock or the like. In this case, the pigeons are brought out of the door a little before the hour and are kept on standby, so that the time signal is immediately given from the hour on the hour. In this case, do not use Figo,
The time may be announced by an electronic sound in synchronization with the movement of the pigeons.

以上のように本考案によれば、準備出力が生じ
る前の報時機構の停止位置が報時機構の機械的か
つ間欠的な報時動作に起因してばらついても、正
時より前に報時機構を準備状態にして待機させて
おくので、正時の検出出力によつて正確に正時か
ら報時を行なわせることができ、高精度の報時時
計が得られる。
As described above, according to the present invention, even if the stop position of the time signal mechanism before the preparation output is generated varies due to the mechanical and intermittent time signal operation of the time signal mechanism, the time signal is notified before the hour. Since the time mechanism is kept in a ready state and on standby, the time can be accurately reported from the hour based on the hourly detection output, and a highly accurate timepiece can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案の一実施例を示した電気回路
図、第2図は、報時機構の一例を示した正面図で
ある。 CT1,CT2……カウンタ、G1……ゲート回路、
F……フリツプフロツプ回路、W2……ワンシヨ
ツトパルス発生器、A……制御回路、M……モー
タ、S……スイツチ、CM……カム、L……レバ
ー、R……棒リン。
FIG. 1 is an electric circuit diagram showing an embodiment of the present invention, and FIG. 2 is a front view showing an example of a time reporting mechanism. CT 1 , CT 2 ...Counter, G1 ...Gate circuit,
F...Flip-flop circuit, W2 ...One-shot pulse generator, A...Control circuit, M...Motor, S...Switch, CM...Cam, L...Lever, R...Ring.

Claims (1)

【実用新案登録請求の範囲】 間欠的に報時動作を行う報時機構と、 正時の所定時間前に準備出力を発生する出力回
路と、 この出力回路からの準備出力によつて報時機構
を駆動するための制御出力を発生する第1の駆動
制御回路と、 この第1の駆動制御回路の制御出力を受けて駆
動された上記報時機構が報時準備位置にきたこと
を検出して上記第1の駆動制御回路の制御出力を
停止する検出手段と、 正時の検出出力によつて上記報時機構を上記報
時準備位置から駆動して報時を行わせるための制
御出力を発生する第2の駆動制御回路と からなる報時時計。
[Scope of Claim for Utility Model Registration] A time reporting mechanism that performs a time reporting operation intermittently, an output circuit that generates a preparatory output at a predetermined time before the hour, and a time reporting mechanism that uses the preparatory output from this output circuit. a first drive control circuit that generates a control output for driving the first drive control circuit; and detects that the time signal mechanism, which is driven in response to the control output of the first drive control circuit, has come to a time signal preparation position. detection means for stopping the control output of the first drive control circuit; and generating a control output for driving the time signal mechanism from the time signal preparation position to signal the time based on the hourly detection output. and a second drive control circuit.
JP2552583U 1983-02-22 1983-02-22 time signal clock Granted JPS59131083U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2552583U JPS59131083U (en) 1983-02-22 1983-02-22 time signal clock

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2552583U JPS59131083U (en) 1983-02-22 1983-02-22 time signal clock

Publications (2)

Publication Number Publication Date
JPS59131083U JPS59131083U (en) 1984-09-03
JPH0119116Y2 true JPH0119116Y2 (en) 1989-06-02

Family

ID=30156509

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2552583U Granted JPS59131083U (en) 1983-02-22 1983-02-22 time signal clock

Country Status (1)

Country Link
JP (1) JPS59131083U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5616392A (en) * 1979-07-19 1981-02-17 Asahi Tsusho Kk Remote control device for unit to be controlled

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5557090U (en) * 1978-10-13 1980-04-17

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5616392A (en) * 1979-07-19 1981-02-17 Asahi Tsusho Kk Remote control device for unit to be controlled

Also Published As

Publication number Publication date
JPS59131083U (en) 1984-09-03

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