JPH01180825U - - Google Patents

Info

Publication number
JPH01180825U
JPH01180825U JP6959788U JP6959788U JPH01180825U JP H01180825 U JPH01180825 U JP H01180825U JP 6959788 U JP6959788 U JP 6959788U JP 6959788 U JP6959788 U JP 6959788U JP H01180825 U JPH01180825 U JP H01180825U
Authority
JP
Japan
Prior art keywords
voltage
output
signal
circuit
reference voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6959788U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6959788U priority Critical patent/JPH01180825U/ja
Publication of JPH01180825U publication Critical patent/JPH01180825U/ja
Pending legal-status Critical Current

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  • Emergency Protection Circuit Devices (AREA)
  • Protection Of Static Devices (AREA)
  • Dc-Dc Converters (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す構成ブロツク
図、第2図は第1図の装置の不感状態における波
形図、第3図は第1図の装置のシヤツトダウン状
態における波形図、第4図は本考案の第2の実施
例の構成ブロツク図、第5図は第4図の装置の動
作を説明する図である。第6図は従来の直流電源
装置の過電流保護回路の構成ブロツク図、第7図
は第6図の装置の不感状態における波形図、第8
図は第6図の装置のシヤツトダウン状態における
波形図である。 10……DC−DCコンバータ、20……カレ
ントトランス、30……電流電圧変換回路、60
……ラツチ回路、70……PWM制御回路、80
……ゲート回路、90……積分器、100……コ
ンパレータ、110……ピークホールド回路。
FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a waveform diagram of the device shown in FIG. 1 in a non-sensing state, FIG. 3 is a waveform diagram of the device shown in FIG. This figure is a block diagram of a second embodiment of the present invention, and FIG. 5 is a diagram illustrating the operation of the apparatus shown in FIG. 4. Fig. 6 is a configuration block diagram of an overcurrent protection circuit of a conventional DC power supply device, Fig. 7 is a waveform diagram of the device in Fig. 6 in a non-sensing state, and Fig. 8
The figure is a waveform diagram of the apparatus of FIG. 6 in a shutdown state. 10...DC-DC converter, 20...Current transformer, 30...Current voltage conversion circuit, 60
... Latch circuit, 70 ... PWM control circuit, 80
... gate circuit, 90 ... integrator, 100 ... comparator, 110 ... peak hold circuit.

Claims (1)

【実用新案登録請求の範囲】 (1) 直流電圧を入力してトランスの一次側に接
続し、この接続された直流電圧をスイツチング素
子によりオンオフして二次側に電力を伝送し、こ
の伝送された電力を整流平滑化して直流電圧を出
力するコンバータ部と、 このコンバータ部の出力電圧を検出し、当該コ
ンバータ部の出力電圧が所定の基準電圧と一致す
るように前記スイツチング素子に制御信号を送る
出力安定化部と、 を備えた直流電源装置において、 前記トランスの一次側に現れたスイツチング電
流を検出する手段、 この検出された信号を整流すると共に、電流電
圧変換する手段、 この電圧電流変換された信号を所定の時定数で
積分する手段、 この積分された信号と所定の基準電圧とを比較
して過電流状態にあるか否か判断するコンパレー
タ、 このコンパレータで過電流状態を検出した場合
は、この信号を保持するラツチ回路、 このラツチ回路で過電流状態を検出していない
場合は前記出力安定化回路の制御信号出力を認め
、過電流状態を検出している場合は制御信号の出
力を認めないゲート回路、 よりなる過電流保護部を設けたことを特徴とす
る直流電源装置の過電流保護回路。 (2) 前記コンバータ部と、前記過電流保護部と
を有すると共に、 前記電圧電流変換手段で出力された信号を入力
して各パルス信号の最大値を保持するサンプルホ
ールド回路、 このサンプルホールド回路の出力信号を第1の
基準電圧と比較する第1の誤差アンプ、前記出力
電圧と第2の基準電圧とを比較する第2の誤差ア
ンプ、これら誤差アンプのうちいずれか一方が基
準電圧より高い(H)と判断した場合は前記スイ
ツチング素子の動作を低下させる方向に制御信号
を生成させる出力安定化回路、 を具備することを特徴とする請求項1記載の直
流電源装置の過電流保護回路。
[Claims for Utility Model Registration] (1) A DC voltage is input and connected to the primary side of a transformer, and the connected DC voltage is turned on and off by a switching element to transmit power to the secondary side, and this transmitted DC voltage is turned on and off by a switching element. a converter unit that rectifies and smoothes the output power and outputs a DC voltage; and a converter unit that detects the output voltage of this converter unit and sends a control signal to the switching element so that the output voltage of the converter unit matches a predetermined reference voltage. A DC power supply device comprising: an output stabilizing section; means for detecting the switching current appearing on the primary side of the transformer; means for rectifying the detected signal and converting it from current to voltage; a comparator that compares the integrated signal with a predetermined reference voltage to determine whether or not an overcurrent condition exists; , a latch circuit that holds this signal. If this latch circuit does not detect an overcurrent condition, the control signal output of the output stabilization circuit is allowed, and if an overcurrent condition is detected, it does not output the control signal. An overcurrent protection circuit for a DC power supply device, characterized in that it is provided with an overcurrent protection section consisting of a gate circuit that is not permitted. (2) A sample-and-hold circuit that includes the converter section and the overcurrent protection section, and that inputs the signal output from the voltage-current conversion means and holds the maximum value of each pulse signal; a first error amplifier that compares the output signal with a first reference voltage; a second error amplifier that compares the output voltage with a second reference voltage; one of these error amplifiers is higher than the reference voltage ( The overcurrent protection circuit for a DC power supply device according to claim 1, further comprising: an output stabilization circuit that generates a control signal in a direction that reduces the operation of the switching element when it is determined that H).
JP6959788U 1988-05-26 1988-05-26 Pending JPH01180825U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6959788U JPH01180825U (en) 1988-05-26 1988-05-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6959788U JPH01180825U (en) 1988-05-26 1988-05-26

Publications (1)

Publication Number Publication Date
JPH01180825U true JPH01180825U (en) 1989-12-26

Family

ID=31294874

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6959788U Pending JPH01180825U (en) 1988-05-26 1988-05-26

Country Status (1)

Country Link
JP (1) JPH01180825U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09327127A (en) * 1996-06-06 1997-12-16 Fuji Elelctrochem Co Ltd Multioutput-type power-supply apparatus for parallel operation and protective method for its overload
JP2005261168A (en) * 2004-03-15 2005-09-22 Sony Corp Power control device, power supply unit, control method for power circuit
JP2008199878A (en) * 2007-01-19 2008-08-28 Toyota Industries Corp Method of control of dc-dc converter, and dc-dc converter

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09327127A (en) * 1996-06-06 1997-12-16 Fuji Elelctrochem Co Ltd Multioutput-type power-supply apparatus for parallel operation and protective method for its overload
JP2005261168A (en) * 2004-03-15 2005-09-22 Sony Corp Power control device, power supply unit, control method for power circuit
JP4525120B2 (en) * 2004-03-15 2010-08-18 ソニー株式会社 Power supply control device, power supply device, and control method for power supply circuit
JP2008199878A (en) * 2007-01-19 2008-08-28 Toyota Industries Corp Method of control of dc-dc converter, and dc-dc converter

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