JPH01170214A - Identification circuit - Google Patents

Identification circuit

Info

Publication number
JPH01170214A
JPH01170214A JP62327130A JP32713087A JPH01170214A JP H01170214 A JPH01170214 A JP H01170214A JP 62327130 A JP62327130 A JP 62327130A JP 32713087 A JP32713087 A JP 32713087A JP H01170214 A JPH01170214 A JP H01170214A
Authority
JP
Japan
Prior art keywords
circuit
amplitude
level
threshold level
detected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62327130A
Other languages
Japanese (ja)
Inventor
Taizo Kinoshita
木下 泰三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62327130A priority Critical patent/JPH01170214A/en
Publication of JPH01170214A publication Critical patent/JPH01170214A/en
Pending legal-status Critical Current

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  • Dc Digital Transmission (AREA)
  • Optical Communication System (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To absorb a DC reproduction error due to the fluctuation in the mark rate or same code consecution by adopting the circuit constitution such that only a peak after DC recovery is not detected from a signal subjected to DC fluctuation in an identification circuit but a true amplitude is always detected and its median is given as a threshold level. CONSTITUTION:A peak value detection circuit 7 and a threshold level control circuit 8 are provided. At first a signal after DC recovery is given to a maximum value detection circuit 7 and a minimum value detection circuit 71. After the maximum and minimum value are detected in each circuit, the amplitude is detected by calculating the difference. Then the median of the amplitude is formed from the amplitude by a control circuit 80 and given as a threshold level of an identification circuit 3. Since both the maximum and minimum values are fluctuated in the same direction even when a DC level of an input signal is fluctuated in addition to the fluctuation of the amplitude of the input signal, the threshold level is fluctuated by the same level and the level is always set to 1/2 of the input amplitude. Thus, the amplitude information is always detected against the fluctuation in the mark rate or same code consecution.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は識別回路の識別レベル設定法に係り。[Detailed description of the invention] [Industrial application field] The present invention relates to a method for setting an identification level of an identification circuit.

特に光受信器などにおいて直流レベルが変動した場合に
も最適閾値レベルを設定するのに好適な識別回路に関す
る。
In particular, the present invention relates to an identification circuit suitable for setting an optimal threshold level even when the DC level fluctuates in an optical receiver or the like.

〔従来の技術〕[Conventional technology]

従来の装置は、例えば特開昭58−47348号明細書
に記載のように、光受信器内の等化増幅器出力信号を直
流再生し、信号のピーク値を検出することにより識別レ
ベルを設定するか、或いは、受光レベルをモニタし、受
光器の増倍率及び暗電流の温度変化を補償するものであ
った。第2図に従来の識別レベル設定法を示す、第2図
において、入力光信号は、受光器1で光電変換され、等
化増幅器2で適当な振幅に増幅される。その出力はクラ
ンプ回路等の直流再生回路4で直流が再生され識別器3
に入力され“1”、′0”が判定される。
Conventional devices, for example, as described in Japanese Patent Laid-Open No. 58-47348, set the discrimination level by regenerating the output signal of an equalizing amplifier in an optical receiver and detecting the peak value of the signal. Alternatively, the received light level was monitored and temperature changes in the multiplication factor and dark current of the light receiver were compensated for. FIG. 2 shows a conventional discrimination level setting method. In FIG. 2, an input optical signal is photoelectrically converted by a photodetector 1 and amplified to an appropriate amplitude by an equalizing amplifier 2. In FIG. The output is regenerated as DC by a DC regeneration circuit 4 such as a clamp circuit, and then the discriminator 3
is input, and "1" or '0' is determined.

また直流再生回路出力信号は一方でピーク値検出回路7
にて振幅が検出され、この情報に基づいて利得制御回路
5は等化増幅器2の利得と受光器1のバイアスを制御す
る。受光器1のバイアスはI) C/ D Cコンバー
タ等のバイアス回路6によって与えられる。ここで、従
来例において、閾値レベルは一般にピーク値検出回路7
にて検出された振幅情報を抵抗などにより1/2に分圧
する閾値レベル制御回路8を通して識別回路の人力参照
電圧としていた。また、受光レベルによる最適増倍率と
暗電流の変化は、温度に対して敏感であるため、温度変
化に伴う最適増倍率の変化を受光器バイアス回路6の情
報を基に検出し、閾値レベル制御回路8で最適閾値に調
整していた。
In addition, the output signal of the DC regeneration circuit is on the other hand the peak value detection circuit 7.
The amplitude is detected at , and the gain control circuit 5 controls the gain of the equalizing amplifier 2 and the bias of the photodetector 1 based on this information. Bias for the photoreceiver 1 is given by a bias circuit 6 such as an I) C/DC converter. Here, in the conventional example, the threshold level is generally the peak value detection circuit 7.
The detected amplitude information is passed through a threshold level control circuit 8 that divides the voltage into 1/2 using a resistor, etc., and is used as a manual reference voltage for the identification circuit. In addition, since changes in the optimum multiplication factor and dark current due to the received light level are sensitive to temperature, changes in the optimum multiplication factor due to temperature changes are detected based on information from the photoreceiver bias circuit 6, and the threshold level is controlled. The circuit 8 was used to adjust the threshold to the optimum value.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来技術は、上述のように直流再生後の信号の零レ
ベルからのピーク値を検出して、それを振幅と見なし抵
抗分圧によって得られる1/2の振幅レベルを閾値とし
て識別回路に与えていた。
As mentioned above, the above-mentioned conventional technology detects the peak value from the zero level of the signal after DC reproduction, considers it as the amplitude, and applies the 1/2 amplitude level obtained by resistor voltage division to the identification circuit as a threshold. was.

従って、クランプ回路のマーク率変動や同符号連続に対
するクランプ誤差がそのまま影響するため、マーク率が
極端に0や1に近い場合、又は同符号連続が長時rJJ
継続する場合には最適閾値レベルからずれるという問題
があった。
Therefore, since the mark rate fluctuation of the clamp circuit and the clamp error with respect to the same code continuity directly affect the mark rate, if the mark rate is extremely close to 0 or 1, or if the same code continuity occurs for a long time rJJ
If it continues, there is a problem that it deviates from the optimal threshold level.

本発明の目的は、マーク率や同符号連続による直流再生
誤差を吸収し、常に最適閾値レベルを設定可能な識別回
路を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide an identification circuit that can absorb DC reproduction errors due to mark rate and same code continuity and can always set the optimum threshold level.

〔問題点を解決するための手段〕 上記目的は、識別回路において、直流変動を受けた信号
に対し、直流再生後のピーク値のみを検出するのではな
く、常に真の振幅値(110ITレベルと111 I+
レベル)を検出しその中心値を閾値レベルとして与える
回路構成とすることにより達成される。また、上記識別
回路において、平均値検出回路の出力が“O”レベル近
傍まで低下した場合に閾値レベルを固定する閾値レベル
固定回路を設ける。
[Means for solving the problem] The above purpose is to have the identification circuit always detect the true amplitude value (110IT level and 111 I+
This is achieved by using a circuit configuration that detects the level) and provides its center value as the threshold level. Further, in the identification circuit, a threshold level fixing circuit is provided for fixing the threshold level when the output of the average value detection circuit drops to near the "O" level.

〔作用〕[Effect]

第1図に本発明の概念図を示す。第1図において、信号
の経路及び回路動作に関しては従来例として示した第2
図と全く同じであるが、ピーク値検出回路7及び閾値レ
ベル制御回路8が異なる。
FIG. 1 shows a conceptual diagram of the present invention. In Fig. 1, the signal path and circuit operation are compared to the second example shown as a conventional example.
Although it is exactly the same as the figure, the peak value detection circuit 7 and the threshold level control circuit 8 are different.

まず直流再生後の信号は最大値検出回路70及び最小値
検出回路71に入力される。各々の回路では、最大値及
び、最小値が検出された後、差演算により最大値と最小
値の差、即ち振幅値が検出される。この振幅値から制御
回路80において振幅の中心値(平均値)を作成して識
別回路3の閾値レベルとして与える。従って、入力信号
の振幅が変動する場合のみならず、入力信号の直流レベ
ル変動が生じても、最大値、最小値共に同じ方向に変動
するため、閾値レベルも同じだけ変動し、常に人力振幅
の1/2に設定される。
First, the signal after DC reproduction is input to a maximum value detection circuit 70 and a minimum value detection circuit 71. In each circuit, after the maximum value and the minimum value are detected, the difference between the maximum value and the minimum value, that is, the amplitude value, is detected by a difference calculation. From this amplitude value, a central value (average value) of the amplitude is created in the control circuit 80 and provided as the threshold level of the discrimination circuit 3. Therefore, not only when the amplitude of the input signal fluctuates, but also when the DC level of the input signal fluctuates, both the maximum and minimum values fluctuate in the same direction, so the threshold level also fluctuates by the same amount. It is set to 1/2.

〔実施例〕〔Example〕

以下、本発明の一実施例を第3図により説明する。第3
図は、第1図における最大値検出回路70、最小値検出
回路71.閾値レベル制御回路80を各々具体回路とし
て示したものである。直流再生回路4からの出力信号は
2分岐される。−方は、ダイオード701と容量702
より構成される最大値(ピーク値)検出回路に入力され
、トランジスタ703と抵抗704で構成される出力バ
ッファ(エミッタフォロワ)を介しである時定数(パル
ス幅に対しては十分長い)の直流レベルを検出する。同
様にもう一方はダイオードの11と容量712より構成
される最小値(ボトム値)検出回路に人力され、トラン
ジスタ713と抵抗714で構1戊される出力バッファ
(エミッタフォロワ)を介して直流レベルを検出する。
An embodiment of the present invention will be described below with reference to FIG. Third
The figure shows maximum value detection circuit 70, minimum value detection circuit 71. Each threshold level control circuit 80 is shown as a specific circuit. The output signal from the DC regeneration circuit 4 is branched into two. - side is diode 701 and capacitor 702
A DC level with a certain time constant (sufficiently long with respect to the pulse width) is input to the maximum value (peak value) detection circuit composed of Detect. Similarly, the other side is input to a minimum value (bottom value) detection circuit composed of diode 11 and capacitor 712, and the DC level is detected via an output buffer (emitter follower) composed of transistor 713 and resistor 714. To detect.

この後最大、最小検出信号を抵抗801,802により
172分割して構成される閾値レベル検出回路80によ
り最適閾値レベルを発生し、識別器の人力参照電圧とし
て与えるものである。この時、マーク率が定常的に低い
か、零連続符号が長い場合には最大(1^検出レベルは
クランプ誤差を反映して低くなるが、同時に最小値検出
レベル最大値と同じ分だけ低下するため、常に入力振幅
の1/2に設定され、従来のように、最適閾値レベルの
設定誤差を生じることはない。
Thereafter, the maximum and minimum detection signals are divided into 172 by resistors 801 and 802 to generate an optimal threshold level by a threshold level detection circuit 80, which is provided as a manual reference voltage for the discriminator. At this time, if the mark rate is steadily low or the zero consecutive code is long, the maximum (1^ detection level will be lower reflecting the clamp error, but at the same time the minimum detection level will be lowered by the same amount as the maximum value) Therefore, it is always set to 1/2 of the input amplitude, and no error in setting the optimum threshold level occurs as in the conventional case.

また、第4図に本発明による別の一実施例を示す。第4
図において、その動作は第1図の概念図と全く同一であ
るが、閾値レベル固定回路81が付加されている所が異
なる。第4図において、無信号状態になった場合を考え
ると、信号の最小値は振幅分低下し、イぎ号の最大値も
約振幅分低下してほぼ最小値と同一レベルを示すように
なる。従って、閾値レベル制御回路が限りなく〔−振幅
分〕のレベルとなった場合は、閾値レベルを(−振幅+
α、α:微小値流微小川流レベルことにより、マーク率
が限りなく零に近い場合や長時間零連続が続いた場合に
は無信号とみなす機能を付加することが可能である。微
小直流レベルαは、信号の取りうるマーク率範囲と、最
大零連続及び最大。
Further, FIG. 4 shows another embodiment according to the present invention. Fourth
In the figure, the operation is exactly the same as the conceptual diagram of FIG. 1, except that a threshold level fixing circuit 81 is added. In Figure 4, if we consider the case where there is no signal, the minimum value of the signal will decrease by the amplitude, and the maximum value of the signal will also decrease by about the amplitude, and will show almost the same level as the minimum value. . Therefore, if the threshold level control circuit reaches the level of [-amplitude] without limit, the threshold level should be changed to (-amplitude +
α, α: Minute value flow By using the micro-value flow level, it is possible to add a function to consider that there is no signal when the mark rate is extremely close to zero or when it continues to be zero for a long time. The minute DC level α is the mark rate range that the signal can take, the maximum continuous zero, and the maximum.

最小検出回路の時定数により設計することが可能である
It is possible to design according to the time constant of the minimum detection circuit.

また、第2図に示した従来例のように、直流レベル変動
だけではなく、受光器バイアス回路6からの信号を基に
閾値レベル制御回路80の抵抗801或いは802を可
変にして、受光器の増倍率及び暗電流の温度変動を補償
する機能を同時に付加することも可能である。
Furthermore, as in the conventional example shown in FIG. 2, the resistor 801 or 802 of the threshold level control circuit 80 is made variable based not only on DC level fluctuations but also on the signal from the photoreceiver bias circuit 6, thereby controlling the photoreceiver. It is also possible to simultaneously add a function to compensate for temperature fluctuations in the multiplication factor and dark current.

さらには、第1図、第4図において、直流再生回路4を
除いた時もまたその作用と効果は同じである。
Furthermore, the operation and effect are the same even when the DC regeneration circuit 4 is removed in FIGS. 1 and 4.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、マーク率や、同符号連続の変動に対し
て常に振幅情報を検出することができるため、従来のよ
うな直流再生(クランプ)誤差による最適閾値レベルの
ずれを補正する効果がある。
According to the present invention, amplitude information can always be detected with respect to mark rate and continuous fluctuations of the same sign, so it is effective to correct deviations in the optimal threshold level due to DC reproduction (clamp) errors as in the past. be.

また、制御回路出力、即ち、閾値レベルの低下を検出す
ることにより無信号検出も可能となる。さらには、あく
までも出力振幅の絶対レベルから検出しているため1等
化増幅器系のffi源、温度変動による出力振幅変化も
吸収することが可能である。
Further, by detecting a decrease in the control circuit output, that is, the threshold level, it is also possible to detect no signal. Furthermore, since the absolute level of the output amplitude is detected, it is possible to absorb changes in the output amplitude caused by the ffi source of the equalization amplifier system and temperature fluctuations.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の原理的構成を示すブロック図、第2
図は従来例のブロック図、第3図は本発明による一実施
例の回路図、第4図は本発明による別の一実施例の回路
図である。
FIG. 1 is a block diagram showing the basic configuration of the present invention, and FIG.
3 is a block diagram of a conventional example, FIG. 3 is a circuit diagram of an embodiment according to the present invention, and FIG. 4 is a circuit diagram of another embodiment according to the present invention.

Claims (1)

【特許請求の範囲】[Claims] 1、入力信号と閾値レベルを比較して“1”、“0”を
判定する識別回路において、入力信号の最大値を検出す
る最大値検出回路と、最小値を検出する最小値検出回路
と上記検出回路の各出力から平均値を検出する平均値検
出回路を設けたことを特徴とする識別回路。
1. In an identification circuit that compares an input signal with a threshold level to determine "1" or "0", a maximum value detection circuit that detects the maximum value of the input signal, a minimum value detection circuit that detects the minimum value, and the above An identification circuit comprising an average value detection circuit that detects an average value from each output of the detection circuit.
JP62327130A 1987-12-25 1987-12-25 Identification circuit Pending JPH01170214A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62327130A JPH01170214A (en) 1987-12-25 1987-12-25 Identification circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62327130A JPH01170214A (en) 1987-12-25 1987-12-25 Identification circuit

Publications (1)

Publication Number Publication Date
JPH01170214A true JPH01170214A (en) 1989-07-05

Family

ID=18195646

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62327130A Pending JPH01170214A (en) 1987-12-25 1987-12-25 Identification circuit

Country Status (1)

Country Link
JP (1) JPH01170214A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05130150A (en) * 1991-10-31 1993-05-25 Nec Corp Reception circuit device
JPH05259752A (en) * 1992-03-16 1993-10-08 Fujitsu Ltd Optical receiver
US5862185A (en) * 1994-07-21 1999-01-19 Tektronix, Inc. Data signal zero crossing detection process
US6304144B1 (en) 1998-07-10 2001-10-16 Fujitsu Limited Differential amplification circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05130150A (en) * 1991-10-31 1993-05-25 Nec Corp Reception circuit device
JPH05259752A (en) * 1992-03-16 1993-10-08 Fujitsu Ltd Optical receiver
US5862185A (en) * 1994-07-21 1999-01-19 Tektronix, Inc. Data signal zero crossing detection process
US6304144B1 (en) 1998-07-10 2001-10-16 Fujitsu Limited Differential amplification circuit

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