JPH01145838A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH01145838A
JPH01145838A JP30478187A JP30478187A JPH01145838A JP H01145838 A JPH01145838 A JP H01145838A JP 30478187 A JP30478187 A JP 30478187A JP 30478187 A JP30478187 A JP 30478187A JP H01145838 A JPH01145838 A JP H01145838A
Authority
JP
Japan
Prior art keywords
frame
leads
lead
lead frame
bending
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30478187A
Other languages
Japanese (ja)
Inventor
Shigeo Sato
佐藤 重男
Norio Shindo
新藤 規雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rhythm Watch Co Ltd
Original Assignee
Rhythm Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rhythm Watch Co Ltd filed Critical Rhythm Watch Co Ltd
Priority to JP30478187A priority Critical patent/JPH01145838A/en
Publication of JPH01145838A publication Critical patent/JPH01145838A/en
Pending legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To eliminate burrs without any deforming stress to a plated layer by bending outer leads in a state that a sole lead frame is connected to an outer frame, and plating them after bending. CONSTITUTION:The pinch leads 19 of a lead frame are cut, resin-sealed, and molded. Then, before outer leads 15 are bent, a stress releasing groove 3 having a length over the whole aligning direction of the leads 15 is formed near the base ends of the leads 15 at an outer frame 7 side. Thus, the lead frame 1 having the groove 33 is bent. In this case, a tensile stress acting the leads 15 protruding to the frame 7 warps a deforming plate 35 presented between the base ends of the leads 15 at the outer frame side and the groove 33. Accordingly, the frame 7 itself is not deformed, and a feeding hole 27, a positioning hole 29 and a position detecting hole 31 are held at predetermined positions. As a result, the frame 1 is smoothly fed to a plating step.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は、アウターリードが曲成された半導体装置の
製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a semiconductor device with bent outer leads.

(従来の技術) デュアルインライン(DIL)パッケージ、フラットパ
ッケージあるいはチップキャリア等の樹脂封止型半導体
装置は、一般に樹脂封止の後に、外部に導出されたアウ
ターリードが適当な角度に折り曲げられるのであり、具
体的には、金型内に外枠及び内枠の付いているリードフ
レームを配置し、リードフレーム単体を外枠及び内枠を
切り離すと同時にアウターリードの折り曲げ加工を行う
(Prior Art) In resin-sealed semiconductor devices such as dual-in-line (DIL) packages, flat packages, and chip carriers, the outer leads led to the outside are generally bent at an appropriate angle after resin encapsulation. Specifically, a lead frame with an outer frame and an inner frame is placed in a mold, and the outer lead is bent at the same time as the outer frame and inner frame are separated from the lead frame.

他方、リードフレームには、耐摩耗性、耐食性等の緒特
性の向上を図るため、メッキ処理の施されることがあり
、このメッキ処理の作業性を良好に保全するには、各リ
ードフレーム単体を外枠及び内枠に一体化した状態でメ
ッキ処理を施すのが好ましい。
On the other hand, lead frames are sometimes plated to improve their properties such as wear resistance and corrosion resistance.In order to maintain the workability of this plating process, it is necessary to It is preferable to perform the plating treatment while integrating the outer frame and the inner frame.

そこで従来は、アウターリードの折り曲げ加工(切断加
工と同時に行われる)前にメ・ンキ処理を行っていた。
Therefore, conventionally, the outer lead was subjected to a coating process before the bending process (which was performed at the same time as the cutting process).

(発明が解決しようとする問題点) しかし、上記の如くアウターリードの折り曲げ加工前に
メッキ処理を施すと、アウターリードの折り曲げ角部に
おいて、メッキ層が細かいひげ状に剥れてパリ状物を形
成し、該バリ状物が隣りのアウターリードと接触し、隣
接するアウターリードが導通してしまうという問題があ
った。
(Problem to be Solved by the Invention) However, when plating is performed before bending the outer leads as described above, the plating layer peels off in fine whiskers at the bending corners of the outer leads, causing flaky particles. There is a problem in that the burr-like material comes into contact with an adjacent outer lead, resulting in conduction between the adjacent outer leads.

(問題点を解決するための手段) 上記問題点を解決するために本発明は下記技術手段を採
用している。
(Means for solving the problems) In order to solve the above problems, the present invention employs the following technical means.

すなわち、本発明は、アウターリードが曲成された半導
体装置の製造方法であって、リードフレーム単体が外枠
に連結されている状態下においてアウターリードに曲げ
加工を施し、しかる後メッキ処理を行い、その後外板を
切断分離して半導体装置を得るものとしている。
That is, the present invention is a method for manufacturing a semiconductor device with bent outer leads, in which the outer leads are bent while the lead frame alone is connected to the outer frame, and then plated. Then, the outer plate is cut and separated to obtain a semiconductor device.

(作 用) 従って、本発明に依れば、アウターリードの曲げ加工後
にメッキ処理が施されることになっていて、メッキ層が
従来受けていた曲げ応力を受けることがなく、この結果
、メッキ層が良好な状態に保たれることになる。
(Function) Therefore, according to the present invention, the plating process is performed after the bending process of the outer lead, and the plating layer is not subjected to the bending stress that was conventionally applied, and as a result, the plating The layer will remain in good condition.

(実施例) 以下、本発明を例示図面に基いて説明する。(Example) Hereinafter, the present invention will be explained based on illustrative drawings.

第1図は本発明の一実施例を示すフローチャートであっ
て、第2図(平面図)に例示するリードフレーム1を素
材としている。まず、この素材たるリードフレーム1に
ついて説明すると、該リードフレーム1は、複数のリー
ドフレーム単体3を内枠5を介し一定方向に連接し更に
内枠5の端部側に外枠7を連接して構成されている。よ
り具体的には、9はダイパッド、11はリードで13は
インナーリード、15はアウターリードであり、17は
各リード11.11・・・間を連結しているタイバー、
19はピンチリードを示し、内枠5には樹脂の収縮に基
く応力吸収用の溝孔25が形成されている。また、外枠
7には、図示しない爪が入る送り孔27、位置決め孔2
9及び光センサ−(図示せず)によりリードフレーム1
の表裏を判定するための位置検出用孔31が形成されて
いる。
FIG. 1 is a flowchart showing an embodiment of the present invention, in which a lead frame 1 illustrated in FIG. 2 (plan view) is used as a material. First, the lead frame 1 that is this material is explained. The lead frame 1 is made by connecting a plurality of lead frames 3 in a fixed direction via an inner frame 5, and further connecting an outer frame 7 to the end side of the inner frame 5. It is composed of More specifically, 9 is a die pad, 11 is a lead, 13 is an inner lead, 15 is an outer lead, 17 is a tie bar connecting each lead 11.11...
Reference numeral 19 indicates a pinch lead, and a slot 25 is formed in the inner frame 5 for absorbing stress due to contraction of the resin. The outer frame 7 also includes a feed hole 27 into which a claw (not shown) is inserted, and a positioning hole 2.
9 and an optical sensor (not shown) lead frame 1.
A position detection hole 31 is formed for determining the front and back sides of the sheet.

そして、上記リードフレーム1のピンチリード19を切
除して樹脂封止を行い、モールド21を形成する。
Then, the pinch leads 19 of the lead frame 1 are cut out and sealed with resin to form a mold 21.

次にアウターリード15の曲げ加工に先立って、アウタ
ーリード15の外枠7側基端部の近傍に、該アウターリ
ート15の並列方向全域に亘る長さの応力逃がし溝33
を形成する。
Next, prior to bending the outer lead 15, a stress relief groove 33 having a length extending over the entire parallel direction of the outer lead 15 is placed near the base end of the outer lead 15 on the outer frame 7 side.
form.

この応力逃がし溝33の形成工程は、後述するように次
の曲げ加工後、リードフレーム1をスムーズにメッキ工
程へと送るために採り入れられたものである。尤も、曲
げ加工を行う前であればいずれの段階で行ってもよく予
めリードフレームlに応力逃がし溝33を形成しておい
て該工程を省略するようにしてもよい。
This process of forming the stress relief groove 33 was adopted in order to smoothly send the lead frame 1 to the plating process after the next bending process, as will be described later. Of course, this step may be performed at any stage before the bending process, and the stress relief groove 33 may be formed in the lead frame l in advance and this step may be omitted.

かくして応力逃がし溝33を有するリードフレーム1に
曲げ加工を施す。
In this way, the lead frame 1 having the stress relief groove 33 is bent.

そしてこの際、外枠7側に突出しているアウターリード
15に働く引張力は、アウターリード15の外枠17側
基端部と反り応力逃がし溝33間に存する変形板35を
第2図に示すように反らせるので、外枠7自体は回答変
形せず、従って送り孔27、位置決め孔29及び位置検
出用孔31は所定の位置を保持することになり、この結
果リードフレーム1は、スムーズにメッキ工程へと送ら
れることになる。
At this time, the tensile force acting on the outer lead 15 protruding toward the outer frame 7 is applied to the deformable plate 35 existing between the proximal end of the outer lead 15 on the outer frame 17 side and the warp stress relief groove 33, as shown in FIG. Since the outer frame 7 itself is not deformed, the feed hole 27, the positioning hole 29, and the position detection hole 31 are held in their predetermined positions.As a result, the lead frame 1 can be plated smoothly. It will be sent to the process.

そして、メッキ工程においては、送られてくるリードフ
レーム単体3が外枠7の付いたリードフレーム1である
ため、メッキ処理を容易に行うことができ、該メ;ンキ
処理後、切断加工して得られる樹脂封止型半導体装置は
、メッキ層が曲げ力を受けていないためパリ状物を発生
しておらず、きわめて良い製品となっている。
In the plating process, since the single lead frame 3 that is sent is the lead frame 1 with the outer frame 7 attached, the plating process can be easily performed. The resulting resin-sealed semiconductor device does not generate any flakes because the plating layer is not subjected to bending force, making it an extremely good product.

なお、曲げ加工時に生ずる内枠5側への引張力は、溝孔
25が吸収することになる。
Note that the slot 25 absorbs the tensile force toward the inner frame 5 that occurs during bending.

(発明の効果) 以上説明したように、本発明に依れば、リードフレーム
単体が外枠に連接されている状態下においてアウターリ
ートに曲げ加工を行い、該曲げ加工後にメッキ処理を施
しているため、メッキ層が何等の変形応力を受けること
なく、従ってパリ状物を生ぜず、樹脂封止型半導体装置
の歩留りが著しく向上する。
(Effects of the Invention) As explained above, according to the present invention, the outer lead is bent while the lead frame alone is connected to the outer frame, and the plating treatment is performed after the bending. Therefore, the plating layer is not subjected to any deformation stress, and therefore no flakes are generated, and the yield of resin-sealed semiconductor devices is significantly improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示すフローチャート、第2
図は本発明の実施素材たるリードフレームの平面図、第
3図は応力逃がし溝を形成したリードフレームの平面図
、第4図は曲げ加工を施したリードフレームの平面図を
示す。 1・・・リードフレーム 3・・・リードフレーム単体 7・・・外枠 15・・・アウターリード
FIG. 1 is a flowchart showing one embodiment of the present invention, and FIG.
3 shows a plan view of a lead frame which is a material for implementing the present invention, FIG. 3 shows a plan view of a lead frame with stress relief grooves formed therein, and FIG. 4 shows a plan view of a lead frame subjected to bending. 1...Lead frame 3...Lead frame alone 7...Outer frame 15...Outer lead

Claims (1)

【特許請求の範囲】[Claims]  アウターリードが曲成された半導体装置の製造方法で
あって、リードフレーム単体が外枠に連結されている状
態下においてアウターリードに曲げ加工を施し、しかる
後メッキ処理を行い、その後外板を切断分離して半導体
装置を得ることを特徴とする半導体装置の製造方法。
A method of manufacturing a semiconductor device with bent outer leads, in which the outer leads are bent while the lead frame alone is connected to the outer frame, followed by plating, and then the outer plate is cut. 1. A method for manufacturing a semiconductor device, characterized by obtaining a semiconductor device by separating.
JP30478187A 1987-12-02 1987-12-02 Manufacture of semiconductor device Pending JPH01145838A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30478187A JPH01145838A (en) 1987-12-02 1987-12-02 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30478187A JPH01145838A (en) 1987-12-02 1987-12-02 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH01145838A true JPH01145838A (en) 1989-06-07

Family

ID=17937152

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30478187A Pending JPH01145838A (en) 1987-12-02 1987-12-02 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH01145838A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04171972A (en) * 1990-11-06 1992-06-19 Yamaha Corp Lead frame
WO2007102041A1 (en) * 2006-03-09 2007-09-13 Infineon Technologies Ag Lead fingers of a semiconductor chip with an even layer of coating

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53144670A (en) * 1977-05-23 1978-12-16 Fujitsu Ltd Production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53144670A (en) * 1977-05-23 1978-12-16 Fujitsu Ltd Production of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04171972A (en) * 1990-11-06 1992-06-19 Yamaha Corp Lead frame
WO2007102041A1 (en) * 2006-03-09 2007-09-13 Infineon Technologies Ag Lead fingers of a semiconductor chip with an even layer of coating

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