JPH01132149A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH01132149A JPH01132149A JP62289360A JP28936087A JPH01132149A JP H01132149 A JPH01132149 A JP H01132149A JP 62289360 A JP62289360 A JP 62289360A JP 28936087 A JP28936087 A JP 28936087A JP H01132149 A JPH01132149 A JP H01132149A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- resin
- lead
- semiconductor element
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 77
- 229920005989 resin Polymers 0.000 claims abstract description 41
- 239000011347 resin Substances 0.000 claims abstract description 41
- 238000007789 sealing Methods 0.000 claims abstract description 35
- 239000000463 material Substances 0.000 claims description 4
- 229920001187 thermosetting polymer Polymers 0.000 claims description 3
- 238000005476 soldering Methods 0.000 abstract description 7
- 238000000034 method Methods 0.000 abstract description 5
- 239000000853 adhesive Substances 0.000 description 20
- 230000001070 adhesive effect Effects 0.000 description 20
- 239000002184 metal Substances 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- 238000000465 moulding Methods 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229920006254 polymer film Polymers 0.000 description 2
- 239000000725 suspension Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は樹脂封止型半導体装置に係り、特に大型の半導
体素子搭載に好適であり、はんだ付は実装時の封止樹脂
のクラック防止に好適な樹脂封止型半導体装置に関する
ものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a resin-sealed semiconductor device, and is particularly suitable for mounting large-sized semiconductor elements, and soldering is used to prevent cracks in the sealing resin during mounting. The present invention relates to a suitable resin-sealed semiconductor device.
近年、半導体素子は高集積化ともなって素子寸法が大型
化される傾向にある。これに対して半導体装置の外形寸
法は、他製品との互換性あるいは実装の高密度化への要
求によって自由に拡大できない状況にある。In recent years, semiconductor devices have become highly integrated and the device dimensions have tended to increase. On the other hand, the external dimensions of semiconductor devices cannot be freely expanded due to demands for compatibility with other products or higher packaging density.
第4図は、従来の一般的な樹脂封止型半導体装置の構造
を示す断面図、第5図は、第4図の樹脂封止型半導体装
置のリードから上の部分の樹脂を取り除いた状態での平
面図である。第4図及び第5図において、半導体素子1
は、タブ2の上に接着剤4などを用いて固定され、半導
体素子1上の端子5は、タブ2の周囲に配設された複数
のり一部3と金属細線6によって電気接続されている。Fig. 4 is a cross-sectional view showing the structure of a conventional general resin-sealed semiconductor device, and Fig. 5 shows the resin-sealed semiconductor device shown in Fig. 4 with the resin above the leads removed. FIG. In FIGS. 4 and 5, semiconductor element 1
is fixed onto the tab 2 using an adhesive 4 or the like, and the terminal 5 on the semiconductor element 1 is electrically connected to a plurality of glue portions 3 arranged around the tab 2 by a thin metal wire 6. .
タブ2を支持するタブ吊りリード8は、リード3ととも
に、いずれも最初、図に示していない共通の外枠に連結
されており、封止樹脂7によってモールドを行った後、
外枠から切離される。このような構造で、半導体素子1
を大型化していくと、リード3を封止樹脂7で固定して
いる部分の長さ8が不足して、外力に対するリード3の
十分な固定強度が得られなくなり、さらには金属細線6
とリード3との接続部9を十分に確保することも困難に
なる。The tab suspension lead 8 supporting the tab 2 is initially connected to a common outer frame (not shown) together with the lead 3, and after molding with the sealing resin 7,
separated from the outer frame. With such a structure, the semiconductor element 1
As the size of the lead 3 increases, the length 8 of the part where the lead 3 is fixed with the sealing resin 7 becomes insufficient, making it impossible to obtain sufficient fixing strength of the lead 3 against external forces, and furthermore,
It also becomes difficult to secure a sufficient connection portion 9 between the lead 3 and the lead 3.
上記のような素子寸法の大型化に伴う問題に対処する方
法としては、第6図及び第7図に示すように、リード3
を半導体素子1の直下部まで延長し、その上に絶縁フィ
ルム11を介して半導体索子1を搭載する方法が特開昭
61−218139号に記載されている。第7図におい
て、リード3のうちの一部のものは、半導体素子1の直
下部まで延長された後、直角に折曲げられ、半導体素子
1の下部を通り抜ける位置まで延長されており、リード
3の外部取出しと、金属細線6による電気接続が、半導
体素子1の異なる辺の側で行われている0水力式によれ
ば、リード3の十分な固定強度と、金属細線6接続のた
めの十分な領域を確保することができるので、半導体素
子1の寸法を封止樹脂7の外形寸法−杯近くまで大型化
することができる。As a method to deal with the problems associated with the increase in element size, as shown in FIGS. 6 and 7, the lead 3
JP-A-61-218139 describes a method in which the semiconductor cable 1 is extended to just below the semiconductor element 1 and the semiconductor cable 1 is mounted thereon via the insulating film 11. In FIG. 7, some of the leads 3 extend directly below the semiconductor element 1, are bent at right angles, and are extended to a position where they pass through the lower part of the semiconductor element 1. According to the hydraulic type, in which the external extraction of the lead 3 and the electrical connection using the thin metal wire 6 are performed on different sides of the semiconductor element 1, sufficient fixing strength of the lead 3 and sufficient strength for connecting the thin metal wire 6 are provided. Since a large area can be secured, the dimensions of the semiconductor element 1 can be increased to nearly the external dimension of the sealing resin 7 minus the size of the cup.
上記従来技術においては、樹脂封止型半導体装置が長期
間の保存などによって吸湿すると、はんだ付は実装時の
加熱によって、半導体素子1と絶縁フィルム11の間の
すき間に第8図に示すように蒸気12が発生し、その圧
力によって封止樹脂7にクラッド13が発生するという
問題があった。In the above-mentioned conventional technology, when the resin-sealed semiconductor device absorbs moisture due to long-term storage, the soldering process is performed by heating the semiconductor element 1 and the insulating film 11 in the gap between the semiconductor element 1 and the insulating film 11 as shown in FIG. There was a problem in that steam 12 was generated and a crud 13 was generated on the sealing resin 7 due to the pressure thereof.
これは、半導体素子1を絶縁フィルム11に固定する接
着剤14の接着力が弱く、この部分に水分がたまりやす
いためである。This is because the adhesive force of the adhesive 14 that fixes the semiconductor element 1 to the insulating film 11 is weak, and moisture tends to accumulate in this area.
タブ2に直接接着剤4を介して半導体素子1を固定する
第4図、第5図の構造では、半導体素子1とタブ2の間
に蒸気が発生しても、蒸気はタブ吊りリード8と封止樹
脂7の界面の微小なすき間を通って徐々に外部に放散さ
れるので、内部の圧力上昇は軽減され、クラックは発生
しにくくなっていた。しかし、絶縁フィルム11を使用
する第6図及び第7図の構造では、絶縁フィルム11が
蒸気12を透過しにくいうえ、絶縁フィルム11と封止
樹脂7の接着性が良いため、絶縁フィルム11の上部で
発生した蒸気は、リード3と封止樹脂7の界面などを通
って外部に放散されることが困難になっている。In the structure shown in FIGS. 4 and 5 in which the semiconductor element 1 is directly fixed to the tab 2 via the adhesive 4, even if steam is generated between the semiconductor element 1 and the tab 2, the steam will not reach the tab suspension lead 8. Since it passes through the small gap at the interface of the sealing resin 7 and gradually radiates to the outside, the increase in internal pressure is reduced and cracks are less likely to occur. However, in the structures shown in FIGS. 6 and 7 in which the insulating film 11 is used, the insulating film 11 is difficult to pass through the vapor 12, and the insulating film 11 and the sealing resin 7 have good adhesion. It is difficult for the vapor generated in the upper part to be dissipated to the outside through the interface between the lead 3 and the sealing resin 7.
本発明の目的は、絶縁フィルムを介してリード上に半導
体素子を搭載する構造の樹脂封止型半導体装置において
、はんだ付は実装時に発生する封止樹脂のクラックを防
止することにある。An object of the present invention is to prevent cracks in the sealing resin during soldering in a resin-sealed semiconductor device having a structure in which a semiconductor element is mounted on leads via an insulating film.
上記目的は、絶縁フィルムに厚さ方向の貫通穴を設ける
ことによって達成される。The above object is achieved by providing through holes in the insulating film in the thickness direction.
上記構造によれば、半導体素子と絶縁フィルムの間に発
生した蒸気は、絶縁フィルムに設けた貫通穴を通ってリ
ード表面に到達し、リードと封止樹脂の界面のすき間か
ら半導体装置外部に放散されるので、半導体装置内部の
圧力上昇が軽減され、したがって封止樹脂のクラック発
生を防止することができる。According to the above structure, the vapor generated between the semiconductor element and the insulating film reaches the lead surface through the through hole provided in the insulating film, and radiates to the outside of the semiconductor device through the gap at the interface between the lead and the sealing resin. As a result, the pressure increase inside the semiconductor device is reduced, and cracks in the sealing resin can be prevented from occurring.
以下、本発明の実施例を図面によって説明する。 Embodiments of the present invention will be described below with reference to the drawings.
第1図は、本発明の一実施例である樹脂封止型半導体装
置の断面図である。複数のリード3は、封止樹脂7の内
部において半導体素子1の下部まで延長されており、そ
の上に1箇所以上の貫通穴14を設けた絶縁フィルム1
1が接着されている6絶縁フイルム11の上面には接着
剤4によって半導体素子1が固定され、これら封止樹脂
7によってモールドされている。半導体素子1上の図示
していない端子と、リード3との間の電気接続は。FIG. 1 is a sectional view of a resin-sealed semiconductor device according to an embodiment of the present invention. The plurality of leads 3 extend to the lower part of the semiconductor element 1 inside the sealing resin 7, and the insulating film 1 is provided with one or more through holes 14 thereon.
The semiconductor element 1 is fixed to the upper surface of the insulating film 11 to which the semiconductor element 1 is adhered by an adhesive 4, and is molded with the sealing resin 7. The electrical connections between the leads 3 and terminals (not shown) on the semiconductor element 1 are as follows.
第7図と同様に、半導体素子1のリード3外部引出しと
異なる辺の側で行うか、あるいは特開昭57−1142
61号に記載されているように、リード3のうち第1図
の断面内で半導体素子1に覆われていない部分を使用し
て金属細線接続を行う。Similarly to FIG. 7, the lead 3 of the semiconductor element 1 may be carried out on a side different from the external drawer, or
As described in No. 61, a thin metal wire connection is made using the portion of the lead 3 that is not covered with the semiconductor element 1 within the cross section shown in FIG.
絶縁フィルム11の材質としては、ポリイミドやエポキ
シなどの高分子フィルムを使用し、接着剤によってリー
ド3に接着する。また、絶縁フィルム11としてガラス
繊維にエポキシなどの樹脂を含浸させたプリプレグを使
用し、接着剤を使用しないでリード3に圧着する方法も
考えられる。As the material of the insulating film 11, a polymer film such as polyimide or epoxy is used, and it is adhered to the lead 3 with an adhesive. Another possible method is to use prepreg, which is glass fiber impregnated with a resin such as epoxy, as the insulating film 11 and press it onto the leads 3 without using an adhesive.
封止樹脂7のモールドは175℃前後の高温で行われる
ので、絶縁フィルム11の材質としては、耐熱性の高い
熱硬化性樹脂の使用が望ましい、ただし本発明の効果は
熱硬化性樹脂フィルムに限られるものではなく、熱可塑
性樹脂を含む各種高分子フィルムや、セラミックスなど
の無機絶縁材料を使用した場合にも有利である。Since the molding of the sealing resin 7 is carried out at a high temperature of around 175°C, it is desirable to use a thermosetting resin with high heat resistance as the material for the insulating film 11. However, the effects of the present invention are not applicable to thermosetting resin films. The present invention is not limited to this, and it is also advantageous to use various polymer films containing thermoplastic resins or inorganic insulating materials such as ceramics.
貫通穴14の径は、蒸気の放散を確実に行うため、0.
01m程度以上であることが望ましい。The diameter of the through hole 14 is set to 0.000 mm to ensure the dissipation of steam.
It is desirable that the distance be approximately 0.1 m or more.
また貫通穴14の径が大き過ぎると、封止樹脂7のモー
ルド時に貫通穴14の内部が封止樹脂7で完全に満たさ
れ1貫通穴14内部の封止樹脂7と絶縁フィルム11が
強固に接着するので、蒸気放散穴としての効果が得られ
なくなる。貫通穴14内部が封止樹脂7で完全に満たさ
れないためには。Furthermore, if the diameter of the through hole 14 is too large, the inside of the through hole 14 will be completely filled with the sealing resin 7 when the sealing resin 7 is molded, and the sealing resin 7 and the insulating film 11 inside the through hole 14 will become strong. Since the holes are glued together, the effect as a vapor dissipation hole cannot be obtained. To prevent the inside of the through hole 14 from being completely filled with the sealing resin 7.
穴径が1++m程度以下であることが望ましい、穴の形
状は、円形だけでなく、だ円形、角形など任意の形状で
よい。また絶縁フィルム11に貫通穴14を加工する時
期は、リード3への接着の前後いずれでもよい。It is desirable that the diameter of the hole is about 1++ m or less, and the shape of the hole may be not only circular but also any arbitrary shape such as oval or square. Further, the through holes 14 may be formed in the insulating film 11 either before or after adhesion to the leads 3.
半導体素子1を絶縁フィルム11に固定するには、接着
剤4を使用しなくても、前記プリプレグのような材質の
絶縁フィルム11を使用することにより、絶縁フィルム
11と接着剤4を兼用化することもできる。しかし、半
導体素子1を絶縁フィルム11に強固に接着すると、半
導体素子1には高い熱応力が作用し、半導体素子1の割
れを生じやすくなるので、なるべく剛性あるいは接着力
の弱い接着剤4を使用して半導体素子1を固定すること
が望ましい。接着剤4の塗布時における粘度が高く、ま
た貫通穴14の径が小さい場合には、絶縁フィルム11
上全面に接着剤4を塗布しても、貫通穴14から接着剤
4が流出することはない。In order to fix the semiconductor element 1 to the insulating film 11, the insulating film 11 made of a material such as prepreg can be used as the insulating film 11 and the adhesive 4, without using the adhesive 4. You can also do that. However, if the semiconductor element 1 is firmly adhered to the insulating film 11, high thermal stress will act on the semiconductor element 1, making it more likely that the semiconductor element 1 will crack, so use an adhesive 4 with as much rigidity or weak adhesive strength as possible. It is desirable to fix the semiconductor element 1 by doing so. If the adhesive 4 has a high viscosity when applied and the diameter of the through hole 14 is small, the insulating film 11
Even if the adhesive 4 is applied to the entire upper surface, the adhesive 4 will not flow out from the through hole 14.
しかし貫通穴14からの接着剤4の流出が問題になる場
合には1貫通穴】4を設ける位置と接着剤4を塗布する
位置を分離することが望ましい。接着剤4が貫通穴14
から流出することなく1貫通穴14内部に入り込むこと
は差支えない、封止樹脂7が流入する場合と異なり、絶
縁フィルム11との接着力が弱いためである。However, if leakage of the adhesive 4 from the through hole 14 becomes a problem, it is desirable to separate the position where the through hole 4 is provided and the position where the adhesive 4 is applied. Adhesive 4 is inserted into through hole 14
This is because the adhesive force with the insulating film 11 is weak, unlike the case where the sealing resin 7 flows into the first through hole 14 without flowing out.
本実施例によれば、はんだ付は実装時の加熱によって半
導体素子1と絶縁フィルム11の間に蒸気が発生しても
、蒸気は絶縁フィルム11に設けた貫通穴14を通って
、リード3に到達し、リード3と封止樹脂7の界面の微
小なすき間を経て樹脂封止型半導体装置外部に放散され
るので、半導体装置内部の圧力上昇が軽減され、したが
って封止樹脂7のクラック発生を防止することができる
。According to this embodiment, even if vapor is generated between the semiconductor element 1 and the insulating film 11 due to heating during soldering, the vapor passes through the through hole 14 provided in the insulating film 11 and reaches the leads 3. The resin-sealed semiconductor device reaches the outside of the resin-sealed semiconductor device through a small gap between the leads 3 and the sealing resin 7, thereby reducing the pressure increase inside the semiconductor device and thus preventing the occurrence of cracks in the sealing resin 7. It can be prevented.
貫通穴14を設ける位置としては、第1図の例に示した
ように絶縁フィルム11の全面に多数の貫通穴を設ける
ことによって、リード3の配置に無関係に穴加工を行う
ことができ、また穴加工済みの絶縁フィルム11をリー
ド3に接着する際にも、高精度な位置決めが不要となる
。As for the position where the through holes 14 are provided, by providing a large number of through holes on the entire surface of the insulating film 11 as shown in the example of FIG. 1, the holes can be formed regardless of the arrangement of the leads 3. Also when bonding the insulating film 11 with holes processed to the leads 3, highly accurate positioning is not required.
第2図は1本発明の他の実施例である樹脂封止型半導体
装置において、絶縁フィルム以外のり一部から上の部分
を取り除いた平面図である。貫通穴14をリード3の直
上の位置に設けることによって、半導体素子1と絶縁フ
ィルム11の間に発生した蒸気を確実にリード3に導く
ことができる。FIG. 2 is a plan view of a resin-sealed semiconductor device according to another embodiment of the present invention, with the upper portion removed from a portion of the resin-sealed semiconductor device other than the insulating film. By providing the through hole 14 directly above the lead 3, vapor generated between the semiconductor element 1 and the insulating film 11 can be reliably guided to the lead 3.
個々の貫通穴14は、一つの貫通穴全体が1本のリード
の上に位置していても、また一つの貫通穴の一部分のみ
がリードの上にかかつていても、さらに一つの貫通穴が
複数のリードの上にまたがっていてもよい。リード3と
封止樹脂7の界面からの蒸気の放散を容易にするために
は、IIt通穴14を設ける位置は、リード3の外部引
出し部にできる限り近い部分とすることが望ましい1貫
通穴14の一部あるいは全体を上記のようにリード3の
直上の位置に配することによって、貫通穴14の個数あ
るいは面積を必要最小限とすることができるので、貫通
穴14を設ける位置と、半導体素子1固定のための接着
剤塗布位置とを容易に分離することが可能となる。Each through-hole 14 may have an additional through-hole, even if the entire through-hole is located over one lead, or only a portion of one through-hole is over a lead. It may straddle multiple leads. In order to facilitate the dissipation of vapor from the interface between the lead 3 and the sealing resin 7, it is preferable that the IIt through hole 14 be located as close as possible to the external extraction part of the lead 3. By arranging part or all of the through holes 14 directly above the leads 3 as described above, the number or area of the through holes 14 can be minimized. It becomes possible to easily separate the adhesive application position for fixing the element 1.
第3図は、本発明のさらに他の実施例である樹脂封止型
半導体装置の平面図である。この図においても第2図同
様、絶縁フィルム11以外のり一部3から上の部分を取
り除いて示しである。第3図では、絶縁フィルム11の
下部に半導体素子1よりも寸法の小さいタブ2が設けら
れており、タブ2とリード3の両方に絶縁フィルム11
を接着することによって、半導体素子1の固定を確実な
ものとしている。このような構造の樹脂封止型半導体装
置の場合にも、絶縁フィルム11に貫通穴14を設ける
ことによって、半導体素子1と絶縁フィルム11との間
の蒸気の放散を図ることができる。この場合、貫通穴1
4は、リード3.タブ2いずれの上部に設けても蒸気の
放散を図ることができる。しかし、タブ2の幅が広い場
合にタブ2の表面に蒸気を導くと、広い面積に蒸気圧が
作用することになるので、封止樹脂7に高い応力が発生
し、クラックを生じやすくなる。したがって貫通穴14
は、リード3の上部のみに設けることが望ましい。FIG. 3 is a plan view of a resin-sealed semiconductor device according to still another embodiment of the present invention. In this figure, as in FIG. 2, the upper part of the glue part 3 other than the insulating film 11 is removed. In FIG. 3, a tab 2 smaller in size than the semiconductor element 1 is provided at the bottom of the insulating film 11, and the insulating film 11 is attached to both the tab 2 and the lead 3.
By adhering the semiconductor element 1, the fixation of the semiconductor element 1 is ensured. Even in the case of a resin-sealed semiconductor device having such a structure, vapor dissipation between the semiconductor element 1 and the insulating film 11 can be achieved by providing the through holes 14 in the insulating film 11. In this case, through hole 1
4 is lead 3. Steam can be dissipated no matter which tab 2 is provided above. However, when the width of the tab 2 is wide, if steam is introduced to the surface of the tab 2, the steam pressure will act on a wide area, so high stress will be generated in the sealing resin 7, making it more likely to cause cracks. Therefore, the through hole 14
It is desirable to provide only the upper part of the lead 3.
本発明によれば、半導体素子と絶縁フィルムの間に蒸気
が発生しても、蒸気は絶縁フィルムに設けた貫通穴を経
てリードに到達し、リードと封止樹脂の界面の微小なす
き間から外部に放散されるので、はんだ付は実装時に発
生する封止樹脂のクラックを防止することができる。According to the present invention, even if steam is generated between the semiconductor element and the insulating film, the steam reaches the leads through the through holes provided in the insulating film, and is released from the outside through the minute gap at the interface between the leads and the sealing resin. Soldering can prevent cracks in the sealing resin that occur during mounting.
第1図は本発明の樹脂封止型半導体装置の一実施例を示
す断面図、第2図は本発明の他の実施例を示し、絶縁フ
ィルム以外のリードから上の部分を取り除いた平面図、
第3図は本発明のさらに他の実施例を示し、絶縁フィル
ム以外のリードから上の部分を取り除いた平面図、第4
図は従来の樹脂対1ヒ型半導体装置を示す断面図、第5
図は第4図の樹脂封止型半導体装置のリードから上の部
分の封止樹脂を取り除いた状態での平面図、第6図は従
来の他の樹脂封止型半導体装置を示す断面図、第7図は
第6図の樹脂封止型半導体装置のリードから上の部分の
封止樹脂を取り除いた状態での平面図、第8図は第6図
の樹脂封止型半導体装置における封止樹脂のクラック発
生メカニズムを示す断面図である。
1・・・半導体素子、2・・・タブ、3・・・リード、
4・・・接着剤、5・・・端子、6・・・金属細線、7
・・・封止樹脂、8・・・タブ吊りリード、9・・・リ
ード固定部分の長さ、10・・・金属細線とリードの接
続部、11・・・絶縁フィルム、12・・・蒸気、13
・・クラック、14・・・貫通穴。
、7FIG. 1 is a cross-sectional view showing one embodiment of the resin-sealed semiconductor device of the present invention, and FIG. 2 is a plan view showing another embodiment of the present invention, with the upper part of the lead other than the insulating film removed. ,
FIG. 3 shows still another embodiment of the present invention, and is a plan view with the upper portion of the lead other than the insulating film removed;
The figure is a cross-sectional view showing a conventional resin-type semiconductor device.
The figure is a plan view of the resin-sealed semiconductor device shown in FIG. 4 with the upper part of the molding resin removed from the leads, and FIG. 6 is a cross-sectional view of another conventional resin-sealed semiconductor device. Fig. 7 is a plan view of the resin-sealed semiconductor device shown in Fig. 6 with the upper part of the sealing resin removed from the lead, and Fig. 8 is the sealing of the resin-sealed semiconductor device shown in Fig. 6. FIG. 3 is a cross-sectional view showing the mechanism of crack generation in resin. 1... Semiconductor element, 2... Tab, 3... Lead,
4...Adhesive, 5...Terminal, 6...Thin metal wire, 7
...Sealing resin, 8...Tab hanging lead, 9...Length of lead fixing part, 10...Connection part between thin metal wire and lead, 11...Insulating film, 12...Steam , 13
...Crack, 14...Through hole. ,7
Claims (1)
を封止樹脂でモールドし、複数のリードを介して封止樹
脂内外の電気接続を行う構造の樹脂封止型半導体装置に
おいて、リードの一部を半導体素子の直下部に配設し、
その上に、厚さ方向に1箇所以上の貫通穴を設けた絶縁
フィルムを介して半導体素子を搭載せしめたことを特徴
とする樹脂封止型半導体装置。 2、貫通穴の一部あるいは全体が、半導体素子の下部に
配設されたリードの直上の位置となるようにした特許請
求の範囲第1項記載の樹脂封止型半導体装置。 3、絶縁フィルムの材質が、熱硬化性樹脂である特許請
求の範囲第1項記載の樹脂封止型半導体装置。[Claims] 1. A resin-sealed semiconductor having a structure in which a semiconductor device is mounted on a lead frame, its periphery is molded with a sealing resin, and electrical connections inside and outside the sealing resin are made via a plurality of leads. In the device, a part of the lead is placed directly below the semiconductor element,
A resin-sealed semiconductor device characterized in that a semiconductor element is mounted thereon via an insulating film having one or more through holes in the thickness direction. 2. The resin-sealed semiconductor device according to claim 1, wherein part or all of the through hole is located directly above a lead disposed below the semiconductor element. 3. The resin-sealed semiconductor device according to claim 1, wherein the material of the insulating film is a thermosetting resin.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62289360A JPH01132149A (en) | 1987-11-18 | 1987-11-18 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62289360A JPH01132149A (en) | 1987-11-18 | 1987-11-18 | Resin-sealed semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01132149A true JPH01132149A (en) | 1989-05-24 |
Family
ID=17742196
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62289360A Pending JPH01132149A (en) | 1987-11-18 | 1987-11-18 | Resin-sealed semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01132149A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06163798A (en) * | 1992-07-29 | 1994-06-10 | Samsung Electron Co Ltd | Semiconductor package and its manufacture |
US6072243A (en) * | 1996-11-26 | 2000-06-06 | Sharp Kabushiki Kaisha | Semiconductor integrated circuit device capable of surely electrically insulating two semiconductor chips from each other and fabricating method thereof |
JP2009283663A (en) * | 2008-05-22 | 2009-12-03 | Powertech Technology Inc | Semiconductor package and lead frame |
-
1987
- 1987-11-18 JP JP62289360A patent/JPH01132149A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06163798A (en) * | 1992-07-29 | 1994-06-10 | Samsung Electron Co Ltd | Semiconductor package and its manufacture |
US6072243A (en) * | 1996-11-26 | 2000-06-06 | Sharp Kabushiki Kaisha | Semiconductor integrated circuit device capable of surely electrically insulating two semiconductor chips from each other and fabricating method thereof |
JP2009283663A (en) * | 2008-05-22 | 2009-12-03 | Powertech Technology Inc | Semiconductor package and lead frame |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0502710B1 (en) | Flexible film semiconductor package | |
US5378656A (en) | Leadframe, semiconductor integrated circuit device using the same, and method of and process for fabricating the same | |
KR960016239B1 (en) | Semiconductor device | |
KR100200254B1 (en) | Semiconductor device and manufacture | |
JPH09246432A (en) | Package having electronic device sealed therein with flexible material surrounded by plastic frame member | |
KR100225333B1 (en) | Lead frame and semiconductor device | |
GB2213640A (en) | Electronic device package with peripheral carrier structure of a different material | |
JPH0750359A (en) | Semiconductor package with lead separable from support body | |
JPH01315166A (en) | Integrated circuit package using plastic sealing material | |
JPH0373559A (en) | Semiconductor device and manufacture thereof | |
KR870009461A (en) | Heat Resistant Plasma Supporting Device | |
US6191490B1 (en) | Semiconductor package having a separated die pad | |
US6987313B2 (en) | Semiconductor device | |
US5652184A (en) | Method of manufacturing a thin semiconductor package having many pins and likely to dissipate heat | |
KR100346671B1 (en) | Plastic molded type semiconductor device and method of manufacturing the same | |
US6090237A (en) | Apparatus for restraining adhesive overflow in a multilayer substrate assembly during lamination | |
JPH04306865A (en) | Semiconductor device and manufacture thereof | |
JPH01132149A (en) | Resin-sealed semiconductor device | |
US5278101A (en) | Semiconductor device and method for manufacturing the same | |
JPH04158556A (en) | Reasin-sealed type semiconductor device | |
JPH09232348A (en) | Packaging method of brittle element | |
JP3572764B2 (en) | Bare chip sealing method and bare chip sealing substrate | |
US6091135A (en) | Lead frame with pre-mold paddle for a semiconductor chip package | |
JPS63249358A (en) | Resin encapsulated semiconductor device | |
JPH03161958A (en) | Structure of plastic pin grid array type semiconductor package |