JPH01125957A - Superconductor device - Google Patents
Superconductor deviceInfo
- Publication number
- JPH01125957A JPH01125957A JP62284630A JP28463087A JPH01125957A JP H01125957 A JPH01125957 A JP H01125957A JP 62284630 A JP62284630 A JP 62284630A JP 28463087 A JP28463087 A JP 28463087A JP H01125957 A JPH01125957 A JP H01125957A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- blocking
- oxide
- film
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000002887 superconductor Substances 0.000 title claims abstract description 8
- 239000000463 material Substances 0.000 claims abstract description 54
- 239000004065 semiconductor Substances 0.000 claims abstract description 40
- 230000000903 blocking effect Effects 0.000 claims abstract description 39
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 19
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 18
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 239000012535 impurity Substances 0.000 claims abstract description 14
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 claims abstract description 12
- 229910001928 zirconium oxide Inorganic materials 0.000 claims abstract description 11
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 10
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 9
- 229910052697 platinum Inorganic materials 0.000 claims description 5
- 229910052727 yttrium Inorganic materials 0.000 claims description 4
- 229910021332 silicide Inorganic materials 0.000 claims description 3
- VWQVUPCCIRVNHF-UHFFFAOYSA-N yttrium atom Chemical compound [Y] VWQVUPCCIRVNHF-UHFFFAOYSA-N 0.000 claims description 3
- 229910052845 zircon Inorganic materials 0.000 claims description 3
- GFQYVLUOOAAOGM-UHFFFAOYSA-N zirconium(iv) silicate Chemical compound [Zr+4].[O-][Si]([O-])([O-])[O-] GFQYVLUOOAAOGM-UHFFFAOYSA-N 0.000 claims description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 2
- 229910052750 molybdenum Inorganic materials 0.000 claims description 2
- 239000011733 molybdenum Substances 0.000 claims description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- 239000004332 silver Substances 0.000 claims description 2
- VEALVRVVWBQVSL-UHFFFAOYSA-N strontium titanate Chemical compound [Sr+2].[O-][Ti]([O-])=O VEALVRVVWBQVSL-UHFFFAOYSA-N 0.000 claims description 2
- 229910052719 titanium Inorganic materials 0.000 claims description 2
- 239000010936 titanium Substances 0.000 claims description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 2
- 229910052721 tungsten Inorganic materials 0.000 claims description 2
- 239000010937 tungsten Substances 0.000 claims description 2
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 claims 1
- 239000010408 film Substances 0.000 abstract description 57
- 239000010409 thin film Substances 0.000 abstract description 14
- 239000000919 ceramic Substances 0.000 abstract description 11
- 238000004544 sputter deposition Methods 0.000 abstract description 6
- 238000000034 method Methods 0.000 description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910010293 ceramic material Inorganic materials 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 239000010410 layer Substances 0.000 description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 238000000137 annealing Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- 238000010669 acid-base reaction Methods 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 229910052574 oxide ceramic Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 239000012808 vapor phase Substances 0.000 description 3
- WKBOTKDWSSQWDR-UHFFFAOYSA-N Bromine atom Chemical compound [Br] WKBOTKDWSSQWDR-UHFFFAOYSA-N 0.000 description 2
- 238000004435 EPR spectroscopy Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 229910052788 barium Inorganic materials 0.000 description 2
- GDTBXPJZTBHREO-UHFFFAOYSA-N bromine Substances BrBr GDTBXPJZTBHREO-UHFFFAOYSA-N 0.000 description 2
- 229910052794 bromium Inorganic materials 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000011049 filling Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 229910052749 magnesium Inorganic materials 0.000 description 2
- 239000011777 magnesium Substances 0.000 description 2
- 239000011224 oxide ceramic Substances 0.000 description 2
- 229910052712 strontium Inorganic materials 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
- 239000005751 Copper oxide Substances 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- OBNDGIHQAIXEAO-UHFFFAOYSA-N [O].[Si] Chemical compound [O].[Si] OBNDGIHQAIXEAO-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000003929 acidic solution Substances 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000012300 argon atmosphere Substances 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000000460 chlorine Substances 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 229910000431 copper oxide Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 229910052747 lanthanoid Inorganic materials 0.000 description 1
- 150000002602 lanthanoids Chemical class 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 229910052573 porcelain Inorganic materials 0.000 description 1
- 230000009257 reactivity Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000000682 scanning probe acoustic microscopy Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- CIOAGBVUUVVLOB-UHFFFAOYSA-N strontium atom Chemical compound [Sr] CIOAGBVUUVVLOB-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
Landscapes
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
「発明の利用分野」
本発明は、セラミック系超電導材料を用いた超電導体装
置に関する０本発明は超電導体装置において特に、半導
体装置の相互配線の一部または全部を超電導材料で形成
するため、この超電導の電極・リードに密接してブロッ
キング用絶縁膜を設け、これと半導体との間に酸化珪素
、窒化珪素またはこれらを主成分とする被膜を形成する
とともに、半導体の電極部はブロッキング用導電膜を同
時に設け、安定な半導体装置を７０〜１００に好ましく
は７７に以上の温度で動作せしめんとするものである。Detailed Description of the Invention "Field of Application of the Invention" The present invention relates to a superconductor device using a ceramic superconducting material. Since the superconducting electrode/lead is formed using a blocking insulating film, a blocking insulating film is provided in close contact with the superconducting electrode/lead, and a film of silicon oxide, silicon nitride, or a film mainly composed of these is formed between this and the semiconductor. The electrode portion is provided with a blocking conductive film at the same time, so that a stable semiconductor device can be operated at a temperature of 70° to 100° C., preferably 77° C. or higher.
「従来の技術」
従来、超電導材料はＮｂ−Ｇｅ系（例えばＮｂｚＧｅ）
等の金属材料を線材として用い、超電導マグネットとし
て用いられるに限られていた。"Conventional technology" Conventionally, superconducting materials are Nb-Ge (for example, NbzGe)
The use of metal materials such as wire rods was limited to use as superconducting magnets.
また最近はセラミック材料で超電導を呈し得ることが知
られていた。しかしこれもインゴット構造であり、薄膜
の超電導材料の形成はまった（提案されていない。Furthermore, it has recently been known that ceramic materials can exhibit superconductivity. However, this is also an ingot structure, and the formation of thin films of superconducting materials has not been proposed.
いわんや、この薄膜をフォトリソグラフィ技術によりパ
ターニングする方法も、またこれをさらに半導体装置の
相互配線の一部に用いることもまったく知られていない
。Furthermore, there is no known method for patterning this thin film using photolithography, nor is there any known method for patterning this thin film using photolithography, nor is there any known method for using this thin film as part of the interconnections of a semiconductor device.
「従来の問題点」
半導体集積回路は近年益々微細化するとともに高速動作
を要求されている。また微細化とともに半導体素子の発
熱による信頼性低下また発熱部の動作速度の低下が問題
となっていた。"Conventional Problems" In recent years, semiconductor integrated circuits have become increasingly finer and are required to operate at higher speeds. Further, with miniaturization, problems have arisen in that reliability is lowered due to heat generated by semiconductor elements and operating speed of the heat generating portion is lowered.
このため、もし半導体素子を液体窒素温度で動作させん
とすると、その素子での電子およびホールの移動度は室
温のそれに比べて３〜４倍も高めることができ、ひいて
は素子の周波数特性を向上できる。Therefore, if a semiconductor device is operated at liquid nitrogen temperature, the mobility of electrons and holes in the device can be increased 3 to 4 times compared to that at room temperature, which in turn improves the frequency characteristics of the device. can.
かかる問題を解決するため、超電導体半導体装置におい
て、そのリード線はセラミック材料の超電導材料よりな
る試みがある。しかしかかる酸化物セラミック超電導材
料はきわめてイオン化傾向の大きいＢａ（バリウム）等
を用いているため、これらと反応し、酸化珪素、窒化珪
素またはこれらを主成分とする絶縁膜と酸化物超電導材
料とが互いに密接してリード等として集積回路を構成さ
せることができない。In order to solve this problem, there has been an attempt to make the lead wire of a superconductor semiconductor device made of a superconducting ceramic material. However, since such oxide ceramic superconducting materials use Ba (barium), etc., which have a very strong tendency to ionize, they react with these materials, and the oxide superconducting material and silicon oxide, silicon nitride, or an insulating film containing these as main components. It is not possible to configure an integrated circuit as leads or the like in close contact with each other.
「問題を解決すべき手段」
本発明はかかる匝題点を解決するため、半導体装置にお
ける相互配線に極低温（２０〜１００Ｋ好ましくは７７
に以上の温度）で超電導を呈する酸化物超電導セラミッ
ク材料を用いるものである。その際に、かかる材料の下
面にかかる材料と基板材料または基板上の酸化珪素、窒
化珪素との間に互いの酸−塩基反応を防ぐいわゆるブロ
ッキング材料を介在せしめた構造としたものである。"Means to Solve the Problem" In order to solve this problem, the present invention provides interconnections in semiconductor devices at extremely low temperatures (20 to 100K, preferably 77K).
This method uses an oxide superconducting ceramic material that exhibits superconductivity at temperatures above . In this case, a so-called blocking material is interposed between the material on the lower surface of the material and the substrate material or silicon oxide or silicon nitride on the substrate to prevent mutual acid-base reaction.
このブロッキング材料は、酸化ジルコニウム、ＹＳＺ
（イットリウム・スタビライズド・ジルコン）。This blocking material is zirconium oxide, YSZ
(Yttrium stabilized zircon).
チタン酸ストロンチウム、酸化物超電導材料と同一主成
分の非超電導材料例えばアルミニウム、マグネシウムが
５〜１０体積％混入した非超電導酸化物セラミック材料
またはこれらの多層膜（例えば下地の酸化珪素膜上に酸
化ジルコニウム、さらにその上に酸化物非超電導セラミ
ックス、さらにその上に上地の酸化物超電導セラミック
材料構造を有する膜）よりなる。Strontium titanate, a non-superconducting material that has the same main components as the oxide superconducting material, such as a non-superconducting oxide ceramic material containing 5 to 10% by volume of aluminum or magnesium, or a multilayer film of these (for example, zirconium oxide on the underlying silicon oxide film) , an oxide non-superconducting ceramic material thereon, and an oxide superconducting ceramic material structure thereon).
本発明はこれらのブロッキング用の膜を０．１〜１０μ
ｍの厚さで形成した半導体、特に好ましくは耐熱性を有
する半導体、例えば単結晶シリコン半導体基板を用いて
、この半導体に複数の素子、例えば絶縁ゲイト型電界効
果トランジスタ、バイポーラ型トランジスタ、５ＩＴ（
静電誘導型トランジスタ）、抵抗、キャパシタを設ける
。そしてこの半導体基板上のパッシベーション被膜とし
て一般に用いられている酸化珪素、窒化珪素またはこれ
らを主成分とする絶縁膜をコンタクト用の開口部以外に
設ける。本発明はこれら絶縁膜上にブロッキング作用を
有する絶縁膜を主成分上する被膜を設け、この上に電気
抵抗が零または零に近（なる酸化物超電導材料を形成す
る。これをフォトリソグラフィ技術により選択エッチを
してバターニングし、リード等として作用させる。この
エツチングは混成法を用いる場合は、酸性溶液を用いれ
ばよい。また気相法を用いる場合は臭素または塩素を用
いた異方性プラズマエッチを行う。更にその工程の前ま
たは後に５００〜１０００°Ｃで熱アニールを特に酸素
、活性酸素等の酸化性雰囲気で１〜２０時間もの長時間
行うことにより、超電導現象を極低温で呈するようにセ
ラミック材料の結晶構造を改質する。これらの工程を１
回または複数回繰り返すことにより、１層または各層の
相互配線を電気抵抗が零の材料により形成する。The present invention uses these blocking membranes with a thickness of 0.1 to 10μ.
A semiconductor, particularly preferably a heat-resistant semiconductor, such as a single crystal silicon semiconductor substrate, is formed to a thickness of m, and a plurality of elements, such as an insulated gate field effect transistor, a bipolar transistor, and
A static induction transistor), a resistor, and a capacitor are provided. As a passivation film on the semiconductor substrate, silicon oxide, silicon nitride, or an insulating film mainly composed of silicon oxide or silicon nitride, which is commonly used, is provided in areas other than the contact openings. In the present invention, a film mainly composed of an insulating film having a blocking effect is provided on these insulating films, and an oxide superconducting material having an electrical resistance of zero or close to zero is formed on this film using photolithography technology. Selective etching is performed and patterned to act as a lead etc. When using a hybrid method, an acidic solution may be used for this etching. When using a gas phase method, an anisotropic plasma using bromine or chlorine can be used for this etching. Etching is performed.Furthermore, thermal annealing is performed at 500 to 1000°C for a long period of time, especially in an oxidizing atmosphere such as oxygen or active oxygen, for a long time of 1 to 20 hours before or after this process, so that the superconducting phenomenon can be exhibited at extremely low temperatures. Modify the crystal structure of the ceramic material.These steps are performed in 1
By repeating this process one or more times, interconnections in one layer or each layer are formed of a material with zero electrical resistance.
「作用」
かくして半導体装置のリードの一部または全部に酸化物
超電導材料を用いることができた。そして半導体素子、
特にシリコン半導体素子に広く用いられる酸素珪素また
は窒化珪素等の珪素を成分とする絶縁材料と酸化物超電
導材料が直接密接しないように、その間にブロッキング
層を構成せしめることにより、酸化物超電導材料の特性
向上のための５００〜１０００℃の熱アニールでも下地
材料への反応を防ぎ耐えることができた。"Operation" In this way, the oxide superconducting material could be used for part or all of the leads of the semiconductor device. and semiconductor elements,
In particular, the properties of the oxide superconducting material can be improved by forming a blocking layer between the oxide superconducting material and the insulating material containing silicon such as oxygen silicon or silicon nitride, which are widely used in silicon semiconductor devices, so that they do not come into direct contact with each other. Even thermal annealing at 500 to 1,000°C for improvement was able to be withstood by preventing reactions to the underlying material.
かかる半導体装置を液体窒素温度で動作させると、その
電子またはホール移動度は３〜４倍に向上させることが
できる。加えて、そのリード、電極の電気抵抗を零また
は零に等しくすることが可能となる。周波数特性の遅れ
を示すＣＲ時定数におけるＲ（抵抗）を零とすることが
でき、そのためきわめて高速動作をさせることが可能と
なる。When such a semiconductor device is operated at liquid nitrogen temperature, its electron or hole mobility can be improved three to four times. In addition, it becomes possible to make the electrical resistance of the leads and electrodes zero or equal to zero. R (resistance) in the CR time constant, which indicates a delay in frequency characteristics, can be made zero, and therefore extremely high-speed operation is possible.
以下に本発明の実施例を図面に従って説明する。Embodiments of the present invention will be described below with reference to the drawings.
「実施例１」
第１図は本発明の超電導半導体装置の製造工程の実施例
を示す。"Example 1" FIG. 1 shows an example of the manufacturing process of a superconducting semiconductor device of the present invention.
第１図（Ａ）において、シリコン半導体基板（１）上に
酸化珪素絶縁膜（２−１）を形成する。In FIG. 1(A), a silicon oxide insulating film (2-1) is formed on a silicon semiconductor substrate (1).
第１図（Ａ）における半導体基板（１）内にはＩＧＦＥ
Ｔ（絶縁ゲイト型半導体装置）、バイポーラトランジス
タの如きアクティブ型素子または抵抗、キャパシタの如
きパッシブ型素子が予め設けられている。そしてこれら
のアクティブ型またはパッシブ型の素子が設けられ、か
かる素子のコンタクトと連結させるための不純物領域が
半導体上部に設けられている。そしてこの不純物領域上
の絶縁膜の一部に開口（８）が形成されている。本発明
の実施例では絶縁膜として半導体上に酸化珪素を０．３
μｍの厚さに形成した。そしてこの酸化珪素膜に所定の
位置にフォトエツチング法により電極用コンタクト・ホ
ール（開口）を作製した。このため、絶縁膜（２−１）
、 （２−２）の開口は同じ位置に同じ大きさで形成
した。さらにこれらの上面に耐酸−塩基反応用ブロッキ
ング絶縁膜（２−２）である酸化ジルコニウムをスパッ
タ法で０．１〜２μ例えば０．４ μｍの厚さに形成し
た。そしてこれら多層構造の絶縁膜（２）には電極用コ
ンタクト部が前記した電極用口（８）としている。There is an IGFE in the semiconductor substrate (1) in FIG. 1(A).
T (insulated gate type semiconductor device), active type elements such as bipolar transistors, or passive type elements such as resistors and capacitors are provided in advance. These active or passive elements are provided, and impurity regions for connection with contacts of these elements are provided on the semiconductor. An opening (8) is formed in a part of the insulating film over this impurity region. In the embodiment of the present invention, 0.3% of silicon oxide is deposited on the semiconductor as an insulating film.
It was formed to a thickness of μm. Contact holes (openings) for electrodes were then formed at predetermined positions in this silicon oxide film by photoetching. Therefore, the insulating film (2-1)
, (2-2) were formed at the same position and with the same size. Furthermore, zirconium oxide as a blocking insulating film (2-2) for acid-base reactions was formed on the upper surfaces of these by sputtering to a thickness of 0.1 to 2 μm, for example, 0.4 μm. The insulating film (2) having a multilayer structure has an electrode contact portion as the electrode opening (8) described above.
さらに第１図（Ａ）において、開口（８）には酸化物超
電導セラミックスと半導体とが酸−塩基反応を生じない
ようにブロッキング用導電膜（２１）がブロッキング用
絶縁膜上にまでわたって設けられている。Furthermore, in FIG. 1(A), a blocking conductive film (21) is provided in the opening (8) over the blocking insulating film to prevent an acid-base reaction between the oxide superconducting ceramic and the semiconductor. It is being
第１図（Ｂ）においてはこれらの上面に超電導を呈すべ
き材料（３）を薄膜状に形成する。この薄膜はスパッタ
法で形成した。スクリーン印刷法、真空蒸着法または気
相法（ＣＶＤ法）特に有磁湯気相法で行ってもよい。In FIG. 1(B), a thin film of material (3) to exhibit superconductivity is formed on the upper surfaces of these. This thin film was formed by sputtering. Screen printing methods, vacuum evaporation methods or vapor phase methods (CVD methods), particularly porcelain vapor phase methods, may also be used.
成膜した酸化物超電導材料は元素周期表ＩＩａ、ｍａお
よび銅の酸化物よりなる化合物であり、形成された酸化
物超電導材料の化学式は一般的には（Ａ＋−ｘＢｘ）Ｃ
ｕｚＯｗ、ｘ＝ｏ、１〜ＬＶ ＝ ２〜４好ましくは２
．５〜３．５＋ｚ ＝１．０〜４．０好ましくは１．５
〜３．５゜ｗ−４，０〜１Ｏ１０好ましくは６〜８であ
る。ＡとしてＢａ、Ｓｒ、Ｃａ、、ＢとしてＹまたはｙ
ｂ等のランタノイド元素を用いる。例えばｘ ＝０．６
７＋ｙ＝３．ｚ ＝３．Ｈ＝６〜８で示される（ＹＢａ
ｇ）Ｃｕ＋Ｏｉ 〜ｇを用いた。The formed oxide superconducting material is a compound consisting of oxides of elements IIa and ma in the periodic table and copper, and the chemical formula of the formed oxide superconducting material is generally (A+-xBx)C
uzOw, x=o, 1~LV=2~4 preferably 2
．． 5-3.5+z = 1.0-4.0 preferably 1.5
-3.5°w-4.0-1O10, preferably 6-8. A as Ba, Sr, Ca, B as Y or y
A lanthanide element such as b is used. For example x = 0.6
7+y=3. z=3. Indicated by H=6 to 8 (YBa
g) Cu+Oi ~g was used.
スパッタに際してはその実施例として、基板温度４５０
°Ｃ、アルゴン雰囲気、周波数５０Ｈｚ、出力１００Ｗ
で行った。かかる場合のセラミック材料の膜厚を０．２
〜２μ１１例えば１μｍの厚さとした。この後、酸素中
７００°Ｃ（１０時間）でアニールを行なった。すると
この酸化動磁電導セラミックス（３）とその下側に予め
作られている酸化珪素（２−１）とは酸化ジルコニウム
（２−２）がブロッキング材料となり反応を防止するこ
とができた。ちなみにこの酸化ジルコニウムが無い場合
は、約２０分で酸化珪素と超電導セラミックスの薄膜と
は一体化してしまうことがオージェ分光の観察により明
らかになった。その後この薄膜がより結晶を成長させや
すくすべ（Ｔｃオンセット＝ ９３Ｋ （抵抗は９３に
より下がりはじめ、実験的には８３にで抵抗が実質的に
零になった）の超電導薄膜を作ることができた。もちろ
んこのブロッキング用薄膜がない場合に超電導特性をま
ったく有さないことはいうまでもない。In sputtering, as an example, the substrate temperature is 450°C.
°C, argon atmosphere, frequency 50Hz, output 100W
I went there. In this case, the thickness of the ceramic material is 0.2
~2μ11 For example, the thickness was 1 μm. After this, annealing was performed at 700°C (10 hours) in oxygen. Then, the zirconium oxide (2-2) became a blocking material between the oxidized magneto-conductive ceramic (3) and the silicon oxide (2-1) previously prepared below it, and was able to prevent the reaction. Incidentally, Auger spectroscopy has revealed that in the absence of this zirconium oxide, silicon oxide and the superconducting ceramic thin film become integrated in about 20 minutes. Afterwards, we were able to create a superconducting thin film in which this thin film facilitated crystal growth (Tc onset = 93K (resistance began to decrease at 93, and experimentally the resistance became essentially zero at 83). Of course, it goes without saying that without this blocking thin film, there is no superconducting property at all.
この後、この薄膜をフォトリソグラフィ技術で所定のパ
ターニングを行った。かくして素子の電極および入力、
出力端子との接続を含む相互配線用の電極およびリード
（５）を構成すべくフォトレジストコートし、水で希釈
した酸溶液例えば硫酸または硝酸で選択除去（エッチ）
を行い第１図（Ｃ）を得た。Thereafter, this thin film was patterned in a predetermined manner using photolithography technology. Thus the element's electrodes and input,
Coated with photoresist to form electrodes and leads (5) for interconnection, including connections with output terminals, and selectively removed (etched) with an acid solution diluted with water, e.g. sulfuric acid or nitric acid.
Figure 1 (C) was obtained.
この選択エッチに臭素（Ｂｒｚ）ガスを用いたプラズマ
エツチングを行ってもよい。かかる場合は、ＥＣＲ（電
子スピン共鳴）の装置の異方性エツチングが特に有効で
あった。Plasma etching using bromine (Brz) gas may be performed for this selective etching. In such cases, anisotropic etching using an ECR (electron spin resonance) device was particularly effective.
このパターニングは前記した超電導用薄膜を形成した後
に行い、さらにその後に熱アニールを行ってパターニン
グした相互作用部のみ選択的に結晶化を行うことは有効
である。It is effective to carry out this patterning after forming the above-mentioned superconducting thin film, and then to perform thermal annealing to selectively crystallize only the patterned interaction areas.
この場合は初期状態において結晶粒径が小さいためより
相互配線の微細パターンが可能である。In this case, since the crystal grain size is small in the initial state, a finer interconnection pattern is possible.
第１図（Ｄ）はこの後多層配線を必要に応じて行った。In FIG. 1(D), multilayer wiring was then performed as necessary.
このため層間絶縁物（６）をＰＩＱ（ポリイミド樹脂）
等の有機樹脂で形成し、さらに開口を形成した後、２層
目のリード（７）、（７’）を作製した。そして２層目
として酸化物超電導セラミックスのリード（７）、（７
”）を構成させた。For this reason, the interlayer insulator (6) is made of PIQ (polyimide resin).
After forming an opening, a second layer of leads (7) and (7') was produced. The second layer is oxide superconducting ceramic leads (7) and (7).
”) was configured.
「実施例２」 第２図は本発明の他の実施例を示す。"Example 2" FIG. 2 shows another embodiment of the invention.
図面はＣ，／ＭＯ３ＦＥＴ（相補型ＩＧＦＥＴ）の部分
のみ拡大して示したものである。The drawing shows only the C,/MO3FET (complementary IGFET) portion enlarged.
図面は熱アニールに十分耐え得るシリコン半導体基板（
１）を用いた。さらにＰ型井戸（１５）を埋置してフィ
ールド絶縁膜を例えば酸化珪素（１１）で設けた。一方
のＩＧＦＥＴ（絶縁ゲイト型電界効果半導体装置） （
２０）はゲイト電極（１２）、Ｐ型の導電型の不純物領
域としてのソースまたはドレイン（１３）およびドレイ
ンまたはソース（１４）をＰチャネルＩＧＦＥＴとして
設けた。そしてこの不純物領域上にはブロッキング用導
電膜（２１）を設けている。他方のＩＧＦＥＴ（２０’
）は、ゲイト電極（１２’）、Ｎ型の不純物領域として
のソースまたはドレイン（１３’）、ドレインまたはソ
ース（１４’）として設け、Ｎチャネル型ＩＧＦＥＴと
した。この不純物領域にはブロッキング用導電膜（２１
）を設けている。ゲイト電極（１２） 、 （１２°）
は多結晶シリコンまたは金属シリサイドとし、これらの
電気的連結その他の相互配線（５） 、 （７）を実施
例１と同様の超電導材料で形成した。The drawing shows a silicon semiconductor substrate (
1) was used. Furthermore, a P-type well (15) was buried, and a field insulating film was provided using, for example, silicon oxide (11). One IGFET (insulated gate field effect semiconductor device) (
In 20), a gate electrode (12), a source or drain (13) as a P-type conductivity type impurity region, and a drain or source (14) were provided as a P-channel IGFET. A blocking conductive film (21) is provided on this impurity region. The other IGFET (20'
) were provided as a gate electrode (12'), a source or drain (13') as an N-type impurity region, and a drain or source (14') to form an N-channel type IGFET. This impurity region has a blocking conductive film (21
) has been established. Gate electrode (12), (12°)
was made of polycrystalline silicon or metal silicide, and their electrical connections and other interconnections (5) and (7) were formed of the same superconducting material as in Example 1.
この実施例において、超電導セラミックス（５）の下面
の絶縁膜（２）において、セラミックスに密接する側は
少なくともブロッキング性を有する絶縁膜（２−２）と
その下に酸化珪素（例えば（１１））またはこれとは別
にこれらの上にリンガラス、窒化珪素等の珪素を主成分
とする絶縁膜（２−１）が形成されていてもよい。また
この超電導材料（５）の上面を覆って他の絶縁材料（６
゛）もやはりブロッキング作用を有する絶縁膜、例えば
酸化ジルコニウムをスパッタ法または有機樹脂を塗布法
で設けている。In this example, in the insulating film (2) on the lower surface of the superconducting ceramic (5), the side that is in close contact with the ceramic has at least an insulating film (2-2) having blocking properties and a silicon oxide film (for example (11)) underneath. Alternatively, an insulating film (2-1) mainly composed of silicon such as phosphorus glass or silicon nitride may be formed on these. In addition, another insulating material (6) is used to cover the upper surface of this superconducting material (5).
In the case of (2), an insulating film having a blocking effect, for example, zirconium oxide, is provided by sputtering or an organic resin is applied by coating.
この超電導材料を気相法等で作り、下側基板に設けられ
たアクティブ素子に対し何らの損傷を与えない場合はゲ
イト電極も超電導材料で形成してもよい。If this superconducting material is made by a vapor phase method or the like and does not cause any damage to the active elements provided on the lower substrate, the gate electrode may also be made of the superconducting material.
本発明の実施例においてはブロッキング用材料として酸
化ジルコニウムを主として示した。しかし他のチタン酸
ストロンチウム、ＹＳＺであってもよい。さらにこれら
の上に超電導材料と同一主成分を有し、非超電導性を有
する材料を積層して形成することもそれぞれの材料へ相
互の混合を防ぐため有効であった。さらに２層目の導電
膜（７）としてこの絶縁膜（６）上に超電導材料をリー
ド等として形成してもよい。本発明は酸化物超電導セラ
ミックスの長時間の焼成の際、この超電導材料が１μÅ
以下の厚さしかないため、互いが化合または混合して超
電導性を劣化させないために耐酸−塩基反応性のブロッ
キング特性を有することが重要である。In the examples of the present invention, zirconium oxide was mainly used as the blocking material. However, other strontium titanates, YSZ, may also be used. Furthermore, it was also effective to form a layer of a non-superconducting material having the same main component as the superconducting material and having non-superconducting properties on top of these materials in order to prevent the respective materials from being mixed with each other. Furthermore, a superconducting material may be formed as a lead or the like on this insulating film (6) as a second conductive film (7). In the present invention, when oxide superconducting ceramics are fired for a long time, this superconducting material is
Since the thickness is as follows, it is important to have acid-base reactivity blocking properties in order to prevent deterioration of superconductivity due to mutual combination or mixing.
「実施例３」
この実施例は実施例２に示された１つのＩＧＦＥＴ（２
０）等のＩＧＦＥＴをさらに拡大して示したものである
。“Example 3” This example is based on one IGFET (2
This is a further enlarged view of an IGFET such as 0).
図面において、基板（１）は珪素よりなり、酸化珪素の
フィールド絶縁膜（１１）、ソースまたはドレイン（１
３）、ドレインまたはソース（１４）を構成する不純物
領域を有する。さらにゲイ） （１２）を有する。In the drawing, the substrate (1) is made of silicon and includes a silicon oxide field insulating film (11), a source or drain (1), and a silicon oxide field insulating film (11).
3) It has an impurity region that constitutes a drain or source (14). Furthermore, gay) has (12).
またこれら半導体（１） 、 （１３） 、 （１４）
上およびフィールド絶縁物（１１）上には酸化珪素、窒
化珪素またはこれらの多層膜（４１）を有する。さらに
この上には酸化ジルコニウム等のブロッキング作用を有
する絶８Ｍ膜（４０）を有する。不純物領域（１３）
、 （１４）には開口（４２）が絶縁膜（４１）の一部
をブロッキング用絶縁膜（４０’）が覆っている。そし
てさらに開口（４２）を覆って不純物領域（１３） 、
（１４）とオーム接触をする金属、例えばタングステ
ン、モリブデン、チタン、白金またはこれらの珪化物（
１５）が設けられ、この上にはさらに多層に白金、金、
銀（１６）が設けられている。これら開口と同じ大きさ
に作られたブロッキング用導体（２１）とブロッキング
用絶縁膜（４０）とにより、酸化物超電導材料（１７）
、 （１７’ ）および酸化物非超電導材料（２７）
等の下面はすべて酸化物が直接酸化物セラミックスと接
しないように覆われている。（１７）、（１７’）は超
電導特性を有する電極・リードである。ブロッキング用
導体（２１）に密接する領域を電極とここでは考える。In addition, these semiconductors (1), (13), (14)
On top and on the field insulator (11) is silicon oxide, silicon nitride, or a multilayer film (41) of these. Furthermore, there is an 8M film (40) made of zirconium oxide or the like having a blocking effect on top of this. Impurity region (13)
, (14), the opening (42) covers a part of the insulating film (41) with the blocking insulating film (40'). Further, an impurity region (13) is formed to cover the opening (42),
Metals that make ohmic contact with (14), such as tungsten, molybdenum, titanium, platinum, or their silicides (
15) is provided, and on top of this, platinum, gold,
Silver (16) is provided. The blocking conductor (21) and the blocking insulating film (40) made to have the same size as these openings form the oxide superconducting material (17).
, (17') and oxide non-superconducting materials (27)
The lower surfaces of all the oxides are covered to prevent the oxide from coming into direct contact with the oxide ceramics. (17) and (17') are electrodes/leads having superconducting properties. Here, a region in close contact with the blocking conductor (21) is considered to be an electrode.
そして（２７）は酸化物超電導セラミックスをイオン注
入法によりアルミニウム、マグネシウム等を５〜２０体
積％添加して非超電導特性を有せしめたリード間のアイ
ソレイション領域である。かくしてこの充填物により、
酸化物超電導の電極・リード（１７）は外部を囲まれ、
かつそれらは互いに概略同一の高さとすることができる
ようになった。And (27) is an isolation region between leads in which 5 to 20 volume % of aluminum, magnesium, etc. are added to the oxide superconducting ceramic by ion implantation to give it non-superconducting properties. Thus, with this filling,
The oxide superconducting electrode/lead (17) is surrounded on the outside,
Moreover, they can now be made to have approximately the same height as each other.
さらに、眉間絶縁膜（２８）と多層用の連結部（１８）
。Furthermore, the glabella insulating film (28) and the multilayer connection part (18)
.
（１８’ ”）とを同様に設けた。ここでは大部分は眉
間絶縁膜（２８’）として構成させている。(18''') were similarly provided. Here, most of the glabella insulating film (28') is formed.
さらに２層目用の酸化物超電導材料の電極・リード（１
９） 、 （１９”）と充填用絶縁膜（２９）とを同時
に作った。これらのすべてに対し、ファイナルパッシベ
イションとしてブロッキング用絶縁膜（３０）を形成し
た。これはここでは酸化ジルコニウム、ＹＳＺをスパッ
タ法で０．１〜２μｍ例えば０．３μｍの厚さに形成し
た。In addition, electrodes and leads of oxide superconducting material for the second layer (1
9), (19") and a filling insulating film (29) were made at the same time. For all of these, a blocking insulating film (30) was formed as a final passivation. Here, this is made of zirconium oxide, YSZ was formed to a thickness of 0.1 to 2 μm, for example 0.3 μm, by sputtering.
外部引出し用電極（３３）を白金のコンタクト（３１）
、アルミニウム、金等の連結用金属（３２）とにより作
製した。ファイナルパッシベイションもこれらの酸化物
超電導材料の電極・リードをブロッキング作用を有する
絶縁膜で覆うことは高信顧性を有せしめるため有効であ
る。とくにこの材料は水をもブロッキングするため、超
電導セラミックスの劣化をも防ぐことができた。Connect the external extraction electrode (33) to the platinum contact (31)
, a connecting metal (32) such as aluminum, gold, etc. In final passivation, it is effective to cover electrodes and leads made of these oxide superconducting materials with an insulating film having a blocking effect to ensure high reliability. In particular, since this material also blocks water, it was possible to prevent the deterioration of superconducting ceramics.
「効果」
本発明によりこれらの半導体装置を室温ではなく、冷却
して形成する場合において実用化が初めて可能となった
。"Effects" The present invention has made it possible for the first time to put these semiconductor devices into practical use when they are formed not at room temperature but at cooling.
特に半導体は液体窒素温度に冷却することにより周波数
特性を向上させることができる。そして他方、低温にす
ることにより抵抗が増してしまう金属を用いることなく
、本発明は超電導材料を用いた。しかもかかる超電導材
料が有効が用いられるべくその下面に接する絶縁材料は
ブロッキング用材料とし、またその材料もブロッキング
用導電材料とした。In particular, the frequency characteristics of semiconductors can be improved by cooling them to liquid nitrogen temperature. On the other hand, the present invention uses a superconducting material instead of using a metal whose resistance increases when the temperature is lowered. Moreover, in order to effectively use such a superconducting material, the insulating material in contact with the lower surface thereof is made of a blocking material, and that material is also made of a blocking conductive material.
そのため、本発明の技術思想を発展させることにより、
１６Ｍ〜ＩＧビット等の超々ＬＳＩに対する応用も可能
となった。Therefore, by developing the technical idea of the present invention,
Application to ultra-super LSIs such as 16M to IG bits has become possible.
本発明において、半導体はシリコンではな（ＧａＡｓ等
の化合物半導体であってもよい、またシリコン半導体上
にＧａＡｓ等の■−■化合物半導体をヘテロエピタキシ
ャル成長をせしめ、この半導体薄膜を用いてもよい。か
くすることにより超高速動作を指せることが可能となる
。しかしアニールの温度を下げ、アニール中に半導体基
板を劣化しないように工夫する必要がある。In the present invention, the semiconductor is not silicon (it may also be a compound semiconductor such as GaAs), or a semiconductor thin film may be used by heteroepitaxially growing a ■-■ compound semiconductor such as GaAs on a silicon semiconductor. This makes it possible to achieve ultra-high-speed operation. However, it is necessary to lower the annealing temperature and take measures to prevent deterioration of the semiconductor substrate during annealing.
本発明は超電導材料を銅の酸化物の超電導材料とした。In the present invention, the superconducting material is a copper oxide superconducting material.
しかし微細パターンができる他の超電導材料を用いるこ
とも有効である。However, it is also effective to use other superconducting materials that can be formed into fine patterns.
本発明において、基板としてはアクティブ素子が設けら
れた半導体材料と、その上面に非酸化物材料が設けられ
たものを用いた。しかしＹＳＺ （イットリューム・ス
タビライズド・ジルコン）、５ｒＴｉＯ＝等の熱膨張係
数の概略同一のセラミック材料をアルミナ板等の上面に
形成したものを基板としてもよい。すると熱膨張係数を
合わせられるため作りやすい。しかし他方、かかる材料
を用いる場合はアクティブ素子は別途段けられなければ
ならず、超高集積回路化も成就しに（いという欠点を有
する。In the present invention, the substrate used is a semiconductor material provided with active elements and a non-oxide material provided on its upper surface. However, the substrate may be formed by forming a ceramic material having approximately the same coefficient of thermal expansion, such as YSZ (yttrium stabilized zircon) or 5rTiO=, on the upper surface of an alumina plate or the like. This makes it easier to manufacture because the coefficient of thermal expansion can be matched. On the other hand, however, when such a material is used, active elements must be separately arranged, making it difficult to achieve ultra-high integration.
第１図は本発明の製造工程を示す。 第２図および第３図は本発明の他の実施例を示す。 FIG. 1 shows the manufacturing process of the present invention. 2 and 3 show other embodiments of the invention.
Claims (1)
素またはこれらを主成分とする絶縁膜と、前記絶縁膜の
上面にブロッキング用絶縁膜とを設け、前記絶縁膜に開
口を設け、前記開口の前記不純物領域上にブロッキング
用導電膜が設けられ、該ブロッキング用導電膜および前
記ブロッキング用絶縁膜上に酸化物超電導体が設けられ
たことを特徴とする超電導体装置。 ２、特許請求の範囲第１項において、ブロッキング用絶
縁膜は酸化ジルコニウム、ＹＳＺ（イットリウム・スタ
ビライズド・ジルコン）、酸化イットリウム、チタン酸
ストロンチウム、酸化物超電導材料と同一主成分を有す
る非超電導材料またはこれらの多層膜よりなることを特
徴とする超電導体装置。 ３、特許請求の範囲第１項において、ブロッキング用導
電膜は半導体の不純物領域に密接してモリブデン、チタ
ン、タングステン、白金またはその珪化物または該上に
白金または銀が多層に設けられたことを特徴とする超電
導体装置。[Claims] 1. An insulating film made of silicon oxide, silicon nitride, or containing these as main components on an impurity region in an upper part of a semiconductor substrate, and a blocking insulating film on the upper surface of the insulating film, A superconductor device comprising an opening, a blocking conductive film provided on the impurity region of the opening, and an oxide superconductor provided on the blocking conductive film and the blocking insulating film. 2. In claim 1, the blocking insulating film is made of zirconium oxide, YSZ (yttrium stabilized zircon), yttrium oxide, strontium titanate, a non-superconducting material having the same main component as the oxide superconducting material, or A superconductor device comprising these multilayer films. 3. Claim 1 states that the blocking conductive film is made of molybdenum, titanium, tungsten, platinum, or a silicide thereof, or a multilayer of platinum or silver is provided on the impurity region of the semiconductor. Characteristic superconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62284630A JPH0680741B2 (en) | 1987-11-11 | 1987-11-11 | Superconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62284630A JPH0680741B2 (en) | 1987-11-11 | 1987-11-11 | Superconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01125957A true JPH01125957A (en) | 1989-05-18 |
| JPH0680741B2 JPH0680741B2 (en) | 1994-10-12 |
Family
ID=17680957
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62284630A Expired - Lifetime JPH0680741B2 (en) | 1987-11-11 | 1987-11-11 | Superconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0680741B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01171245A (en) * | 1987-12-25 | 1989-07-06 | Mitsubishi Metal Corp | Structure of superconductor interconnection |
| JPH01218045A (en) * | 1988-02-26 | 1989-08-31 | Nec Corp | Semiconductor device |
| JPH0282585A (en) * | 1988-09-19 | 1990-03-23 | Res Dev Corp Of Japan | Superconducting wiring |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60154613A (en) * | 1984-01-25 | 1985-08-14 | Hitachi Ltd | Semiconductor device for ultra-low temperature |
| JPS63300580A (en) * | 1987-05-29 | 1988-12-07 | Nec Corp | Substrate for electronic device |
| JPS6454746A (en) * | 1987-08-26 | 1989-03-02 | Matsushita Electric Ind Co Ltd | Forming method for superconducting wiring |
-
1987
- 1987-11-11 JP JP62284630A patent/JPH0680741B2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60154613A (en) * | 1984-01-25 | 1985-08-14 | Hitachi Ltd | Semiconductor device for ultra-low temperature |
| JPS63300580A (en) * | 1987-05-29 | 1988-12-07 | Nec Corp | Substrate for electronic device |
| JPS6454746A (en) * | 1987-08-26 | 1989-03-02 | Matsushita Electric Ind Co Ltd | Forming method for superconducting wiring |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01171245A (en) * | 1987-12-25 | 1989-07-06 | Mitsubishi Metal Corp | Structure of superconductor interconnection |
| JPH01218045A (en) * | 1988-02-26 | 1989-08-31 | Nec Corp | Semiconductor device |
| JPH0282585A (en) * | 1988-09-19 | 1990-03-23 | Res Dev Corp Of Japan | Superconducting wiring |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0680741B2 (en) | 1994-10-12 |
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