JP7242938B2 - パッケージ化電子デバイス、および無線周波数モジュール - Google Patents
パッケージ化電子デバイス、および無線周波数モジュール Download PDFInfo
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- JP7242938B2 JP7242938B2 JP2022053943A JP2022053943A JP7242938B2 JP 7242938 B2 JP7242938 B2 JP 7242938B2 JP 2022053943 A JP2022053943 A JP 2022053943A JP 2022053943 A JP2022053943 A JP 2022053943A JP 7242938 B2 JP7242938 B2 JP 7242938B2
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- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
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Description
この出願は、2013年11月5日に出願された、「パッケージ化電子デバイス、パッケージ化無線周波数(RF)モジュールを作製するための方法、およびワイヤレスデバイス」と題された米国仮出願番号第61/900,394号に対する優先権を主張し、その開示全体が本明細書中に引用により明示的に援用される。
分野
本開示は概して、パッケージ化無線周波数(RF)モジュールの遮蔽に関する。
電磁(EM)界は、RFモジュールなどの無線周波数(RF)デバイスの領域から生成される可能性がある、または当該領域に対する望ましくない影響を有する可能性がある。そのような電磁障害(EMI)は、そのようなRFモジュールを用いるワイヤレスデバイスの性能を劣化させる可能性がある。RFモジュールには、EMIに関連のそのような性能の問題に対処するためのEM遮蔽を設けることができるものがある。
いくつかの実現例に従うと、本開示は、1つ以上の構成要素を受けるように構成されるセラミック基板を含むパッケージ化電子デバイスに関する。セラミック基板は、接地平面と電気的に接する導電層を含む。パッケージ化電子デバイスはさらに、集積回路を有するダイを含む。ダイはセラミック基板の表面上に実装される。パッケージ化電子デバイスはさらに、ダイ上に実現されて遮蔽機能性を与えるコンフォーマル導電性コーティングを含む。パッケージ化電子デバイスはさらに、コンフォーマル導電性コーティングと導電層との間の電気的接続部を含む。
イを有する積層体の中に配置される複数のセラミック層を含むことができ、線に沿った単体化(singulation)プロセスの結果、複数の個別ユニットへのユニットの分離が行なわ
れる。方法はさらに、コンフォーマル導電性コーティングを形成することの前にユニットのアレイを単体化することを含むことができる。ダイの実装は、単体化ステップの前にユニットの各々に対して行なうことができる。
本明細書中に与えられる見出しは、あるとしても便宜上のものにすぎず、請求される発明の範囲または意味に必ずしも影響を及ぼすとは限らない。
ンフォーマルコーティング102のより容易な形成を容易にするように、フリップチップ104の端縁の近くに構成可能である。たとえば、アンダーフィル122の周部分は、フリップチップ104の鉛直方向端縁とセラミック基板106の水平方向表面116との間の角度付けられた遷移を設けて示される。
4とセラミック基板106の実装面116上に形成されるコンタクトパッドとの間の電気的接続部を設けることができる。
れるように、そのようなコンフォーマル導電性コーティングは、セラミック基板106の端縁のいくつかまたはすべておよび導電性ストリップ160の対応の露出端縁のいくつかまたはすべてを覆う部分を含むことができる。
16)を用いて送受信動作を同時に行なえるようにすることができる。図10では、受信した信号は、たとえば低雑音増幅器(LNA)を含むことができる「Rx」経路(図示せず)へ経路設定されて示される。
アンダーフィル、134,136,154 コンタクトパッド、138 導電性ビア、
140、142、160、162 導電層、150 端縁、170 ビア。
Claims (20)
- パッケージ化電子デバイスであって、
1つ以上の構成要素を受けるように構成されるセラミック基板を備え、前記セラミック基板は接地平面と電気的に接する導電層を含み、さらに
集積回路を有するダイを備え、前記ダイは前記セラミック基板の表面上に実装され、さらに
前記ダイ上に実現されて遮蔽機能性を与えるコンフォーマル導電性コーティングと、
前記コンフォーマル導電性コーティングと前記導電層との間の電気的接続部とを備え、
前記導電層は、セラミック基板の周に沿って配置される複数の導電性ストリップを含み、前記複数の導電性ストリップの各々は、前記セラミック基板のそれぞれの縁端まで延在し、前記複数の導電性ストリップは、前記セラミック基板の前記周に沿って部分的な周を形成し、前記部分的な周は、前記セラミック基板の4つの角部分において空隙を有する、パッケージ化電子デバイス。 - 前記ダイはフリップチップデバイスとして構成される、請求項1に記載のパッケージ化電子デバイス。
- 前記フリップチップデバイスと前記セラミック基板との間に実現されるアンダーフィルをさらに備える、請求項2に記載のパッケージ化電子デバイス。
- 前記アンダーフィルは、前記フリップチップデバイスの側壁と前記セラミック基板の前記表面との間の角度付けられた遷移を設けるように構成される端縁プロファイルを含む、請求項3に記載のパッケージ化電子デバイス。
- 前記集積回路は無線周波数スイッチング回路を含む、請求項1に記載のパッケージ化電子デバイス。
- 前記ダイはシリコンオンインシュレータ(SOI)ダイである、請求項5に記載のパッケージ化電子デバイス。
- 前記導電性ストリップの各々は、前記導電性ストリップと前記コンフォーマル導電性コーティングとの間の電気的接触を容易にするように前記セラミック基板の対応の側方端縁上に十分に露出する端縁を含む、請求項1に記載のパッケージ化電子デバイス。
- 前記コンフォーマル導電性コーティングは、金属性塗料層または堆積によって形成される導電層を含む、請求項1に記載のパッケージ化電子デバイス。
- 前記セラミック基板は低温同時焼成セラミック(LTCC)基板を含む、請求項1に記載のパッケージ化電子デバイス。
- 前記セラミック基板の下側に実現される複数のコンタクトパッドをさらに備え、前記コンタクトパッドは回路板上への前記パッケージ化電子デバイスの実装を可能にするように構成される、請求項1に記載のパッケージ化電子デバイス。
- 前記コンフォーマル導電性コーティングは前記ダイのすぐ上に実現される、請求項1に記載のパッケージ化電子デバイス。
- 前記セラミック基板の前記表面上の前記コンフォーマル導電性コーティングと前記導電層との間の電気的接続部を設けるように構成される複数の導電性ビアをさらに備える、請求項1に記載のパッケージ化電子デバイス。
- 前記ダイの上に実現されたオーバーモールドをさらに備え、前記オーバーモールドの表面上に前記コンフォーマル導電性コーティングが形成されるように前記オーバーモールドが実現される、請求項1に記載のパッケージ化電子デバイス。
- 前記オーバーモールドの側壁が前記セラミック基板の対応の側壁にほぼ整列するように前記オーバーモールドが寸法決めされる、請求項13に記載のパッケージ化電子デバイス。
- 無線周波数信号を処理するように構成された無線周波数モジュールであって、
1つ以上の構成要素を受けるように構成されるセラミック基板を備え、前記セラミック基板は接地平面と電気的に接する導電層を含み、さらに
集積回路を有するダイを備え、前記ダイは前記セラミック基板の表面上に実装され、さらに
前記ダイ上に実現されて遮蔽機能性を与えるコンフォーマル導電性コーティングと、
前記コンフォーマル導電性コーティングと前記導電層との間の電気的接続部とを備え、
前記導電層は、セラミック基板の周に沿って配置される複数の導電性ストリップを含み、前記複数の導電性ストリップの各々は、前記セラミック基板のそれぞれの縁端まで延在し、前記複数の導電性ストリップは、前記セラミック基板の前記周に沿って部分的な周を形成し、前記部分的な周は、前記セラミック基板の4つの角部分において空隙を有する、無線周波数モジュール。 - 前記導電性ストリップの各々は、前記導電性ストリップと前記コンフォーマル導電性コーティングとの間の電気的接触を容易にするように前記セラミック基板の対応の側方端縁上に十分に露出する端縁を含む、請求項15に記載の無線周波数モジュール。
- 前記コンフォーマル導電性コーティングは前記ダイのすぐ上に実現される、請求項15に記載の無線周波数モジュール。
- 前記セラミック基板の前記表面上の前記コンフォーマル導電性コーティングと前記導電層との間の電気的接続部を設けるように構成される複数の導電性ビアをさらに備える、請求項15に記載の無線周波数モジュール。
- 前記ダイの上に実現されたオーバーモールドをさらに備え、前記オーバーモールドの表面上に前記コンフォーマル導電性コーティングが形成されるように前記オーバーモールドが実現される、請求項15に記載の無線周波数モジュール。
- 前記オーバーモールドの側壁が前記セラミック基板の対応の側壁にほぼ整列するように前記オーバーモールドが寸法決めされる、請求項19に記載の無線周波数モジュール。
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JP7214574B2 (ja) | 2023-01-30 |
JP2022109908A (ja) | 2022-07-28 |
JP6537807B2 (ja) | 2019-07-03 |
KR102371332B1 (ko) | 2022-03-04 |
JP2019176172A (ja) | 2019-10-10 |
US10771101B2 (en) | 2020-09-08 |
KR20150051924A (ko) | 2015-05-13 |
JP2015091135A (ja) | 2015-05-11 |
US20170149466A1 (en) | 2017-05-25 |
US9564937B2 (en) | 2017-02-07 |
US20150126134A1 (en) | 2015-05-07 |
TWI652789B (zh) | 2019-03-01 |
TW201530731A (zh) | 2015-08-01 |
CN104617053B (zh) | 2020-09-11 |
HK1206148A1 (en) | 2015-12-31 |
CN104617053A (zh) | 2015-05-13 |
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