JP7135624B2 - 周波数逓倍器 - Google Patents
周波数逓倍器 Download PDFInfo
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- JP7135624B2 JP7135624B2 JP2018170455A JP2018170455A JP7135624B2 JP 7135624 B2 JP7135624 B2 JP 7135624B2 JP 2018170455 A JP2018170455 A JP 2018170455A JP 2018170455 A JP2018170455 A JP 2018170455A JP 7135624 B2 JP7135624 B2 JP 7135624B2
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/40—Arrangements for reducing harmonics
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Description
[周波数逓倍器の構成]
[周波数逓倍器の作用効果]
Claims (4)
- 入力信号を互いに逆相の一対の平衡信号に変換する変換器と、
前記一対の平衡信号によって駆動され、前記一対の平衡信号が増幅された増幅平衡信号を、共通の負荷に対して出力する一対のトランジスタと、
前記共通の負荷に並列に前記一対のトランジスタの出力に接続された素子であって、前記増幅平衡信号の強度に従って抵抗値が減少する可変抵抗素子と、
を備え、
前記可変抵抗素子は、前記出力とグラウンドとの間に接続された2つのトランジスタを含み、
該2つのトランジスタは、前記増幅平衡信号が分岐された後に互いに逆相の信号に変換されることによって生成された一対の信号によってそれぞれ駆動される、
周波数逓倍器。 - 前記可変抵抗素子は、前記出力とグラウンドとの間に互いに並列に逆極性で接続された一対のダイオード素子を含む、
請求項1記載の周波数逓倍器。 - 前記一対のトランジスタは、B級動作あるいはAB級動作を行う、
請求項1または請求項2に記載の周波数逓倍器。 - 前記変換器は、マーチャントバランである、
請求項1から請求項3のいずれか1項に記載の周波数逓倍器。
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JP2018170455A JP7135624B2 (ja) | 2018-09-12 | 2018-09-12 | 周波数逓倍器 |
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JP2018170455A JP7135624B2 (ja) | 2018-09-12 | 2018-09-12 | 周波数逓倍器 |
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JP2020043506A JP2020043506A (ja) | 2020-03-19 |
JP7135624B2 true JP7135624B2 (ja) | 2022-09-13 |
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Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2017046246A (ja) | 2015-08-27 | 2017-03-02 | 住友電気工業株式会社 | 電子回路 |
US20180159516A1 (en) | 2016-12-05 | 2018-06-07 | The Regents Of The University Of California | High-efficiency frequency doubler with a compensated transformer-based input balun |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS5639722U (ja) * | 1979-09-04 | 1981-04-14 | ||
JPH0349459Y2 (ja) * | 1985-09-09 | 1991-10-22 | ||
JPH06350343A (ja) * | 1993-06-08 | 1994-12-22 | Shimada Phys & Chem Ind Co Ltd | 周波数変換器 |
US5524055A (en) * | 1994-01-18 | 1996-06-04 | Peavey Electronics Corporation | Solid state circuit for emulating tube compression effect |
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2018
- 2018-09-12 JP JP2018170455A patent/JP7135624B2/ja active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2017046246A (ja) | 2015-08-27 | 2017-03-02 | 住友電気工業株式会社 | 電子回路 |
US20180159516A1 (en) | 2016-12-05 | 2018-06-07 | The Regents Of The University Of California | High-efficiency frequency doubler with a compensated transformer-based input balun |
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JP2020043506A (ja) | 2020-03-19 |
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