JP6706330B2 - 金属充填ディープソースコンタクトを備えたパワーmosfet - Google Patents
金属充填ディープソースコンタクトを備えたパワーmosfet Download PDFInfo
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- 229910052751 metal Inorganic materials 0.000 title claims description 84
- 239000002184 metal Substances 0.000 title claims description 84
- 238000000034 method Methods 0.000 claims description 58
- 239000000945 filler Substances 0.000 claims description 51
- 239000000758 substrate Substances 0.000 claims description 51
- 239000004065 semiconductor Substances 0.000 claims description 41
- 230000008569 process Effects 0.000 claims description 23
- 238000005530 etching Methods 0.000 claims description 18
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 17
- 229910052721 tungsten Inorganic materials 0.000 claims description 17
- 239000010937 tungsten Substances 0.000 claims description 17
- 238000000151 deposition Methods 0.000 claims description 16
- 239000003870 refractory metal Substances 0.000 claims description 15
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical group [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 9
- 210000000746 body region Anatomy 0.000 claims description 8
- 229910044991 metal oxide Inorganic materials 0.000 claims description 8
- 150000004706 metal oxides Chemical class 0.000 claims description 8
- 229910021332 silicide Inorganic materials 0.000 claims description 7
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 7
- 230000005669 field effect Effects 0.000 claims description 6
- 229910052763 palladium Inorganic materials 0.000 claims description 6
- 238000001020 plasma etching Methods 0.000 claims description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 4
- 229920005591 polysilicon Polymers 0.000 claims description 4
- 229910008814 WSi2 Inorganic materials 0.000 claims 2
- 230000008021 deposition Effects 0.000 description 13
- 239000000463 material Substances 0.000 description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- 239000010936 titanium Substances 0.000 description 7
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 6
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 239000007943 implant Substances 0.000 description 5
- 230000008018 melting Effects 0.000 description 5
- 238000002844 melting Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 3
- 239000000523 sample Substances 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000010955 niobium Substances 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 239000010948 rhodium Substances 0.000 description 2
- 230000006641 stabilisation Effects 0.000 description 2
- 238000011105 stabilization Methods 0.000 description 2
- 206010010144 Completed suicide Diseases 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 101100170937 Mus musculus Dnmt1 gene Proteins 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 238000007792 addition Methods 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- GKOZUEZYRPOHIO-UHFFFAOYSA-N iridium atom Chemical compound [Ir] GKOZUEZYRPOHIO-UHFFFAOYSA-N 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 229910052762 osmium Inorganic materials 0.000 description 1
- SYQBFIAQOQZEGI-UHFFFAOYSA-N osmium atom Chemical compound [Os] SYQBFIAQOQZEGI-UHFFFAOYSA-N 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 229910052702 rhenium Inorganic materials 0.000 description 1
- WUAPFZMCVAUBPE-UHFFFAOYSA-N rhenium atom Chemical compound [Re] WUAPFZMCVAUBPE-UHFFFAOYSA-N 0.000 description 1
- 229910052703 rhodium Inorganic materials 0.000 description 1
- MHOVAHRLVXNVSD-UHFFFAOYSA-N rhodium atom Chemical compound [Rh] MHOVAHRLVXNVSD-UHFFFAOYSA-N 0.000 description 1
- 238000001878 scanning electron micrograph Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000011343 solid material Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
- 238000012876 topography Methods 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
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- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
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- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
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- H01L29/107—Substrate region of field-effect devices
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- H01L29/41725—Source or drain electrodes for field effect devices
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- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/76—Unipolar devices, e.g. field effect transistors
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- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
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Description
開示される実施形態をさらに下記の特定の例によって説明するが、これらの例は本開示の範囲又は内容を多少なりとも限定すると解釈するべきではない。
第1のタングステンエッチバックのエッチ(工程202)のために用いられたプロセスは下記のとおりとした。
工程1: 30mtorr/0 Ws/0 Wb/40 O2/20 N2/300 SF6/8 He/安定
工程2: 30mtorr/800 Ws/35 Wb/40 O2/20 N2/300 SF6/8 He/終点時間(最大40秒)
工程3: 35mtorr/650 Ws/25 Wb/20 N2/400 SF6/8 He/30秒
チャンバ壁: 50℃、ESC/チラー: 30℃
終点設定: 遅れ6秒、通常3秒、トリガ118
第2のタングステンエッチバックのエッチ(工程204)のために用いられたプロセスは下記のとおりとした。
工程1: 30mtorr/0 Ws/0 Wb/40 O2/20 N2/300 SF6/8 He/安定
工程2: 30mtorr/800 Ws/35 Wb/40 O2/20 N2/300 SF6/8 He/終点時間(最大40秒)
工程3: 35mtorr/650 Ws/25 Wb/20 N2/400 SF6/8 He/25秒
チャンバ壁: 50℃、ESC/チラー: 30℃
終点設定: 遅れ6秒、通常3秒、トリガ118
Claims (22)
- プレーナゲートパワー金属酸化物半導体電界効果トランジスタ(パワーMOSFET)を作製するための方法であって、
第1の導電型にドープされる半導体表面を有する基板上に形成される第1のセルと少なくとも第2のセルとを含む複数のトランジスタセル(セル)を含むプレーナゲートパワーMOSFETダイを提供することであって、前記第1のセルが第1のゲートスタックを有し、前記第2のセルが第2のゲートスタックを有し、前記ゲートスタックの各々が、ボディ領域の上のゲート誘電体上のゲート電極と、少なくとも3のアスペクト比を有し、前記第1及び第2のゲートスタック間の前記半導体表面の頂部側から下方に延在するトレンチであって、前記基板から第2の導電型にドープされるソースまでのソースコンタクト(SCT)を提供し、耐火性又はプラチナ族金属(PGM)金属フィラー(金属フィラー)を内部に有する、前記トレンチと、前記トレンチのためのライナを提供するように延在する前記ゲートスタックの上の電界プレート(FP)と、前記半導体表面において前記第2の導電型にドープされる、前記ゲートスタックの前記トレンチとは反対の側におけるドレインとを含み、前記トレンチが、前記ゲートスタックにより提供される自己整合を用いるエッチングプロセスにより形成される、前記プレーナゲートパワーMOSFETダイを提供することと、
前記ドレインの上の前記FPの側壁に沿って前記金属フィラーを除去し、前記トレンチにおける前記金属フィラーの一部を除去するために、前記金属フィラーの第1のエッチングを行うことと、
前記トレンチを充填することを含めて前記金属フィラーを堆積させることと、
前記金属フィラーの第2のエッチングを行うことと、
を含む、方法。 - 請求項1に記載の方法であって、
前記金属フィラーがタングステン(W)を含む、方法。 - 請求項1に記載の方法であって、
前記金属フィラーが、Ta、Pt又はPdを含む、方法。 - 請求項1に記載の方法であって、
前記ゲート電極がポリシリコン上の金属シリサイド(WSi2)を含む、方法。 - 請求項1に記載の方法であって、
前記基板がp+基板を含み、前記半導体表面がpエピタキシャル層を含み、前記パワーMOSFETがNMOSを含む、方法。 - 請求項1に記載の方法であって、
前記基板がn+基板を含み、前記半導体表面がnエピタキシャル層を含み、前記パワーMOSFETがPMOSを含む、方法。 - 請求項1に記載の方法であって、
前記第1のエッチングと前記第2のエッチングとがいずれもプラズマエッチングを含む、方法。 - 請求項1に記載の方法であって、
前記FPが少なくとも1つの耐火性金属層を含む、方法。 - 請求項1に記載の方法であって、
前記トレンチを形成した後に前記SCTの底部において基板コンタクト領域を形成することを更に含み、前記基板コンタクト領域が前記第1の導電型にドープされる、方法。 - 請求項1に記載の方法であって、
前記第1のエッチングが、前記FPの境界から前記ドレインの上に形成されるドレインコンタクトの境界までの距離を増やすことを含む、方法。 - 請求項1に記載の方法であって、
前記第1のエッチングが、前記ドレインの上に形成されるドレインコンタクトへのFPのブリッジの可能性を削減することを含む、方法。 - プレーナゲートパワー金属酸化物半導体電界効果トランジスタ(パワーMOSFET)を作製するための方法であって、
第1の導電型にドープされる半導体表面を有する基板上に形成される第1のセルと少なくとも第2のセルとを含む複数のトランジスタセル(セル)を含むプレーナゲートパワーMOSFETダイを提供することであって、前記第1のセルが第1のゲートスタックを有し、前記第2のセルが第2のゲートスタックを有し、前記ゲートスタックの各々が、ボディ領域の上のゲート誘電体上のゲート電極と、少なくとも3のアスペクト比を有し、前記第1及び第2のゲートスタック間の前記半導体表面の頂部側から下方に延在するトレンチであって、前記基板から第2の導電型にドープされるソースまでのソースコンタクト(SCT)を提供し、耐火性又はプラチナ族金属(PGM)金属フィラー(金属フィラー)を内部に有する、前記トレンチと、前記トレンチのためのライナを提供するように延在する前記ゲートスタックの上の電界プレート(FP)と、前記半導体表面において前記第2の導電型にドープされる、前記ゲートスタックの前記トレンチとは反対の側におけるドレインとを含み、前記トレンチが、前記ゲートスタックにより提供される自己整合を用いるエッチングプロセスにより形成される、前記プレーナゲートパワーMOSFETダイを提供することと、
前記金属フィラーの第1のエッチングを行うことと、
前記トレンチを充填することを含めて前記金属フィラーを堆積させることと、
前記金属フィラーの第2のエッチングを行うことと、
を含む、方法。 - プレーナゲート金属酸化物半導体電界効果トランジスタ(パワーMOSFET)であって、
第1の導電型にドープされる半導体表面を有する基板と、
前記半導体表面上に形成される第1のセルと少なくとも第2のセルとを含む複数のトランジスタセル(セル)であって、前記第1のセルが第1のゲートスタックを有し、前記第2のセルが第2にゲートスタックを有し、前記ゲートスタックの各々が、ボディ領域の上のゲート誘電体上のゲート電極と、少なくとも3のアスペクト比を有し、前記第1及び第2のゲートスタックの間の前記半導体表面の頂部側から下方に延在して、前記基板から第2の導電型にドープされるソースまでのソースコンタクト(SCT)を提供するトレンチと、前記トレンチのためのライナを提供するように延在する、前記ゲートスタックの上の電界プレート(FP)とを含み、前記トレンチが耐火性金属又はプラチナ族金属(PGM)フィラー(金属フィラー)を前記トレンチ内に有する、前記複数のトランジスタセルと、
前記半導体表面において前記第2の導電型にドープされる、前記ゲートスタックの前記トレンチとは反対の側におけるドレインと、
を含む、パワーMOSFET。 - 請求項13に記載のパワーMOSFETであって、
前記金属フィラーがタングステン(W)を含む、パワーMOSFET。 - 請求項13に記載のパワーMOSFETであって、
前記金属フィラーが、Ta、Pt又はPd、或いは、Ta、Pt又はPdの耐火性金属シリサイドを含む、パワーMOSFET。 - 請求項13に記載のパワーMOSFETであって、
前記ゲート電極がポリシリコン上の金属シリサイド(WSi2)を含む、パワーMOSFET。 - 請求項13に記載のパワーMOSFETであって、
前記FPが少なくとも1つの耐火性金属層を含む、パワーMOSFET。 - 請求項13に記載のパワーMOSFETであって、
前記基板がp+基板を含み、前記半導体表面がpエピタキシャル層を含み、前記パワーMOSFETがNMOSを含む、パワーMOSFET。 - 請求項13に記載のパワーMOSFETであって、
前記基板がn+基板を含み、前記半導体表面がnエピタキシャル層を含み、前記パワーMOSFETがPMOSを含む、パワーMOSFET。 - 請求項13に記載のパワーMOSFETであって、
前記FPが少なくとも1つの耐火性金属層を含む、パワーMOSFET。 - 請求項13に記載のパワーMOSFETであって、
前記SCTの底部における基板コンタクト領域を更に含み、前記基板コンタクト領域が前記第1の導電型にドープされる、パワーMOSFET。 - プレーナゲート金属酸化物半導体電界効果トランジスタ(パワーMOSFET)であって、
第1の導電型にドープされる半導体表面を有する基板と、
前記半導体表面上に形成される第1のセルと少なくとも第2のセルとを含む複数のトランジスタセル(セル)であって、前記第1のセルが第1のゲートスタックを有し、前記第2のセルが第2にゲートスタックを有する、前記ゲートスタックの各々が、ボディ領域の上のゲート誘電体上のゲート電極と、少なくとも3のアスペクト比を有し、前記第1及び第2のゲートスタックの間の前記半導体表面の頂部側から下方に延在して前記基板から第2の導電型にドープされるソースまでのソースコンタクト(SCT)を提供するトレンチと、前記トレンチのためのライナを提供するように延在する、前記ゲートスタックの上の電界プレート(FP)とを含み、前記トレンチが、タングステンフィラー又はタングステン含有フィラーを前記トレンチ内に有する、前記複数のトランジスタセルと、
前記半導体表面において前記第2導電型にドープされる、前記ゲートスタックの前記トレンチとは反対側におけるドレインと、
を含む、パワーMOSFET。
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