JP6622745B2 - 半導体装置、液体吐出ヘッド用基板、液体吐出ヘッド、及び液体吐出装置 - Google Patents
半導体装置、液体吐出ヘッド用基板、液体吐出ヘッド、及び液体吐出装置 Download PDFInfo
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Description
また、本発明の別の一様態は、半導体基板と、前記半導体基板に配され、第1電位の第1端子に接続されたトランジスタと、前記半導体基板に配され、前記第1電位と異なる第2電位の第2端子と前記トランジスタとの間に接続されたアンチヒューズ素子と、前記半導体基板に配され、前記第2端子と前記トランジスタとの間で、前記アンチヒューズ素子と並列に接続された第1抵抗素子と、前記半導体基板に配された電流供給トランジスタを含み、前記第1端子と前記トランジスタとの間に接続され、前記アンチヒューズ素子及び前記第1抵抗素子に電流を供給する電流供給部と、を有する半導体装置に関する。
図1は、半導体装置の回路構成の一例であり、アンチヒューズ素子に情報が書込まれる前の状態を示している。
図1を用いて、読出し時にアンチヒューズ素子11及び抵抗素子Rpに供給する電流量を並列抵抗素子Rpの抵抗値に合わせて変化させることで読出し時の信頼性低下を防ぐ例について説明する。ここでは、アンチヒューズ素子11の情報を読み出す際、並列抵抗素子Rpの抵抗のバラツキ(設定値からのずれ)の影響を低減する調整部として、抵抗素子Rpと同じ基板上に配された電流供給部301を有する例を示す。
VHout=C×Rp/Ri
ここで、Cは定数(≒VDDA)
本実施の形態では、上記実施の形態で示したメモリ部10を複数配置した場合の例を示す。
本実施の形態では、上記実施の形態に記載の半導体装置の適用例として、半導体装置を記録装置に適用した例について説明する。
本実施の形態では、調整部が抵抗素子Rpのバラツキ(ずれ)を、分圧を用いて相殺するよう構成された抵抗素子Rrを有する例について説明する。
VHout=Vid×Rp/(Rr+Rp)
本実施の形態では、調整部が、抵抗素子Rpと同じ基板上に配され、トランジスタを有する電流供給部の例について説明する。具体的には、電流供給部が、トラジスタMD1の動作条件を制御することで、抵抗素子Rpのバラツキに関係なく精度よく読み出しを行うことを可能とするよう構成されている例について説明する。
Vds≧Vgs−Vth
Vds≦Vgs−Vth
本実施の形態に係る半導体装置は、実施の形態5で示した1bitに対応するメモリ部10を、複数有する。この例を図9に示す。他の実施の形態と同様の構成、機能、効果の部分については説明を省略する。
MD1 トラジスタ
11 アンチヒューズ素子
Rp 並列抵抗
301 電流供給部
Claims (18)
- 半導体基板と、
前記半導体基板に配され、第1電位の第1端子に接続されたトランジスタと、
前記半導体基板に配され、前記第1電位と異なる第2電位の第2端子と前記トランジスタとの間に接続されたアンチヒューズ素子と、
前記半導体基板に配され、前記第2端子と前記トランジスタとの間で、前記アンチヒューズ素子と並列に接続された第1抵抗素子と、
前記半導体基板に配された電流供給トランジスタを含み、前記第2端子に接続され、前記アンチヒューズ素子及び前記第1抵抗素子に電流を供給する電流供給部と、
を有し、
前記第1抵抗素子の特性変化による前記第1抵抗素子の両端子の電位差の変化を低減するように、前記電流供給部から電流が供給される半導体装置。 - 前記電流供給部は前記第2端子に接続され、
前記電流供給部を介して前記第2端子に接続された第2抵抗素子を有する請求項1に記載の半導体装置。 - 前記第1抵抗素子と前記第2抵抗素子は拡散抵抗であることを特徴とする請求項2に記載の半導体装置。
- 前記電流供給部の前記電流供給トランジスタは、カレントミラー回路を構成する第1トランジスタと第2トランジスタを含み、
前記第1トランジスタのソース及び前記第2トランジスタのソースには、外部から電圧が印加され、
前記第1トランジスタのゲート及び前記第2トランジスタのゲートは、前記第1トランジスタのドレインに接続され、
前記第1トランジスタのドレインは、前記第2抵抗素子を介して、前記第1電位の端子に接続され、
前記第2トランジスタのドレインは、前記第2端子に接続されていることを特徴とする請求項2または3に記載の半導体装置。 - 前記電流供給部と前記第2端子の間に接続されたスイッチを有することを特徴とする請求項1乃至4のいずれか1項に記載の半導体装置。
- 前記スイッチは、前記アンチヒューズ素子に情報が書き込まれるときはオフ状態となり、前記アンチヒューズ素子に記憶されている情報が読みだされるときはオン状態となるよう制御されることを特徴とする請求項5に記載の半導体装置。
- 半導体基板と、
前記半導体基板に配され、第1電位の第1端子に接続されたトランジスタと、前記半導体基板に配され、前記第1電位と異なる第2電位の第2端子と前記トランジスタとの間に接続されたアンチヒューズ素子と、
前記半導体基板に配され、前記第2端子と前記トランジスタとの間で、前記アンチヒューズ素子と並列に接続された第1抵抗素子と、
前記半導体基板に配された電流供給トランジスタを含み、前記第1端子と前記トランジスタとの間に接続され、前記アンチヒューズ素子及び前記第1抵抗素子に電流を供給する電流供給部と、
を有する半導体装置。 - 前記アンチヒューズ素子の導通状態の時に、前記トランジスタが飽和領域で動作し、前記アンチヒューズ素子が非導通状態の時に、前記トランジスタが線形領域で動作することを特徴とする請求項7に記載の半導体装置。
- 前記電流供給部が、前記アンチヒューズ素子の書き込み時に第1の電流量を供給し、前記アンチヒューズ素子の読みだし時に第2の電流量を供給するように構成され、
前記第1の電流量は前記第2の電流量よりも大きいことを特徴とする請求項7または請求項8に記載の半導体装置。 - 前記電流供給部に含まれる前記電流供給トランジスタは、ゲートに印加される電圧に応じて供給する電流量が制御されるように構成されたことを特徴とする請求項7乃至9のいずれか1項に記載の半導体装置。
- 半導体基板と、
前記半導体基板に配され、第1電位の第1端子に接続されたトランジスタと、
前記半導体基板に配され、前記第1電位と異なる第2電位の第2端子と前記トランジスタとの間に接続されたアンチヒューズ素子と、
前記半導体基板に配され、前記第2端子と前記トランジスタの間で、前記アンチヒューズ素子と並列に接続された第1抵抗素子と、
前記半導体基板に配され、外部電圧が供給される第3端子と、
前記半導体基板に配され、前記第3端子と前記第2端子との間に接続された第2抵抗素子と、
を有し、
前記第1抵抗素子と前記第2抵抗素子とが前記外部電圧を分圧することにより、前記第1抵抗素子の特性変化による前記第1抵抗素子の両端子の電位差の変化を低減する半導体装置。 - 前記第1抵抗素子と前記第2抵抗素子は拡散抵抗であることを特徴とする請求項11に記載の半導体装置。
- 前記第1抵抗素子と前記第2抵抗素子は、前記半導体基板において前記トランジスタが配される面に対する平面視において、長さ、及び幅が等しいことを特徴とする請求項3または12に記載の半導体装置。
- 前記アンチヒューズ素子及び前記第1抵抗素子をそれぞれが含む複数のメモリ部を有し、
複数の前記電流供給部を有し、
前記複数のメモリ部は、第1メモリ部及び第2メモリ部を有し、
前記複数の電流供給部は、第1電流供給部及び第2電流供給部を有し、
前記第1メモリ部は、前記第1電流供給部及び前記第2電流供給部のうち、前記第1メモリ部が有する前記第1抵抗素子からの接続配線の距離が短い方に接続されていることを特徴とする請求項1乃至10のいずれか1項に記載の半導体装置。 - 液体を吐出するための複数の吐出用素子と、
前記複数の吐出用素子と電気的に接続された制御回路と、
前記制御回路と電気的に接続された請求項1乃至14のいずれか1項に記載の半導体装置と、
を有する液体吐出ヘッド用基板。 - 前記吐出用素子は、ヒータであることを特徴とする請求項15に記載の液体吐出ヘッド用基板。
- 請求項15または16に記載の液体吐出ヘッド用基板と、
前記液体吐出ヘッド用基板の前記複数の吐出用素子のそれぞれ異なる1つに対応するように配された複数の吐出口と、
を有する記録部と、
前記記録部に取り付けられたインク容器と、
を有する液体吐出ヘッド - 請求項17に記載の液体吐出ヘッドと、
前記液体吐出ヘッドが搭載されるキャリッジと、
前記キャリッジを移動するためのガイドと、
を有する液体吐出装置。
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