JP6595296B2 - 保護テープ、及び半導体装置の製造方法 - Google Patents
保護テープ、及び半導体装置の製造方法 Download PDFInfo
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- JP6595296B2 JP6595296B2 JP2015205647A JP2015205647A JP6595296B2 JP 6595296 B2 JP6595296 B2 JP 6595296B2 JP 2015205647 A JP2015205647 A JP 2015205647A JP 2015205647 A JP2015205647 A JP 2015205647A JP 6595296 B2 JP6595296 B2 JP 6595296B2
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- adhesive layer
- adhesive
- layer
- protective tape
- wafer
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Classifications
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
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- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
- H01L2221/68336—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding involving stretching of the auxiliary support post dicing
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
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Description
1.保護テープ
2.半導体装置の製造方法
本実施の形態に係る保護テープは、接着剤層と、熱可塑性樹脂層と、基材フィルム層とをこの順で有し、突起電極が形成されたウエハ面に接着剤層が貼付され、硬化後の接着剤層の貯蔵剪断弾性率が3.0E+08Pa〜5.0E+09Paの範囲であり、貼付前の保護テープの接着剤層の厚さと突起電極の高さとの比(貼付前の接着剤層の厚さ/突起電極の高さ)が1/30〜1/6である。これにより、ウエハのチッピングを抑制するとともに、はんだ接合性を良好にすることができる。
ウエハ21への貼付前の接着剤層11の厚さ(以下、単に「接着剤層の厚さ」ともいう。)と突起電極22の高さとの比(接着剤層の厚さ/突起電極の高さ)は、1/30〜1/6であり、1/30〜1/10であることがより好ましい。接着剤層11の厚さと突起電極22の高さとの比が1/30以上(0.03以上)であることにより、ウエハ21がダイシングされる際に突起電極22を十分に補強することができるため、ウエハ21のチッピングを抑制することができる。また、接着剤層11の厚さと突起電極22の高さとの比が1/6以下(0.17以下)であることにより、接着剤層11を残して保護テープ10を剥離し、他の層(熱可塑性樹脂層12と基材フィルム層13)を除去する際、突起電極22上の樹脂残りが抑制されるため、はんだ接合性を良好にすることができる。
熱可塑性樹脂層12は、例えば、エチレン酢酸ビニル共重合体(EVA:Ethylene Vinyl Acetate)、ポリエチレン、ポリプロピレン、ポリアミド、ポリアセタール、ポリエチレンテレフタレート、ポリブチレンテレフタレート、フッ素樹脂、ポリフェニレンサルファイド、ポリスチレン、ABS(Acrylonitrile Butadiene Styrene)樹脂、アクリル系樹脂、ポリカーボネート、ポリウレタン、ポリ塩化ビニル、ポリフェニレンオキサイドなどの樹脂からなる層である。上記樹脂は、1種単独で使用してもよいし、2種以上を併用してもよい。
基材フィルム層13としては、ポリエチレンテレフタレート、ポリエチレン、ポリプロピレン、ポリエステルなどのプラスチックフィルムや、紙、布、不織布等からなる多孔質基材を用いることができる。
次に、上述した保護テープを用いた半導体装置の製造方法について説明する。本実施の形態に係る半導体装置の製造方法は、突起電極22が形成されたウエハ21面に、上述した保護テープ10を貼付する工程と、ウエハ22の保護テープ貼付面の反対面をグラインドする工程と、ウエハ22のグラインド面に粘着テープを貼付する工程と、接着剤層11を残して保護テープ10を剥離し、他の層を除去する工程と、粘着テープが貼付されたウエハ21をダイシングし、個片の半導体チップを得る工程と、ダイシングの前に接着剤層11を硬化させる工程とを有する。ここで、接着剤層11を硬化させる硬化工程は、グラインドする工程、粘着テープを貼付する工程、及びダイシングする工程のいずれかの工程前に行われればよい。このように、接着剤層11の硬化をダイシングの前に行うことにより、ダイシング、ピックアップ、実装などの後工程において、突起電極22をより確実に保護することができる。
図1及び図2に示すように、保護テープ貼付工程では、突起電極22が形成されたウエハ21面に保護テープ10を貼り付ける。保護テープ10を貼り付ける貼付温度は、ボイドの減少、ウエハ密着性の向上およびウエハ研削後のウエハの反り防止の観点から、25℃〜100℃が好ましく、40℃〜80℃がより好ましい。保護テープ10は、ウエハ21への貼付前の状態において、上述した接着剤層11の厚さと突起電極22の高さとの比を満たすことが好ましい。
図3は、グラインド工程の概略を示す断面図である。グラインド工程では、保護テープ10を貼り付けたウエハ21の反対面、すなわち、突起電極22が形成されている面とは反対面を研削装置に固定して研磨する。研磨は、通常ウエハ21の厚みが50〜600μmになるまで行うことができる。本実施の形態では、上述した接着剤層11の厚さと突起電極22の高さとの比を満たすことにより、接着剤層11により突起電極22を補強することができるため、ウエハ21の反対面を50μm以下の厚さまで研磨してもよい。
図4は、粘着テープ貼付工程の概略を示す断面図である。粘着テープ貼付工程では、ウエハ21のグラインド面に粘着テープ30を貼付する。粘着テープ30は、ダイシングテープ(Dicing Tape)と呼ばれるものであり、ダイシング工程(F)において、ウエハ21を保護、固定し、ピックアップ工程(H)まで保持するためのテープである。
図5は、保護テープ剥離工程の概略を示す断面図である。保護テープ剥離工程では、接着剤層11を残して保護テープ10を剥離し、他の層、すなわち、熱可塑性樹脂層12及び基材フィルム層13を除去する。これにより、ウエハ21上には接着剤層11のみが残る。
図6は、硬化工程の概略を示す断面図である。硬化工程では、接着剤層11を硬化させる。硬化方法及び硬化条件としては、熱硬化型の接着剤を硬化させる公知の方法を用いることができる。硬化条件は、例えば、100〜200℃で1時間以上とすることができる。
図7は、ダイシング工程の概略を示す断面図である。ダイシング工程では、粘着テープ30が貼付されたウエハ21をダイシングし、個片の半導体チップを得る。ダイシング方法としては、特に限定されず、例えばダイシングソーでウエハ21を切削して切り出すなどの公知の方法を用いることができる。
図8は、エキスパンド工程の概略を示す断面図である。エキスパンド工程では、例えば分割された複数個の半導体チップが貼着されている粘着テープ30を水平方向に伸長させ、個々の半導体チップの間隔を広げる。
図9は、ピックアップ工程の概略を示す断面図である。ピックアップ工程では、粘着テープ30上に貼着固定された半導体チップを、粘着テープ30の下面より突き上げて剥離させ、この剥離された半導体チップをコレットで吸着する。ピックアップされた半導体チップは、チップトレイに収納されるか、またはフリップチップボンダーのチップ搭載ノズルへと搬送される。
図10は、実装工程の概略を示す断面図である。実装工程では、例えば半導体チップと回路基板とをNCF(Non Conductive Film)などの回路接続材料を用いて接続する。回路基板としては、特に限定されないが、ポリイミド基板、ガラスエポキシ基板などのプラスチック基板、セラミック基板などを用いることができる。また、接続方法としては、加熱ボンダー、リフロー炉などを用いる公知の方法を用いることができる。
接着剤層及び熱可塑性樹脂層の貯蔵剪断弾性率は、粘弾性測定装置を用いて算出した。測定条件は、測定温度域0〜120℃、昇温速度5℃/分、振動数1Hz、歪み0.1%に設定した。
<熱可塑性樹脂層の作製>
PET(Polyethylene terephthalate)基材(厚み75μm)上に、熱可塑性樹脂(プロピレン・オレフィン共重合体樹脂(Notio PN0040、三井化学(株)社製))を乾燥後の厚みが500μmとなるように押し出し溶融成型した。熱可塑性樹脂層の60℃での貯蔵剪断弾性率は、1.4E+05Paであった。
表1に示すように、下記成分を配合して接着剤層を作製した。
膜形成樹脂:フェノキシ樹脂(PKHH、ユニオンカーバイド(株)社製)
膜形成樹脂:アクリル酸共重合体(SG−80、ナガセケムテックス(株)社製)
エポキシ樹脂:ジシクロペンタジエン型エポキシ樹脂(HP7200H、DIC(株)社製)
硬化剤:ノボラック型フェノール樹脂(TD−2093、DIC(株)社製)
硬化助剤:2−エチル−4−メチルイミダゾール(2E4MZ)
フィラー:シリカ(アエロジルRY200、日本アエロジル(株)社製)
フェノキシ樹脂13.0質量部と、エポキシ樹脂54.8質量部と、硬化剤32.4質量部と、硬化助剤0.3質量部と、フィラー33質量部とを配合して接着剤組成物を調製した。この接着剤組成物を、乾燥後の厚みが20μmとなるように剥離処理されたPETにバーコーターを用いて塗布し、オーブンで乾燥させて接着剤層No.1−1を得た。
乾燥後の厚みが10μmとなるように剥離処理されたPETにバーコーターを用いて塗布し、オーブンで乾燥させたこと以外は、接着剤層No.1−1と同様の方法で接着剤層No.1−2を得た。
乾燥後の厚みが30μmとなるように剥離処理されたPETにバーコーターを用いて塗布し、オーブンで乾燥させたこと以外は、接着剤層No.1−1と同様の方法で接着剤層No.1−3を得た。
乾燥後の厚みが5μmとなるように剥離処理されたPETにバーコーターを用いて塗布し、オーブンで乾燥させたこと以外は、接着剤層No.1−1と同様の方法で接着剤層No.1−4を得た。
乾燥後の厚みが40μmとなるように剥離処理されたPETにバーコーターを用いて塗布し、オーブンで乾燥させたこと以外は、接着剤層No.1−1と同様の方法で接着剤層No.1−5を得た。
アクリル酸共重合体80.0質量部と、エポキシ樹脂54.8質量部と、硬化剤32.4質量部と、硬化助剤0.3質量部と、フィラー5.0質量部とを配合して接着剤組成物を調製した。この接着剤組成物を、乾燥後の厚みが20μmとなるように剥離処理されたPETにバーコーターを用いて塗布し、オーブンで乾燥させて接着剤層No.2を得た。
フェノキシ樹脂13.0質量部と、エポキシ樹脂54.8質量部と、硬化剤32.4質量部と、硬化助剤0.3質量部と、フィラー55.0質量部とを配合して接着剤組成物を調製した。この接着剤組成物を、乾燥後の厚みが20μmとなるように剥離処理されたPETにバーコーターを用いて塗布し、オーブンで乾燥させて接着剤層No.3を得た。
アクリル酸共重合体160.0質量部と、エポキシ樹脂54.8質量部と、硬化剤32.4質量部と、硬化助剤0.3質量部と、フィラー5.0質量部とを配合して接着剤組成物を調製した。この接着剤組成物を、乾燥後の厚みが20μmとなるように剥離処理されたPETにバーコーターを用いて塗布し、オーブンで乾燥させて接着剤層No.4を得た。
フェノキシ樹脂13.0質量部と、エポキシ樹脂54.8質量部と、硬化剤32.4質量部と、硬化助剤0.3質量部と、フィラー100.0質量部とを配合して接着剤組成物を調製した。この接着剤組成物を、乾燥後の厚みが20μmとなるように剥離処理されたPETにバーコーターを用いて塗布し、オーブンで乾燥させて接着剤層No.5を得た。
上記熱可塑性樹脂層と、上記接着剤層No.1−1とをラミネートし、保護テープを作製した。
上記熱可塑性樹脂層と、上記接着剤層No.1−2とをラミネートし、保護テープを作製した。
上記熱可塑性樹脂層と、上記接着剤層No.1−3とをラミネートし、保護テープを作製した。
上記熱可塑性樹脂層と、上記接着剤層No.2とをラミネートし、保護テープを作製した。
上記熱可塑性樹脂層と、上記接着剤層No.3とをラミネートし、保護テープを作製した。
上記熱可塑性樹脂層と、上記接着剤層No.1−4とをラミネートし、保護テープを作製した。
上記熱可塑性樹脂層と、上記接着剤層No.1−5とをラミネートし、保護テープを作製した。
上記熱可塑性樹脂層と、上記接着剤層No.4とをラミネートし、保護テープを作製した。
上記熱可塑性樹脂層と、上記接着剤層No.5とをラミネートし、保護テープを作製した。
保護テープの接着剤層面を、はんだバンプ(φ=250μm、H=200μm、ピッチ=250μm)が形成されたウエハ(サイズ:5cm×5cm×700μm厚)に貼り付け、真空式ラミネータを用いて60℃の温度でラミネートした。
基板の金電極上にフラックスを塗布し、最大260℃のリフロー温度ではんだ接合した際に、バンプサイズの面積を100%として、はんだが濡れ広がった面積を計測した。はんだが濡れ広がった面積が、バンプサイズの面積に対して50%以上の場合をはんだ接合性が良好と評価し、50%未満の場合をはんだ接合性が良好でないと評価した。結果を下記表2及び表3に示す。
個片化したチップをマイクロスコープ(100倍)で観察し、10μm以上のチッピングがある場合を「×」と評価し、10μm以上のチッピングがない場合を「○」と評価した。結果を下記表2及び表3に示す。
Claims (10)
- 突起電極が形成されたウエハ面に、接着剤層と、熱可塑性樹脂層と、基材フィルム層とをこの順で有する保護テープを貼付する工程と、
上記ウエハの上記保護テープ貼付面の反対面をグラインドする工程と、
上記ウエハのグラインド面に粘着テープを貼付する工程と、
上記接着剤層を残して上記保護テープを剥離し、他の層を除去する工程と、
上記接着剤層が残されたままのウエハをダイシングし、個片の半導体チップを得る工程と、
上記ダイシングの前に上記接着剤層を硬化させる工程とを有し、
上記硬化後の接着剤層の貯蔵剪断弾性率が3.0E+08Pa〜5.0E+09Paであり、
上記貼付前の保護テープの接着剤層の厚さと上記突起電極の高さとの比(貼付前の接着剤層の厚さ/突起電極の高さ)が1/30〜1/6である、半導体装置の製造方法。 - 上記接着剤層は、接着剤組成物を用いて形成されており、
上記接着剤組成物は、膜形成樹脂と熱硬化性樹脂と硬化剤とフィラーとを含有し、上記接着剤組成物中のフィラーの含有量が3〜35質量%である、請求項1記載の半導体装置の製造方法。 - 上記接着剤層は、接着剤組成物を用いて形成されており、
上記接着剤組成物は、膜形成樹脂と熱硬化性樹脂と硬化剤とフィラーとを含有し、上記接着剤組成物中のフィラーの含有量が25〜35質量%である、請求項1記載の半導体装置の製造方法。 - 上記貼付前の保護テープの接着剤層の厚さが10〜30μmである、請求項1〜3のいずれか1項に記載の半導体装置の製造方法。
- 上記突起電極の高さが100〜300μmである、請求項1〜4のいずれか1項に記載の半導体装置の製造方法。
- 上記個片の半導体チップの突起電極がはんだバンプであり、
上記個片の半導体チップと、フラックス付き電極を形成した基板とをリフロー炉で接合させる実装工程をさらに有する、請求項1〜5のいずれか1項に記載の半導体装置の製造方法。 - 接着剤層と、熱可塑性樹脂層と、基材フィルム層とをこの順で有し、突起電極が形成されたウエハ面に上記接着剤層が貼付される保護テープであって、
硬化後の上記接着剤層の貯蔵剪断弾性率が3.0E+08Pa〜5.0E+09Paの範囲であり、
上記貼付前の保護テープの接着剤層の厚さと上記突起電極の高さとの比(貼付前の接着剤層の厚さ/突起電極の高さ)が1/30〜1/6である、保護テープ。 - 上記接着剤層は、接着剤組成物を用いて形成されており、
上記接着剤組成物は、膜形成樹脂と熱硬化性樹脂と硬化剤とフィラーとを含有し、上記接着剤組成物中のフィラーの含有量が3〜35質量%である、請求項7記載の保護テープ。 - 上記接着剤層は、接着剤組成物を用いて形成されており、
上記接着剤組成物は、膜形成樹脂と熱硬化性樹脂と硬化剤とフィラーとを含有し、上記接着剤組成物中のフィラーの含有量が25〜35質量%である、請求項7記載の保護テープ。 - 上記硬化前の接着剤層の60℃での貯蔵剪断弾性率(Gn)が1.0E+01Pa〜1.0E+05Paである、請求項1〜6のいずれか1項に記載の半導体装置の製造方法。
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