JP6500572B2 - 回路構造体 - Google Patents
回路構造体 Download PDFInfo
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- JP6500572B2 JP6500572B2 JP2015082806A JP2015082806A JP6500572B2 JP 6500572 B2 JP6500572 B2 JP 6500572B2 JP 2015082806 A JP2015082806 A JP 2015082806A JP 2015082806 A JP2015082806 A JP 2015082806A JP 6500572 B2 JP6500572 B2 JP 6500572B2
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- wiring
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- 239000011347 resin Substances 0.000 claims description 85
- 229920005989 resin Polymers 0.000 claims description 85
- 239000000463 material Substances 0.000 claims description 31
- 239000007788 liquid Substances 0.000 claims description 14
- 239000000853 adhesive Substances 0.000 claims description 12
- 230000001070 adhesive effect Effects 0.000 claims description 12
- 238000001746 injection moulding Methods 0.000 claims description 5
- 238000009736 wetting Methods 0.000 claims description 3
- 230000008859 change Effects 0.000 description 23
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 15
- 238000004519 manufacturing process Methods 0.000 description 15
- 238000000034 method Methods 0.000 description 15
- 229910052709 silver Inorganic materials 0.000 description 15
- 239000004332 silver Substances 0.000 description 15
- 230000015572 biosynthetic process Effects 0.000 description 11
- 239000000758 substrate Substances 0.000 description 10
- 230000008569 process Effects 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 238000000465 moulding Methods 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 230000008602 contraction Effects 0.000 description 5
- 238000002347 injection Methods 0.000 description 5
- 239000007924 injection Substances 0.000 description 5
- 229920000122 acrylonitrile butadiene styrene Polymers 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 230000036541 health Effects 0.000 description 3
- 229920000139 polyethylene terephthalate Polymers 0.000 description 3
- 239000005020 polyethylene terephthalate Substances 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- -1 Polyethylene terephthalate Polymers 0.000 description 2
- 239000004734 Polyphenylene sulfide Substances 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 239000011231 conductive filler Substances 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000007641 inkjet printing Methods 0.000 description 2
- 229920003207 poly(ethylene-2,6-naphthalate) Polymers 0.000 description 2
- 239000011112 polyethylene naphthalate Substances 0.000 description 2
- 229920000069 polyphenylene sulfide Polymers 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- XECAHXYUAAWDEL-UHFFFAOYSA-N acrylonitrile butadiene styrene Chemical compound C=CC=C.C=CC#N.C=CC1=CC=CC=C1 XECAHXYUAAWDEL-UHFFFAOYSA-N 0.000 description 1
- 239000004676 acrylonitrile butadiene styrene Substances 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000036772 blood pressure Effects 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 238000005549 size reduction Methods 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 239000011850 water-based material Substances 0.000 description 1
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- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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- H01L2224/821—Forming a build-up interconnect
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Description
本発明の実施形態1について、図1および2に基づいて以下に説明する。
図1は、本発明の実施形態1に係る回路構造体1の要部構成を示す図である。図1の(a)は回路構造体1の上面図であり、(b)は回路構造体1の側部断面図である。図1の(a)に示すように、回路構造体1は、樹脂成型体2、電子部品3、および配線41,42を備えている。
図2は、本発明の実施形態1に係る回路構造体1の製造方法を示す図である。以下に、この図を参照して回路構造体1の製造方法を説明する。
図2の(a)に示すように、まず、電子部品3を仮固定するためのシート5を用意する。シート5の基材シートの材料としては、紫外線を透過できる透明性と、後で説明する剥離時の工程を確実にできるようにする柔軟性とを有している材料が好ましく、たとえば、PET(ポリエチレンテレフタレート)、PEN(ポリエチレンナフタレート)、PPS(ポリフェニレンサルファイド)等を用いることができる。本実施形態ではシート5は50μmの厚さのPETシートである。
シート5に電子部品3を仮固定した後、回路構造体1を製造するための金型にシート5を配置する。この金型は、電子部品3が埋設された樹脂成型体2を射出成型するための金型である。シート5における電子部品3が仮固定された表面の裏側の表面が、金型における対応する表面に接するように、シート5を配置する。シート5は、金型における樹脂成型体2の表面の形成位置に配置される。この状態で、ABS樹脂等の樹脂材料を、金型温度80℃、射出樹脂温度180℃、かつ射出圧力20kg/cm2の条件で射出する。これにより、電子部品3が樹脂成型体2に埋設される。
前記の射出成型によって得られる成形物から、シート5を剥離することによって、樹脂成型体2の表面に電子部品3の電極31,32を露出させる。仮固定工程において形成される濡れ上がり部61も、シート5と共に樹脂成型体2から剥離される。この結果、電子部品3の周囲に溝21が配置された樹脂成型体2が形成される。
最後に、樹脂成型体2の表面から露出する電極31,32を接続するための配線41,42を、当該表面に形成する。その際、たとえば、配線41,42の材料である導電性の銀ナノインクを噴射する方法(たとえばインクジェット印刷)が用いられる。配線41,42の形成時、インクジェットヘッドの噴出口が、溝21上を通過するように移動する。これにより配線41,42が溝21内を通過するように形成される。より詳細には、配線41,42は、樹脂成型体2における平らな表面および溝21の表面を連続的に覆うように形成される。
本発明に係る実施形態2について、図3および4に基づいて以下に説明する。上述した実施形態1と共通する各部材には同じ符号を付し、詳細な説明を省略する。
図3は、本発明の実施形態1に係る回路構造体1aの要部構成を示す図である。図3の(a)は回路構造体1aの上面図であり、(b)は回路構造体1aの側部断面図である。図3の(a)に示すように、回路構造体1aは、本発明の実施形態1に係る回路構造体1と同様に、樹脂成型体2、電子部品3、および配線41,42を備えている。しかし本実施形態に係る回路構造体1aは、配線41,42に凹み部43,44が形成されている点において、実施形態1に係る回路構造体1と異なっている。
図4は、本発明の実施形態2に係る回路構造体1aの製造方法を示す図である。以下に、この図を参照して回路構造体1aの製造方法を説明する。
本発明に係る実施形態3について、図5に基づいて以下に説明する。上述した実施形態1または2と共通する各部材には同じ符号を付し、詳細な説明を省略する。
図5は、本発明の実施形態3に係る回路構造体1bの要部構成を示す図である。図5の(a)は回路構造体1bの上面図であり、(b)は回路構造体1bの側部断面図である。図5の(a)に示すように、回路構造体1bは、本発明の実施形態2に係る回路構造体1aと同様に、樹脂成型体2、電子部品3、および配線41,42を備えている。さらに、図5の(b)に示すように、本実施形態に係る回路構造体1bにおいても、実施形態2に係る回路構造体1aと同様に、配線41,42に凹み部43,44が形成されている。しかし本実施形態に係る回路構造体1bは、追加の導電層71,72をさらに備えている点において、実施形態2に係る回路構造体1aと異なっている。
2 樹脂成型体
3 電子部品
5 シート
6 液状層
31,32 電極
41,42 配線
71,72 導電層
Claims (4)
- 電極を有する電子部品と、前記電子部品が埋設された樹脂成型体と、前記電極に接続される配線とを有する回路構造体であって、
前記樹脂成型体における前記電子部品の周囲に溝が形成されており、前記配線は、前記溝内を通過するように設けられており、
前記配線における前記溝に対応する位置に、前記溝の底部に向かう凹み部が形成されていることを特徴とする回路構造体。 - 電極を有する電子部品と、前記電子部品が埋設された樹脂成型体と、前記電極に接続される配線とを有する回路構造体であって、
前記樹脂成型体における前記電子部品の周囲に溝が形成されており、前記配線は、前記溝内を通過するように設けられており、
前記溝内において前記配線と前記電子部品との間に設けられる少なくとも1つの導電層をさらに備えていることを特徴とする回路構造体。 - 前記配線は、前記溝内に充填されるように設けられていることを特徴とする請求項2に記載の回路構造体。
- 電極を有する電子部品を接着性の液状層が表面に塗布されたシートに配置した際の前記液状層の濡れ上がりによって、前記電子部品の周囲に濡れ上がり部を形成する工程と、
前記濡れ上がり部を硬化する工程と、
前記濡れ上がり部が硬化された後、前記シートにおける前記電子部品の配置面に樹脂材料を射出成型する工程と、
前記シートと共に前記濡れ上がり部を剥離することによって、前記電子部品の周囲に前記濡れ上がり部に応じた溝が配置された樹脂成型体を形成する工程と、
前記電極に接続される配線を、前記溝を通過するように形成する工程とを有することを特徴とする製造方法。
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US15/562,921 US10334733B2 (en) | 2015-04-14 | 2016-03-22 | Circuit structure |
KR1020177026486A KR102062065B1 (ko) | 2015-04-14 | 2016-03-22 | 회로 구조체 |
PCT/JP2016/058891 WO2016167081A1 (ja) | 2015-04-14 | 2016-03-22 | 回路構造体 |
CN201680017265.XA CN107431046B (zh) | 2015-04-14 | 2016-03-22 | 电路结构体 |
KR1020197037715A KR102163907B1 (ko) | 2015-04-14 | 2016-03-22 | 회로 구조체 |
EP16779872.7A EP3285287A4 (en) | 2015-04-14 | 2016-03-22 | Circuit structure |
TW105109375A TWI677266B (zh) | 2015-04-14 | 2016-03-25 | 電路結構體以及其製造方法 |
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WO2016167081A1 (ja) | 2016-10-20 |
US10334733B2 (en) | 2019-06-25 |
TW201644341A (zh) | 2016-12-16 |
TWI677266B (zh) | 2019-11-11 |
KR102163907B1 (ko) | 2020-10-12 |
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