JP6429388B2 - Manufacturing method of laminated device - Google Patents

Manufacturing method of laminated device Download PDF

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JP6429388B2
JP6429388B2 JP2015055913A JP2015055913A JP6429388B2 JP 6429388 B2 JP6429388 B2 JP 6429388B2 JP 2015055913 A JP2015055913 A JP 2015055913A JP 2015055913 A JP2015055913 A JP 2015055913A JP 6429388 B2 JP6429388 B2 JP 6429388B2
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wafer
device wafer
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temporary adhesive
bonded
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JP2016178162A (en
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祥一 児玉
祥一 児玉
展秀 前田
展秀 前田
ヨンソク キム
ヨンソク キム
章仁 川合
章仁 川合
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Disco Corp
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Priority to KR1020160031022A priority patent/KR102363209B1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Dicing (AREA)

Description

本発明は、積層デバイスの製造方法に関する。   The present invention relates to a method for manufacturing a laminated device.

近年においては、半導体デバイスの小型化にともなって、ウエーハとウエーハとを積層してそれぞれのウエーハに備える複数のデバイスをＴＳＶ（Through Silicon Via）と呼ばれる貫通電極で接続する３次元実装技術が開発されている。   In recent years, with the miniaturization of semiconductor devices, three-dimensional mounting technology has been developed in which wafers and wafers are stacked and a plurality of devices provided on each wafer are connected by through electrodes called TSVs (Through Silicon Vias). ing.

かかる技術において、複数のウエーハを積層するために、例えば、仮接着材によってサポートウエーハにウエーハを仮接着した状態の仮ウエーハを薄化し、固定用接着材によって仮ウエーハを別のベースのウエーハに貼り合わせることにより貼り合わせウエーハを形成する方法がある。この方法では、固定用接着材を加熱することにより固定用接着材を軟化させつつ、固定用接着材を加圧して拡張させて仮ウエーハとベースのウエーハとの間に介在させたのち、固定用接着材が硬化することで２つのウエーハを貼り合わせることができる。   In this technique, in order to stack a plurality of wafers, for example, the temporary wafer in a state where the wafer is temporarily bonded to the support wafer is thinned with a temporary adhesive, and the temporary wafer is attached to another base wafer with a fixing adhesive. There is a method of forming a bonded wafer by bonding. In this method, the fixing adhesive is softened by heating the fixing adhesive, and the fixing adhesive is pressurized and expanded to be interposed between the temporary wafer and the base wafer, and then fixed. The two wafers can be bonded together by curing the adhesive.

貼り合わせウエーハを形成した後は、サポートウエーハを仮接着材から剥がす必要があるため、仮接着材から剥離しやすいサポートウエーハとして、例えばガラス基板が用いられている。ガラス基板を仮接着材から剥がす際には、例えばガラス基板を通じてレーザ光を仮接着材に照射してガラス基板に接する仮接着材のみを硬化（灰化）させて接着力を弱めてからガラス基板を剥離したり、加熱処理で仮接着材の接着力を低減させ、ガラス基板とウエーハとを仮接着材で固定した面に対して水平にスライドさせてウエーハからガラス基板を剥離したりしている（例えば、下記の特許文献１及び２を参照）。   After the bonded wafer is formed, the support wafer needs to be peeled off from the temporary adhesive, and therefore, for example, a glass substrate is used as a support wafer that is easily peeled off from the temporary adhesive. When peeling the glass substrate from the temporary adhesive, for example, the glass substrate is irradiated with laser light through the glass substrate to cure (ash) only the temporary adhesive that contacts the glass substrate and weaken the adhesive force. Or the adhesive strength of the temporary adhesive is reduced by heat treatment, and the glass substrate and wafer are slid horizontally with respect to the surface fixed by the temporary adhesive to peel the glass substrate from the wafer. (See, for example, Patent Documents 1 and 2 below).

特開２０１１−２２５８１４号公報JP 2011-225814 A 特開２０１０−５０６４０６号公報JP 2010-506406 A

しかし、上記のように仮接着材からガラス基板を剥がす際に仮接着材を加熱すると、ウエーハとウエーハとを貼り合わせる場合には、仮接着材だけでなく固定用接着材も軟化してしまうため、固定用接着材が硬化する前に仮接着材が軟化して、ウエーハがずれて積層されてしまったり、固定用接着材の厚みが均一にならなかったりすることがある。   However, if the temporary adhesive is heated when the glass substrate is peeled off from the temporary adhesive as described above, not only the temporary adhesive but also the fixing adhesive is softened when the wafer and the wafer are bonded together. The temporary adhesive may be softened before the fixing adhesive is cured, and the wafers may be misaligned and stacked, or the thickness of the fixing adhesive may not be uniform.

また、ガラス基板をウエーハから剥離した後、仮接着材がデバイス領域に残存する場合があるため、洗浄液などによって該デバイス領域を洗浄する必要があり、作業負担が大きい。
さらに、ガラス基板を再使用するためには、仮接着材の除去と洗浄とが必要であり、作業負担が大きい。 In addition, since the temporary adhesive may remain in the device region after the glass substrate is peeled from the wafer, it is necessary to clean the device region with a cleaning liquid or the like, and the work load is large.
Furthermore, in order to reuse the glass substrate, it is necessary to remove the temporary adhesive and clean it, and the work load is large.

本発明は、上記の事情にかんがみてなされたものであり、サポートウエーハをウエーハから容易に除去できるようにすることを目的とする。   The present invention has been made in view of the above circumstances, and an object of the present invention is to make it possible to easily remove a support wafer from a wafer.

本発明は、複数の半導体デバイスが積層された積層デバイスの製造方法であって、表面の交差する分割予定ラインによって区画された領域にデバイスを形成した第１のデバイスウエーハを準備する第１のデバイスウエーハ準備工程と、シリコンウエーハからなるサポートウエーハを準備するサポートウエーハ準備工程と、表面の交差する分割予定ラインによって区画された領域にデバイスを形成した第２のデバイスウエーハを準備する第２のデバイスウエーハ準備工程と、該第１のデバイスウエーハの表面と該サポートウエーハとを仮接着材で仮接着して仮ウエーハを形成する仮ウエーハ形成工程と、該仮ウエーハ形成工程で形成した該仮ウエーハを構成する該サポートウエーハをチャックテーブルで保持して該第１のデバイスウエーハの裏面側から研削して該第１のデバイスウエーハを所定の厚みに薄化する薄化工程と、該サポートウエーハを仮接着した状態を維持したまま、該薄化工程で薄化された該第１のデバイスウエーハの被研削面と該第２のデバイスウエーハの表面とを貼り合わせて貼り合わせウエーハを形成する貼り合わせウエーハ形成工程と、該貼り合わせウエーハ形成工程で形成された該貼り合わせウエーハの該第２のデバイスウエーハの裏面をチャックテーブルで保持して該サポートウエーハを少なくとも研削して該仮接着材を表出させる仮接着材表出工程と、該仮接着材表出工程で表出した仮接着材を該第１のデバイスウエーハの表面から除去し該第１のデバイスウエーハの表面を表出させる仮接着材除去工程と、該仮接着材除去工程の後、該第１のデバイスウエーハと該第２のデバイスウエーハとを貫通する貫通電極を形成する貫通電極形成工程と、からなる。
該貫通電極形成工程の後、該第１のデバイスウエーハの分割予定ラインに沿って個々のデバイスに分割する分割工程を実施してもよい。 The present invention is a method for manufacturing a stacked device in which a plurality of semiconductor devices are stacked, and a first device is provided that prepares a first device wafer in which devices are formed in regions partitioned by division lines that intersect on the surface. A wafer preparation step, a support wafer preparation step for preparing a support wafer made of silicon wafer, and a second device wafer for preparing a second device wafer in which devices are formed in a region defined by division lines to intersect on the surface A provisional step, a temporary wafer forming step of temporarily bonding the surface of the first device wafer and the support wafer with a temporary adhesive to form a temporary wafer, and the temporary wafer formed in the temporary wafer forming step The support wafer to be held is held by a chuck table and the back of the first device wafer A thinning step of thinning the first device wafer to a predetermined thickness by grinding from the side, and the first thinned by the thinning step while maintaining the temporarily bonded support wafer A bonded wafer forming step of bonding a surface to be ground of a device wafer and a surface of the second device wafer to form a bonded wafer; and the first of the bonded wafers formed in the bonded wafer forming step A temporary adhesive material exposing step in which the back surface of the device wafer of 2 is held by a chuck table and at least the support wafer is ground to expose the temporary adhesive material, and the temporary adhesion expressed in the temporary adhesive material exposing step Removing the material from the surface of the first device wafer to expose the surface of the first device wafer; after the temporary adhesive removing step, the first device A through electrode formation step of forming a through electrode penetrating the Eha and the second device wafer consists.
After the through electrode forming step, a dividing step for dividing the first device wafer into individual devices along a division planned line may be performed.

本発明の積層デバイスの製造方法は、仮ウエーハ形成工程を実施して第１のデバイスウエーハの表面にシリコンウエーハからなるサポートウエーハを仮接着材で仮接着して仮ウエーハを形成した後、薄化工程で薄化された第１のデバイスウエーハの被研削面と第２のデバイスウエーハの表面とを、第１のデバイスウエーハが仮接着材でサポートウエーハに仮接着された状態を維持したまま貼り合わせて貼り合わせウエーハ形成工程を実施するようにしたため、第１のデバイスウエーハと第２のデバイスウエーハとがずれて貼り合わせられることはない。
また、仮接着材を加熱せずに、サポートウエーハを少なくとも研削して仮接着材を表出させるようにしたため、第１のデバイスウエーハから容易にサポートウエーハを除去することができ、積層された状態の第１のデバイスウエーハと第２のデバイスウエーハとにずれが生じることはない。
さらに、仮接着材表出工程の後に仮接着材除去工程を実施するときは、仮接着材を第１のデバイスウエーハのデバイスから除去するため、仮接着材の除去と第１のデバイスウエーハの表面の洗浄とを同時に行うことが可能となり、作業負担が軽減する。 In the method for manufacturing a laminated device of the present invention, the provisional wafer forming step is performed, a support wafer made of a silicon wafer is temporarily bonded to the surface of the first device wafer with a temporary adhesive material to form a temporary wafer, and then thinned. The ground surface of the first device wafer thinned in the process and the surface of the second device wafer are bonded together while the first device wafer is temporarily bonded to the support wafer with a temporary adhesive. Since the bonded wafer forming process is performed, the first device wafer and the second device wafer are not bonded to each other in a shifted manner.
In addition, since the support wafer is at least ground to expose the temporary adhesive without heating the temporary adhesive, the support wafer can be easily removed from the first device wafer and stacked. There is no deviation between the first device wafer and the second device wafer.
Further, when the temporary adhesive removal process is performed after the temporary adhesive material exposing process, the temporary adhesive is removed from the device of the first device wafer, so that the temporary adhesive is removed and the surface of the first device wafer is removed. Can be performed at the same time, reducing the work load.

（ａ）は第１のデバイスウエーハ準備工程、（ｂ）はサポートウエーハ準備工程、（ｃ）は第２のデバイスウエーハ準備工程を示す断面図である。(A) is a 1st device wafer preparation process, (b) is a support wafer preparation process, (c) is sectional drawing which shows a 2nd device wafer preparation process. 仮ウエーハ形成工程を示す断面図である。It is sectional drawing which shows a temporary wafer formation process. 薄化工程を示す断面図である。It is sectional drawing which shows a thinning process. 貼り合わせウエーハ形成工程を示す断面図である。It is sectional drawing which shows a bonding wafer formation process. 仮接着材表出工程のうち、貼り合わせウエーハの第２のデバイスウエーハをチャックテーブルで保持する状態を示す断面図である。It is sectional drawing which shows the state which hold | maintains the 2nd device wafer of a bonding wafer by a chuck | zipper table among temporary adhesion material exposure processes. 仮接着材表出工程のうち、研削手段によって貼り合わせウエーハを構成するサポートウエーハを研削する状態を示す断面図である。It is sectional drawing which shows the state which grinds the support wafer which comprises a bonding wafer by a grinding | polishing means among temporary adhesion material exposure processes. 仮接着材除去工程を示す断面図である。It is sectional drawing which shows a temporary adhesive removal process. 貫通電極形成工程を示す断面図である。It is sectional drawing which shows a penetration electrode formation process. 分割工程を示す断面図である。It is sectional drawing which shows a division | segmentation process. 積層デバイスウエーハを示す断面図である。It is sectional drawing which shows a laminated device wafer. 積層デバイスウエーハが分割された状態を示す断面図である。It is sectional drawing which shows the state by which the laminated device wafer was divided | segmented.

以下では、添付の図面を参照しながら、半導体デバイスが複数積層された積層デバイスの製造方法について説明する。   Hereinafter, a method for manufacturing a stacked device in which a plurality of semiconductor devices are stacked will be described with reference to the accompanying drawings.

（１）第１のデバイスウエーハ準備工程
図１（ａ）に示すように、第１のデバイスウエーハ１を準備する。第１のデバイスウエーハ１は、表面１ａの交差する分割予定ラインＳによって区画された各領域にデバイスＤが形成されている。表面１ａと反対側の裏面１ｂにはデバイスが形成されておらず、例えば研削砥石によって研削される被研削面となっている。図示の例における第１のデバイスウエーハ１は、例えばシリコンウエーハから構成されており、表面１ａ側を下向きにし、裏面１ｂ側を上向きにしておく。 (1) First Device Wafer Preparation Step As shown in FIG. 1A, a first device wafer 1 is prepared. In the first device wafer 1, devices D are formed in each region defined by the division planned lines S where the surface 1 a intersects. No device is formed on the back surface 1b opposite to the front surface 1a, and is a surface to be ground that is ground by, for example, a grinding wheel. The first device wafer 1 in the illustrated example is composed of, for example, a silicon wafer, with the front surface 1a facing downward and the back surface 1b facing upward.

（２）サポートウエーハ準備工程
図１（ｂ）に示すように、第１のデバイスウエーハ１の表面１ａを保護するためのサポートウエーハ３を準備する。サポートウエーハ３は、シリコンウエーハから構成されている。サポートウエーハ３の表裏面には、特に何も形成されていない。サポートウエーハ３は、第１のデバイスウエーハ１の研削時や搬送時などにおいて表面１ａの全面に被覆されて使用される。 (2) Support Wafer Preparation Step As shown in FIG. 1B, a support wafer 3 for protecting the surface 1a of the first device wafer 1 is prepared. The support wafer 3 is composed of a silicon wafer. Nothing is particularly formed on the front and back surfaces of the support wafer 3. The support wafer 3 is used by being coated on the entire surface 1a when the first device wafer 1 is ground or conveyed.

（３）第２のデバイスウエーハ準備工程
図１（ｃ）に示すように、第２のデバイスウエーハ２を準備する。第２のデバイスウエーハ２も、第１のデバイスウエーハ１と同様に構成されている。すなわち、表面２ａの交差する分割予定ラインＳによって区画された各領域にデバイスＤが形成され、表面２ａと反対側の裏面２ｂにはデバイスが形成されていない。図示の例における第２のデバイスウエーハ２は、第１のデバイスウエーハ１と同様に例えばシリコンウエーハから構成されており、表面２ａ側を上向きにして裏面２ｂ側を下向きにしておく。なお、第２のデバイスウエーハ準備工程は、少なくとも後記の貼り合わせウエーハ形成工程の前までに実施すればよい。 (3) Second Device Wafer Preparation Step As shown in FIG. 1C, a second device wafer 2 is prepared. The second device wafer 2 is configured in the same manner as the first device wafer 1. That is, the device D is formed in each region defined by the division lines S where the surface 2a intersects, and no device is formed on the back surface 2b opposite to the surface 2a. The second device wafer 2 in the illustrated example is composed of, for example, a silicon wafer like the first device wafer 1, and the front surface 2a side is directed upward and the back surface 2b side is directed downward. The second device wafer preparation step may be performed at least before the bonded wafer formation step described later.

（４）仮ウエーハ形成工程
第１のデバイスウエーハ１とサポートウエーハ３とを仮接着する。具体的には、図２に示すように、第１のデバイスウエーハ１の表面１ａとサポートウエーハ３とを仮接着材４によって仮接着することにより、第１のデバイスウエーハ１とサポートウエーハ３とが一体となった仮ウエーハ５を形成する。このようにして、サポートウエーハ３により第１のデバイスウエーハ１の表面１ａの全面を覆って複数のデバイスＤを保護する。仮接着材４の材質は、特に限定されるものではなく、第１のデバイスウエーハ１の研削時や搬送時などで、該第１のデバイスウエーハ１が動かないよう仮接着した状態を維持できる接着力を有するものを使用する。 (4) Temporary wafer forming step The first device wafer 1 and the support wafer 3 are temporarily bonded. Specifically, as shown in FIG. 2, the first device wafer 1 and the support wafer 3 are bonded to each other by temporarily bonding the surface 1 a of the first device wafer 1 and the support wafer 3 with a temporary adhesive 4. The integrated temporary wafer 5 is formed. In this way, the support wafer 3 covers the entire surface 1a of the first device wafer 1 to protect the plurality of devices D. The material of the temporary bonding material 4 is not particularly limited, and the bonding that can maintain the temporarily bonded state so that the first device wafer 1 does not move when the first device wafer 1 is ground or conveyed. Use one with strength.

（５）薄化工程
仮ウエーハ形成工程を実施した後、図３に示すように、研削手段２０によって、チャックテーブル１０に保持される仮ウエーハ５を研削する。チャックテーブル１０は、ポーラス部材１１を有しており、ポーラス部材１１の上面がウエーハの一方の面を吸引保持する保持面１２となっている。ポーラス部材１１には吸引源１３が接続されており、保持面１２に吸引源１３の吸引力を作用させることができる。研削手段２０は、鉛直方向の軸心を有するスピンドル２１と、スピンドル２１の下端に装着された研削ホイール２２と、研削ホイール２２の下部に環状に固着された研削砥石２３とを少なくとも備えている。図示しないモータによって駆動されてスピンドル２１が所定の回転速度で回転することにより、研削ホイール２２を所定の回転速度で回転させることができる。 (5) Thinning Step After performing the temporary wafer forming step, the temporary wafer 5 held on the chuck table 10 is ground by the grinding means 20, as shown in FIG. The chuck table 10 has a porous member 11, and the upper surface of the porous member 11 is a holding surface 12 that sucks and holds one surface of the wafer. A suction source 13 is connected to the porous member 11, and the suction force of the suction source 13 can be applied to the holding surface 12. The grinding means 20 includes at least a spindle 21 having a vertical axis, a grinding wheel 22 attached to the lower end of the spindle 21, and a grinding wheel 23 fixed in an annular shape to the lower part of the grinding wheel 22. The grinding wheel 22 can be rotated at a predetermined rotational speed by being driven by a motor (not shown) to rotate the spindle 21 at a predetermined rotational speed.

研削手段２０によって仮ウエーハ５を研削する際には、例えば吸引保持可能な搬送手段により仮ウエーハ５を保持し、チャックテーブル１０の保持面１２にサポートウエーハ３側を載置して第１のデバイスウエーハ１の裏面１ｂを上向きに露出させる。続いて、吸引源１３の吸引力を保持面１２に作用させて保持面１２においてサポートウエーハ３側を吸引保持するとともに、チャックテーブル１０を例えば、矢印Ａ方向に回転させる。次いで、スピンドル２１を回転させ研削ホイール２２を矢印Ａ方向に回転させながら第１のデバイスウエーハ１の裏面１ｂに接近する方向に研削手段２０を下降させ、回転する研削砥石２３で第１のデバイスウエーハ１の裏面１ｂを押圧しながら所定の厚みに至るまで研削して薄化する。   When grinding the temporary wafer 5 by the grinding means 20, for example, the temporary wafer 5 is held by a conveying means capable of sucking and holding, and the support wafer 3 side is placed on the holding surface 12 of the chuck table 10, and the first device The back surface 1b of the wafer 1 is exposed upward. Subsequently, the suction force of the suction source 13 is applied to the holding surface 12 to suck and hold the support wafer 3 side on the holding surface 12, and the chuck table 10 is rotated in the direction of arrow A, for example. Next, while rotating the spindle 21 and rotating the grinding wheel 22 in the direction of arrow A, the grinding means 20 is lowered in a direction approaching the back surface 1b of the first device wafer 1, and the first device wafer is rotated by the rotating grinding wheel 23. While pressing the back surface 1b of 1, it is ground and thinned to a predetermined thickness.

（６）貼り合わせウエーハ形成工程
図４に示すように、薄化工程で薄化された第１のデバイスウエーハ１と、第２のデバイスウエーハ準備工程で準備した第２のデバイスウエーハ２とを固定用接着材６によって貼り合わせる。まず、第１のデバイスウエーハ１の被研削面である裏面１ｂと第２のデバイスウエーハ２の表面２ａと対面させる。続いて第１のデバイスウエーハ１の裏面１ｂと第２のデバイスウエーハ２の表面２ａとを固定用接着材６によって接着する。固定用接着材６は、特にその材質が限定されるものではない。 (6) Bonded Wafer Formation Step As shown in FIG. 4, the first device wafer 1 thinned in the thinning step and the second device wafer 2 prepared in the second device wafer preparation step are fixed. Bonding is performed with the adhesive 6 for use. First, the back surface 1 b that is the surface to be ground of the first device wafer 1 and the front surface 2 a of the second device wafer 2 are made to face each other. Subsequently, the back surface 1 b of the first device wafer 1 and the front surface 2 a of the second device wafer 2 are bonded by a fixing adhesive 6. The material for the fixing adhesive 6 is not particularly limited.

貼り合わせウエーハを形成する際には、例えば、固定用接着材６を加熱して軟化させつつ、図示しない押圧部材でサポートウエーハ３側から下方に押圧して固定用接着材６を径方向に拡張させる。このとき、シリコンウエーハからなるサポートウエーハ３側も加熱されるが、第１のデバイスウエーハ１が動かないように仮接着材４でサポートウエーハ３に固着されているため、第１のデバイスウエーハ１を第２のデバイスウエーハ２に対してずれて貼り合わせてしまうことがない。その後、固定用接着材６が例えば冷却等されて硬化すると、第１のデバイスウエーハ１と第２のデバイスウエーハ２とが積層した状態の貼り合わせウエーハ７となって形成される。   When forming the bonded wafer, for example, the fixing adhesive 6 is heated and softened, and is pressed downward from the support wafer 3 side by a pressing member (not shown) to expand the fixing adhesive 6 in the radial direction. Let At this time, the support wafer 3 made of a silicon wafer is also heated. However, since the first device wafer 1 is fixed to the support wafer 3 with the temporary adhesive 4 so that the first device wafer 1 does not move, the first device wafer 1 is attached. There is no possibility that the second device wafer 2 is stuck and bonded. Thereafter, when the fixing adhesive 6 is cooled and hardened, for example, a bonded wafer 7 in a state where the first device wafer 1 and the second device wafer 2 are laminated is formed.

（７）仮接着材表出工程
図５及び図６に示すように、研削手段２０を用いて、貼り合わせウエーハ７からサポートウエーハ３を除去することにより仮接着材４を表出させる。具体的には、チャックテーブル１０の保持面１２に第２のデバイスウエーハ２側を載置してサポートウエーハ３側を上向きに露出させる。また、吸引源１３の吸引力を保持面１２に作用させて保持面１２において第２のデバイスウエーハ２の裏面２ｂを吸引保持するとともに、チャックテーブル１０を例えば、矢印Ａ方向に回転させる。そして、スピンドル２１を回転させ研削ホイール２２を矢印Ａ方向に回転させながらサポートウエーハ３に接近する方向に研削手段２０を下降させ、回転する研削砥石２３でサポートウエーハ３の上端面を押圧しながら研削する。 (7) Temporary Adhesive Material Expressing Step As shown in FIGS. 5 and 6, the temporary adhesive 4 is exposed by removing the support wafer 3 from the bonded wafer 7 using the grinding means 20. Specifically, the second device wafer 2 side is placed on the holding surface 12 of the chuck table 10 to expose the support wafer 3 side upward. Further, the suction force of the suction source 13 is applied to the holding surface 12 to suck and hold the back surface 2b of the second device wafer 2 on the holding surface 12, and the chuck table 10 is rotated in the arrow A direction, for example. Then, the grinding means 20 is lowered in a direction approaching the support wafer 3 while rotating the spindle 21 and rotating the grinding wheel 22 in the direction of arrow A, and grinding is performed while pressing the upper end surface of the support wafer 3 with the rotating grinding wheel 23. To do.

ここで、研削手段２０によって、仮接着材４が表出するまでサポート基板３を研削してもよいが、仮接着材４が表出する直前までサポートウエーハ３を研削した段階で研削手段２０による研削を停止して、薄化されたサポートウエーハ３に対してウエットエッチングやドライエッチングを施すことにより仮接着材４を表出させることもできる。このように、少なくとも仮接着材４が表出する前までに研削を停止すれば、研削砥石２３の目詰まりを防止して研削力の低下を低減することができる。また、研削後にＣＭＰ（Chemical Mechanical Polishing）を行うことにより、サポートウエーハ３を除去して仮接着材４を表出させるようにしてもよい。最初に研削を行うことで、サポートウエーハ３の除去を効率よく行うことができる。   Here, the support substrate 3 may be ground by the grinding means 20 until the temporary adhesive 4 is exposed. However, the grinding means 20 is used when the support wafer 3 is ground until just before the temporary adhesive 4 is exposed. It is also possible to expose the temporary adhesive 4 by stopping the grinding and applying wet etching or dry etching to the thinned support wafer 3. Thus, if grinding is stopped at least before the temporary adhesive 4 is exposed, clogging of the grinding wheel 23 can be prevented and a reduction in grinding force can be reduced. Alternatively, the temporary adhesive 4 may be exposed by removing the support wafer 3 by performing CMP (Chemical Mechanical Polishing) after grinding. By first grinding, the support wafer 3 can be removed efficiently.

（８）仮接着材除去工程
仮接着材表出工程を実施した後は、図７に示すように、第１のデバイスウエーハ１の表面１ａから図６に示す表出した仮接着材４を除去する。具体的には、例えばガス供給部３０を用いてプラズマアッシングを実施する。ガス供給部３０は、ガス３２からチャンバ内に酸素などのガスを供給するとともに電源３１から高周波電力を加えることにより酸素プラズマを発生させ、仮接着材４のみを第１のデバイスウエーハ１のデバイスＤから除去する。その結果、第１のデバイスウエーハ１の表面１ａが露出した状態となる。 (8) Temporary Adhesive Material Removal Step After performing the temporary adhesive material expression step, the temporary adhesive material 4 shown in FIG. 6 is removed from the surface 1a of the first device wafer 1 as shown in FIG. To do. Specifically, for example, plasma ashing is performed using the gas supply unit 30. The gas supply unit 30 generates oxygen plasma by supplying a gas such as oxygen from the gas 32 into the chamber and applying high frequency power from the power source 31, and only the temporary adhesive 4 is used as the device D of the first device wafer 1. Remove from. As a result, the surface 1a of the first device wafer 1 is exposed.

また、例えばオゾン等のガスが充填したアッシング装置の処理室内に貼り合わせウエーハ７を搬送し、ガスとの化学反応を利用して仮接着材４をデバイスＤから除去するようにしてもよい。   Further, for example, the bonded wafer 7 may be transported into a processing chamber of an ashing apparatus filled with a gas such as ozone, and the temporary adhesive 4 may be removed from the device D using a chemical reaction with the gas.

（９）貫通電極形成工程
仮接着材除去工程を実施した後、図８に示すように、第１のデバイスウエーハ１と第２のデバイスウエーハ２とを貫通する貫通電極を形成する。すなわち、積層されたそれぞれのデバイスＤの表裏面を貫通する貫通孔を形成して、該貫通孔に電極となる導電材を充填して貫通電極８を形成する。 (9) Through Electrode Forming Step After performing the temporary adhesive removal step, a through electrode penetrating the first device wafer 1 and the second device wafer 2 is formed as shown in FIG. That is, a through-hole penetrating the front and back surfaces of each stacked device D is formed, and the through-electrode 8 is formed by filling the through-hole with a conductive material serving as an electrode.

（１０）分割工程
貫通電極形成工程を実施した後、図９に示すように、貼り合わせウエーハ７を個々のデバイスＤを有するチップに分割する。例えば、テープ９に貼り合わせウエーハ７を貼着して、第１のデバイスウエーハ１の分割予定ラインＳに沿って切削ブレードをテープ９に至るまで切り込ませてフルカットしたり、レーザ照射によってフルカットしたりすることにより個々のチップＣに分割する。その後、図示しない搬送手段によって各チップＣをピックアップする。なお、分割工程は、本例に示したものに限定されない。 (10) Dividing Step After performing the through electrode forming step, the bonded wafer 7 is divided into chips having individual devices D as shown in FIG. For example, the bonded wafer 7 is bonded to the tape 9 and the cutting blade is cut to reach the tape 9 along the planned division line S of the first device wafer 1 to make a full cut or by laser irradiation. It is divided into individual chips C by cutting. Thereafter, each chip C is picked up by a conveying means (not shown). The dividing step is not limited to the one shown in this example.

以上のとおり、本発明の積層デバイスの製造方法では、第１のデバイスウエーハ１の表面１ａに仮接着材４で仮接着されるサポートウエーハ３がシリコンウエーハからなり、貼り合わせウエーハ形成工程において固定用接着材６を加熱しながら加圧して拡張させても、第１のデバイスウエーハ１が動かないように仮接着材４を介してサポートウエーハ３に接着された状態が維持されているため、第１のデバイスウエーハ１を第２のデバイスウエーハ２に対してずれて貼り合わせてしまうことはなく、拡張される固定用接着材６の厚みを均一にすることができる。
また、仮接着材４を加熱せずに、サポートウエーハ３を少なくとも研削することによってサポートウエーハ３を除去するため、第１のデバイスウエーハ１から容易にサポートウエーハ３を除去することができ、積層された第１のデバイスウエーハ１と第２のデバイスウエーハ２とにずれが生じることはない。
さらに、仮接着材表出工程の後、仮接着材除去工程を実施するときは、プラズマアッシングによって仮接着材４を第１のデバイスウエーハ１のデバイスＤから除去するため、仮接着材４の除去とデバイスＤの洗浄とを同時に行うことが可能になる。 As described above, in the method for manufacturing a laminated device of the present invention, the support wafer 3 that is temporarily bonded to the surface 1a of the first device wafer 1 with the temporary adhesive 4 is made of a silicon wafer, and is used for fixing in the bonded wafer forming step. Even when the adhesive 6 is pressurized and expanded while being heated, the first device wafer 1 is maintained in a state of being bonded to the support wafer 3 via the temporary adhesive 4 so that the first device wafer 1 does not move. The device wafer 1 is not shifted and bonded to the second device wafer 2, and the thickness of the fixing adhesive 6 to be expanded can be made uniform.
Further, since the support wafer 3 is removed by grinding at least the support wafer 3 without heating the temporary adhesive 4, the support wafer 3 can be easily removed from the first device wafer 1 and laminated. Further, there is no deviation between the first device wafer 1 and the second device wafer 2.
Furthermore, when the temporary adhesive removal step is performed after the temporary adhesive exposure step, the temporary adhesive 4 is removed from the device D of the first device wafer 1 by plasma ashing. And cleaning of the device D can be performed simultaneously.

なお、第２のデバイスウエーハは、例えば図１０に示す積層デバイスウエーハ４０であっても良い。この積層デバイスウエーハ４０は、図１（Ｃ）に示した第２のデバイスウェーハ２の上に、薄化されたデバイスウエーハ４１を複数積層し、複数のデバイスウエーハ４１を固定用接着材６によって固定することにより構成されている。   The second device wafer may be a laminated device wafer 40 shown in FIG. 10, for example. In this laminated device wafer 40, a plurality of thinned device wafers 41 are laminated on the second device wafer 2 shown in FIG. 1C, and the plurality of device wafers 41 are fixed by the fixing adhesive 6. It is comprised by doing.

この積層デバイスウエーハ４０は、デバイスウエ-ハ準備工程から仮接着剤除去工程までを、積層枚数と同じ回数繰り返し行うことにより形成される。すなわち、図１０に示した積層デバイスウエーハ４０は、デバイスウエ-ハ準備工程から仮接着剤除去工程までを４回繰り返すことにより、第２のデバイスウエーハ２の表面２ａ側に４枚のデバイスウエーハ４１が積層される。そしてその後、貫通電極形成工程を実施することで、すべてのデバイスＤを貫通する貫通電極４２を形成する。   The laminated device wafer 40 is formed by repeatedly performing the device wafer preparation process to the temporary adhesive removing process as many times as the number of laminated sheets. That is, the laminated device wafer 40 shown in FIG. 10 has four device wafers 41 on the surface 2a side of the second device wafer 2 by repeating the process from the device wafer preparation process to the temporary adhesive removing process four times. Are stacked. Then, through electrode forming steps are performed to form through electrodes 42 penetrating all the devices D.

この積層デバイスウエーハ４０を構成する個々のデバイスウエーハ４１は、表面４１ａの交差する分割予定ラインＳによって区画された各領域にデバイスＤが形成されており、図１１に示すように、最下層の第２のデバイスウエーハ２をテープ９に貼り合わせ、デバイスウエーハ４１の分割予定ラインＳに沿って切削等することにより、個々のチップＣ１に分割される。   In each of the device wafers 41 constituting the laminated device wafer 40, a device D is formed in each region defined by the division lines S intersected by the surface 41a. As shown in FIG. The two device wafers 2 are bonded to the tape 9 and cut along the scheduled division line S of the device wafer 41 to be divided into individual chips C1.

１：第１のデバイスウエーハ １ａ：表面 １ｂ：裏面
２：第２のデバイスウエーハ ２ａ：表面 ２ｂ：裏面
３：サポートウエーハ
４：仮接着材 ５：仮ウエーハ ６：固定用接着材 ７：貼り合わせウエーハ
８：貫通電極 ９：テープ
１０：チャックテーブル １１：保持部 １２：保持面 １３：吸引源
２０：研削手段 ２１：スピンドル ２２：研削ホイール ２３：研削砥石
３０：ガス供給部 ３１：電源 ３２：ガス
４０：積層デバイスウエーハ
４１：デバイスウエーハ ４１ａ：表面 ４２：貫通電極
Ｄ：デバイス Ｃ，Ｃ１：チップ Ｓ：分割予定ライン 1: First device wafer 1a: Front surface 1b: Back surface 2: Second device wafer 2a: Front surface 2b: Back surface 3: Support wafer 4: Temporary adhesive material 5: Temporary wafer 6: Adhesive material for fixing 7: Bonding wafer 8: Through electrode 9: Tape 10: Chuck table 11: Holding part 12: Holding surface 13: Suction source 20: Grinding means 21: Spindle 22: Grinding wheel 23: Grinding wheel 30: Gas supply part 31: Power supply 32: Gas 40 : Stacked device wafer 41: Device wafer 41a: Surface 42: Through electrode D: Device C, C1: Chip S: Line to be divided

Claims (2)

複数の半導体デバイスが積層された積層デバイスの製造方法であって、
表面の交差する分割予定ラインによって区画された領域にデバイスを形成した第１のデバイスウエーハを準備する第１のデバイスウエーハ準備工程と、
シリコンウエーハからなるサポートウエーハを準備するサポートウエーハ準備工程と、
表面の交差する分割予定ラインによって区画された領域にデバイスを形成した第２のデバイスウエーハを準備する第２のデバイスウエーハ準備工程と、
該第１のデバイスウエーハの表面と該サポートウエーハとを仮接着材によって仮接着して仮ウエーハを形成する仮ウエーハ形成工程と、
該仮ウエーハを構成する該サポートウエーハをチャックテーブルで保持して該第１のデバイスウエーハの裏面側を研削することにより該第１のデバイスウエーハを所定の厚みに薄化する薄化工程と、
該サポートウエーハを仮接着した状態を維持したまま、該薄化工程で薄化された該第１のデバイスウエーハの被研削面と該第２のデバイスウエーハの表面とを貼り合わせて貼り合わせウエーハを形成する貼り合わせウエーハ形成工程と、
該貼り合わせウエーハ形成工程で形成された該貼り合わせウエーハの該第２のデバイスウエーハの裏面をチャックテーブルで保持して該サポートウエーハを少なくとも研削して該仮接着材を表出させる仮接着材表出工程と、
該仮接着材表出工程で表出した仮接着材を該第１のデバイスウエーハの表面から除去し該第１のデバイスウエーハの表面を表出させる仮接着材除去工程と、
該仮接着材除去工程の後、該第１のデバイスウエーハと該第２のデバイスウエーハとを貫通する貫通電極を形成する貫通電極形成工程と、
からなる積層デバイスの製造方法。 A method for producing a laminated device in which a plurality of semiconductor devices are laminated,
A first device wafer preparation step of preparing a first device wafer in which a device is formed in a region defined by division lines to intersect on the surface;
A support wafer preparation process for preparing a support wafer comprising a silicon wafer;
A second device wafer preparation step of preparing a second device wafer in which devices are formed in a region defined by divided dividing lines on the surface;
A temporary wafer forming step of temporarily bonding the surface of the first device wafer and the support wafer with a temporary adhesive to form a temporary wafer;
A thinning step of thinning the first device wafer to a predetermined thickness by holding the support wafer constituting the temporary wafer with a chuck table and grinding the back surface side of the first device wafer;
While maintaining the temporarily bonded state of the support wafer, the ground surface of the first device wafer thinned in the thinning step and the surface of the second device wafer are bonded to each other to form a bonded wafer. A bonded wafer forming step to be formed;
Temporary adhesive material table in which the back surface of the second device wafer of the bonded wafer formed in the bonded wafer forming step is held by a chuck table and at least the support wafer is ground to expose the temporary adhesive material The production process;
A temporary adhesive removing step of removing the temporary adhesive material exposed in the temporary adhesive material exposing step from the surface of the first device wafer to expose the surface of the first device wafer;
A through electrode forming step for forming a through electrode penetrating the first device wafer and the second device wafer after the temporary adhesive removal step;
A method for producing a laminated device comprising: 該貫通電極形成工程の後、該第１のデバイスウエーハの分割予定ラインに沿って個々のデバイスに分割する分割工程を含む請求項１記載の積層デバイスの製造方法。   The method for manufacturing a laminated device according to claim 1, further comprising a dividing step of dividing the first device wafer into individual devices along the planned dividing line after the through electrode forming step.
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