JP6392140B2 - 配線基板及び半導体パッケージ - Google Patents
配線基板及び半導体パッケージ Download PDFInfo
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- JP6392140B2 JP6392140B2 JP2015029962A JP2015029962A JP6392140B2 JP 6392140 B2 JP6392140 B2 JP 6392140B2 JP 2015029962 A JP2015029962 A JP 2015029962A JP 2015029962 A JP2015029962 A JP 2015029962A JP 6392140 B2 JP6392140 B2 JP 6392140B2
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- 239000004065 semiconductor Substances 0.000 title claims description 41
- 229910000679 solder Inorganic materials 0.000 claims description 59
- 239000002184 metal Substances 0.000 claims description 37
- 229910052751 metal Inorganic materials 0.000 claims description 37
- 238000000034 method Methods 0.000 description 18
- 239000000463 material Substances 0.000 description 15
- 239000011347 resin Substances 0.000 description 15
- 229920005989 resin Polymers 0.000 description 15
- 239000010949 copper Substances 0.000 description 14
- 229910045601 alloy Inorganic materials 0.000 description 9
- 239000000956 alloy Substances 0.000 description 9
- 229910052802 copper Inorganic materials 0.000 description 9
- 239000004593 Epoxy Substances 0.000 description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 7
- 239000000758 substrate Substances 0.000 description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 229910052718 tin Inorganic materials 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 4
- 238000003672 processing method Methods 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 239000007864 aqueous solution Substances 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- ROOXNKNUYICQNP-UHFFFAOYSA-N ammonium persulfate Chemical compound [NH4+].[NH4+].[O-]S(=O)(=O)OOS([O-])(=O)=O ROOXNKNUYICQNP-UHFFFAOYSA-N 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- BDAGIHXWWSANSR-UHFFFAOYSA-N methanoic acid Natural products OC=O BDAGIHXWWSANSR-UHFFFAOYSA-N 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- OSWFIVFLDKOXQC-UHFFFAOYSA-N 4-(3-methoxyphenyl)aniline Chemical compound COC1=CC=CC(C=2C=CC(N)=CC=2)=C1 OSWFIVFLDKOXQC-UHFFFAOYSA-N 0.000 description 1
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 1
- 239000006061 abrasive grain Substances 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910001870 ammonium persulfate Inorganic materials 0.000 description 1
- 238000005422 blasting Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 229960003280 cupric chloride Drugs 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 235000019253 formic acid Nutrition 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
[第1の実施の形態に係る配線基板の構造]
まず、第1の実施の形態に係る配線基板の構造について説明する。図1は、第1の実施の形態に係る配線基板を例示する断面図である。なお、図1(b)は、図1(a)のA部の部分拡大断面図である。
次に、第1の実施の形態に係る配線基板の製造方法について説明する。図2〜図5は、第1の実施の形態に係る配線基板の製造工程を例示する図である。本実施の形態では、支持体上に複数の配線基板となる部分を作製し支持体を除去後個片化して各配線基板とする工程の例を示すが、支持体上に1個ずつ配線基板を作製し支持体を除去する工程としてもよい。
第2の実施の形態では、第1の実施の形態に係る配線基板に半導体チップが搭載(フリップチップ実装)された半導体パッケージの例を示す。なお、第2の実施の形態において、既に説明した実施の形態と同一構成部についての説明は省略する場合がある。
2 半導体パッケージ
10、30、50 配線層
20、40 絶縁層
20x、40x ビアホール
51 第1凹部
52 第2凹部
60 ソルダーレジスト層
60x、310x、320x 開口部
70 金属層
80、90 はんだバンプ
100 半導体チップ
110 電極パッド
300 支持体
310、320 レジスト層
Claims (5)
- 配線層と、
前記配線層の一方の面に形成された凹部と、
前記配線層を被覆する絶縁層と、
前記絶縁層に形成された、前記凹部内を露出する開口部と、
前記開口部内に露出する前記凹部の底面に形成された金属層と、を有し、
前記凹部は、第1凹部と、前記第1凹部内に形成された第2凹部と、を含み、
前記第2凹部の底面は、前記第1凹部の底面よりも小面積で、前記第1凹部の底面よりも深い位置に形成され、
前記金属層の前記開口部内に露出する面は、前記配線層の一方の面よりも低い位置に形成されている配線基板。 - 前記第1凹部の底面の外縁部及び内壁面、並びに、前記第2凹部の底面の外縁部及び内壁面は前記絶縁層に被覆され、
前記第2凹部の底面の外縁部より内側の領域が前記開口部内に露出し、
前記金属層は、前記第2凹部の底面の外縁部より内側の領域に形成されている請求項1記載の配線基板。 - 前記配線層は、下層の絶縁層に形成されたビア配線を介して下層の配線層と接続されており、
前記凹部は、平面視において前記ビア配線と重複する位置に形成された凹部と、平面視において前記ビア配線と重複しない位置に形成された凹部と、を有している請求項1又は2記載の配線基板。 - 前記絶縁層はソルダーレジスト層である請求項1乃至3の何れか一項記載の配線基板。
- 請求項1乃至4の何れか一項記載の配線基板の絶縁層上に半導体チップが搭載され、
前記金属層と前記半導体チップの電極パッドとが、はんだを介して接合された半導体パッケージ。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015029962A JP6392140B2 (ja) | 2015-02-18 | 2015-02-18 | 配線基板及び半導体パッケージ |
US14/986,844 US9741650B2 (en) | 2015-02-18 | 2016-01-04 | Wiring board and semiconductor package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP2015029962A JP6392140B2 (ja) | 2015-02-18 | 2015-02-18 | 配線基板及び半導体パッケージ |
Publications (2)
Publication Number | Publication Date |
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JP2016152362A JP2016152362A (ja) | 2016-08-22 |
JP6392140B2 true JP6392140B2 (ja) | 2018-09-19 |
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JP2015029962A Active JP6392140B2 (ja) | 2015-02-18 | 2015-02-18 | 配線基板及び半導体パッケージ |
Country Status (2)
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US (1) | US9741650B2 (ja) |
JP (1) | JP6392140B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10854550B2 (en) * | 2017-09-28 | 2020-12-01 | Advanced Semiconductor Engineering, Inc. | Semiconductor package and method of manufacturing the same |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002290022A (ja) | 2001-03-27 | 2002-10-04 | Kyocera Corp | 配線基板およびその製造方法ならびに電子装置 |
JP2011082447A (ja) * | 2009-10-09 | 2011-04-21 | Sanyo Electric Co Ltd | 素子搭載用基板、半導体モジュールおよび携帯機器 |
JP5479233B2 (ja) * | 2010-06-04 | 2014-04-23 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
JP6075825B2 (ja) * | 2012-04-26 | 2017-02-08 | 新光電気工業株式会社 | パッド形成方法 |
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2015
- 2015-02-18 JP JP2015029962A patent/JP6392140B2/ja active Active
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2016
- 2016-01-04 US US14/986,844 patent/US9741650B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20160240467A1 (en) | 2016-08-18 |
US9741650B2 (en) | 2017-08-22 |
JP2016152362A (ja) | 2016-08-22 |
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