JP6379350B2 - Manufacturing method of chip resistor - Google Patents

Manufacturing method of chip resistor Download PDF

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JP6379350B2
JP6379350B2 JP2014041281A JP2014041281A JP6379350B2 JP 6379350 B2 JP6379350 B2 JP 6379350B2 JP 2014041281 A JP2014041281 A JP 2014041281A JP 2014041281 A JP2014041281 A JP 2014041281A JP 6379350 B2 JP6379350 B2 JP 6379350B2
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resistor
protective film
pair
resistance value
probe
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JP2015167178A (en
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清二 津田
清二 津田
泰一 小山
泰一 小山
和俊 松村
和俊 松村
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Panasonic Intellectual Property Management Co Ltd
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Description

本発明は、各種電子機器に使用される低い抵抗値のチップ抵抗器の製造方法に関するものである。   The present invention relates to a method of manufacturing a low-resistance chip resistor used in various electronic devices.

従来のこの種のチップ抵抗器の製造方法は、図６において、絶縁基板１の両端部に一対の上面電極２を形成し、絶縁基板１の上面において一対の上面電極２間に抵抗体３を形成する工程と、一対の上面電極２の上面に抵抗値測定用のプローブ（図示せず）を当接させて抵抗値を測定しながら、抵抗体３にその一方の側面から抵抗体３の他の側面に向かってレーザで切削することによりトリミング溝４を形成して抵抗値を調整（トリミング）する工程と、抵抗体３を覆うように保護膜５を形成する工程と、絶縁基板１の両端面に一対の上面電極２と接続される端面電極６を形成する工程と、端面電極６の表面にめっきすることによりめっき層７を形成する工程とを備えていた。また、場合により、絶縁基板１の下面に裏面電極８を形成していた。   In the conventional method of manufacturing this type of chip resistor, in FIG. 6, a pair of upper surface electrodes 2 are formed at both ends of the insulating substrate 1, and a resistor 3 is formed between the pair of upper surface electrodes 2 on the upper surface of the insulating substrate 1. A step of forming, and a resistance value measurement probe (not shown) is brought into contact with the upper surfaces of the pair of upper surface electrodes 2 to measure the resistance value, and the resistor 3 is connected to the resistor 3 from one side surface thereof. Forming a trimming groove 4 by cutting with laser toward the side surface of the substrate, adjusting the resistance value (trimming), forming a protective film 5 so as to cover the resistor 3, and both ends of the insulating substrate 1 A step of forming an end face electrode 6 connected to the pair of upper surface electrodes 2 on the surface and a step of forming a plating layer 7 by plating the surface of the end face electrode 6 were provided. In some cases, the back electrode 8 is formed on the lower surface of the insulating substrate 1.

なお、この出願の発明に関する先行技術文献情報としては、例えば、特許文献１が知られている。   As prior art document information relating to the invention of this application, for example, Patent Document 1 is known.

特開２００７−１３４４５２号公報JP 2007-134452 A

上記した従来のチップ抵抗器の製造方法においては、保護膜５の印刷ずれが発生したり、トリミングする際のプローブの当接位置が不安定になったりするため、このプローブの当接位置と完成後に抵抗値を測定するときのプローブの当接位置とが異なる可能性があり、これにより、トリミング時の測定抵抗値と完成後の測定抵抗値とが異なり、抵抗値精度が悪化するおそれがあるという課題を有していた。   In the above-described conventional method of manufacturing a chip resistor, printing displacement of the protective film 5 occurs, or the contact position of the probe at the time of trimming becomes unstable. There is a possibility that the contact position of the probe when the resistance value is measured later is different, and this causes the measurement resistance value at the time of trimming to be different from the measurement resistance value after completion, which may deteriorate the resistance value accuracy. It had the problem that.

本発明は上記従来の課題を解決するもので、抵抗値精度を向上させることができるチップ抵抗器の製造方法を提供することを目的とするものである。   The present invention solves the above-described conventional problems, and an object of the present invention is to provide a chip resistor manufacturing method capable of improving the resistance value accuracy.

上記目的を達成するために、本発明は以下の構成を有するものである。   In order to achieve the above object, the present invention has the following configuration.

本発明の請求項１に記載の発明は、絶縁基板の上面において抵抗体を形成するとともに、前記抵抗体の両端部に一対の上面電極を形成する工程と、前記一対の上面電極に抵抗値測定用のプローブを当接させて抵抗値を測定しながら前記抵抗体にトリミング溝を形成して抵抗値を調整する工程と、前記抵抗体を覆うように第１の保護膜を形成する工程と、前記絶縁基板の両端面に前記一対の上面電極と接続される端面電極を形成する工程と、前記端面電極の表面にめっきすることによりめっき層を形成する工程とを備え、前記一対の上面電極の一部の上面から前記抵抗体の上面にかけて連続するように形成され、その端部が前記第１の保護膜の端部より前記絶縁基板の端面側に位置する樹脂で形成された一対の第２の保護膜を設け、前記一対の第２の保護膜を前記抵抗体の一部が露出するように互いに間隔をあけて形成し、前記抵抗値を調整する工程において、前記一対の第２の保護膜間に露出した前記抵抗体をレーザで切削し、前記プローブを前記一対の第２の保護膜の端部に当接させながら前記一対の第２の保護膜の端部に向かって押し付けるようにしたもので、この製造方法によれば、トリミングの際のプローブの当接位置が安定するため、トリミングの際のプローブの当接位置と完成後に抵抗値を測定するときのプローブの当接位置とを合わせることができ、これにより、トリミング時の測定抵抗値と完成後の測定抵抗値とを一致させることが可能になるため、抵抗値精度を向上させることができるという作用効果を有するものである。 According to a first aspect of the present invention, a resistor is formed on an upper surface of an insulating substrate, a pair of upper surface electrodes are formed on both ends of the resistor, and a resistance value measurement is performed on the pair of upper surface electrodes. A step of forming a trimming groove in the resistor while adjusting a resistance value while abutting a probe for contact, and a step of forming a first protective film so as to cover the resistor; A step of forming end face electrodes connected to the pair of upper surface electrodes on both end faces of the insulating substrate; and a step of forming a plating layer by plating on the surface of the end face electrodes; A pair of second layers are formed so as to be continuous from a part of the upper surface to the upper surface of the resistor, and their end portions are formed of a resin located on the end surface side of the insulating substrate from the end portion of the first protective film. the protective film is provided, said pair of The second protective film is formed spaced from one another so as to partially expose the resistor, in the step of adjusting the resistance value, the laser the resistor exposed between the pair of second protective layer in cutting, the probe is a material obtained by the urge toward the end of the pair of second protective layer the pair of second while contact with the end portion of the protective film, according to the manufacturing method Since the contact position of the probe at the time of trimming is stable, the contact position of the probe at the time of trimming can be matched with the contact position of the probe when measuring the resistance value after completion. Since the measured resistance value at the time and the measured resistance value after completion can be made to coincide with each other, the resistance value accuracy can be improved.

以上のように本発明のチップ抵抗器の製造方法は、第２の保護膜を一対の上面電極の一部の上面から抵抗体の上面にかけて連続して形成し、かつその端部を第１の保護膜の端部より絶縁基板の端面側に位置させ、さらに、抵抗値を調整する工程において、プローブを第２の保護膜の端部に当接させながら第２の保護膜の端部に向かって押し付けるようにしているため、トリミングの際のプローブの当接位置が安定し、これにより、トリミングの際のプローブの当接位置と完成後に抵抗値を測定するときのプローブの当接位置とを合わせることができるため、トリミング時の測定抵抗値と完成後の測定抵抗値とを一致させることが可能になり、抵抗値精度を向上させることができるという優れた効果を奏するものである。   As described above, in the manufacturing method of the chip resistor of the present invention, the second protective film is continuously formed from the upper surface of a part of the pair of upper surface electrodes to the upper surface of the resistor, and the end portion thereof is the first In the step of adjusting the resistance value, the probe is brought into contact with the end portion of the second protective film while being in contact with the end portion of the second protective film. Therefore, the contact position of the probe at the time of trimming is stabilized, so that the contact position of the probe at the time of trimming and the contact position of the probe when the resistance value is measured after completion are adjusted. Since they can be matched, the measured resistance value at the time of trimming can be matched with the measured resistance value after completion, and the resistance value accuracy can be improved.

本発明の一実施の形態におけるチップ抵抗器の断面図Sectional drawing of the chip resistor in one embodiment of this invention 同チップ抵抗器の製造方法の一部を示す図The figure which shows a part of manufacturing method of the same chip resistor 同チップ抵抗器の製造方法の一部を示す図The figure which shows a part of manufacturing method of the same chip resistor 同チップ抵抗器の製造方法の一部を示す図The figure which shows a part of manufacturing method of the same chip resistor 同チップ抵抗器の製造方法の一部を示す図The figure which shows a part of manufacturing method of the same chip resistor 従来のチップ抵抗器の断面図Cross-sectional view of a conventional chip resistor

以下、本発明の一実施の形態におけるチップ抵抗器の製造方法について、図面を参照しながら説明する。   Hereinafter, a method for manufacturing a chip resistor according to an embodiment of the present invention will be described with reference to the drawings.

図１は本発明の一実施の形態におけるチップ抵抗器の断面図である。   FIG. 1 is a cross-sectional view of a chip resistor according to an embodiment of the present invention.

本発明の一実施の形態におけるチップ抵抗器は、図１に示すように、絶縁基板１１と、この絶縁基板１１の上面に設けられた抵抗体１２と、前記抵抗体１２の両端部に設けられた一対の上面電極１３と、少なくとも前記抵抗体１２を覆うように設けられた第１の保護膜１４と、前記一対の上面電極１３と電気的に接続されるように前記絶縁基板１１の両端面１１ａに設けられた一対の端面電極１５と、前記一対の端面電極１５の表面に形成されためっき層１６とを備えた構成としている。   As shown in FIG. 1, a chip resistor according to an embodiment of the present invention is provided on an insulating substrate 11, a resistor 12 provided on the upper surface of the insulating substrate 11, and both ends of the resistor 12. The pair of upper surface electrodes 13, the first protective film 14 provided so as to cover at least the resistor 12, and both end surfaces of the insulating substrate 11 so as to be electrically connected to the pair of upper surface electrodes 13 11a, a pair of end surface electrodes 15 and a plating layer 16 formed on the surface of the pair of end surface electrodes 15 are provided.

そして、第２の保護膜１７を一対の上面電極１３の一部の上面から抵抗体１２の上面にかけて連続して形成し、かつその端部１７ａを第１の保護膜１４の端部１４ａより絶縁基板１１の端面１１ａ側に位置させている。ここで、端部１４ａ、１７ａとは、第１の保護膜１４、第２の保護膜１７の最も絶縁基板１１の両端面１１ａ側に位置する部分をいう。   Then, the second protective film 17 is continuously formed from the upper surface of a part of the pair of upper surface electrodes 13 to the upper surface of the resistor 12, and the end portion 17 a is insulated from the end portion 14 a of the first protective film 14. The substrate 11 is positioned on the end surface 11a side. Here, the end portions 14 a and 17 a refer to portions of the first protective film 14 and the second protective film 17 that are located closest to both end surfaces 11 a of the insulating substrate 11.

次に、本発明の一実施の形態におけるチップ抵抗器の製造方法について、図２〜図５を参照しながら説明する。なお、図２〜図４（ａ）は断りがなければ上面図を示し、図４（ｂ）〜図５は断面図を示す。   Next, a method for manufacturing a chip resistor according to an embodiment of the present invention will be described with reference to FIGS. 2A to 4A are top views unless otherwise specified, and FIGS. 4B to 5 are cross-sectional views.

まず、図２（ａ）に示すように、分割用のスリットである縦分割部２１ａと横分割部２１ｂを有し１個のチップ抵抗器に相当する各領域が区画されているシート状の絶縁基板２１を用意する。そして、このシート状の絶縁基板２１は、Ａｌ2Ｏ3を９６％含有するアルミナで構成されており、シート状の絶縁基板２１の各領域は１個のチップ抵抗器における絶縁基板１１となる。また、縦分割部２１ａと横分割部２１ｂは分割用のスリットでなくてもよく、この場合は、縦分割部２１ａと横分割部２１ｂは分割される箇所、すなわちダイシングやスクライブの中心部に相当する。 First, as shown in FIG. 2 (a), a sheet-like insulation having a vertical division portion 21a and a horizontal division portion 21b, which are slits for division, and each region corresponding to one chip resistor is partitioned. A substrate 21 is prepared. The sheet-like insulating substrate 21 is made of alumina containing 96% Al 2 O 3, and each region of the sheet-like insulating substrate 21 becomes the insulating substrate 11 in one chip resistor. Further, the vertical division part 21a and the horizontal division part 21b do not have to be slits for division, and in this case, the vertical division part 21a and the horizontal division part 21b correspond to portions to be divided, that is, the center part of dicing or scribing. To do.

なお、説明を簡単にするために、図２〜図５ではチップ抵抗器が縦４列、横３列のシート状に形成されている部分を示す。   In order to simplify the description, FIGS. 2 to 5 show a portion in which the chip resistors are formed in a sheet form of four rows and three rows.

次に、図２（ｂ）に示すように、シート状の絶縁基板２１の上面において、連続して縦分割部２１ａを跨ぐようにＣｕＮｉにガラスフリットを含有させたペーストを印刷、焼成して抵抗体１２を設ける。   Next, as shown in FIG. 2 (b), on the upper surface of the sheet-like insulating substrate 21, a paste containing CuNi containing glass frit is continuously printed and fired so as to straddle the vertically divided portion 21a. A body 12 is provided.

次に、図２（ｃ）に示すように、各縦分割部２１ａを跨ぐようにＣｕ系厚膜材料を印刷、焼成して、上面電極１３を形成する。このとき、一対の上面電極１３間に各領域の抵抗体１２が位置し、各領域では抵抗体１２の上面の両端部に一対の上面電極１３が設けられる。さらに、各領域の絶縁基板１１の裏面両端部に裏面電極２２を形成してもよい。   Next, as shown in FIG. 2C, a Cu-based thick film material is printed and baked so as to straddle each vertical division portion 21 a to form the upper surface electrode 13. At this time, the resistor 12 in each region is positioned between the pair of upper surface electrodes 13, and the pair of upper surface electrodes 13 are provided at both ends of the upper surface of the resistor 12 in each region. Furthermore, you may form the back surface electrode 22 in the back surface both ends of the insulating substrate 11 of each area | region.

なお、抵抗体１２として、ＡｇまたはＡｇＰｄを用いてもよく、この場合、上面電極１３としてＡｇ系厚膜材料を使用する。さらに、場合によっては抵抗体１２をプリコートガラスで覆う。また、抵抗体１２は縦分割部２１ａを跨がないように形成してもよく、このとき、上面電極１３と抵抗体１２の形成順序は逆にしてもよい。そしてさらに、上面電極１３を２層で形成してもよい。   Note that Ag or AgPd may be used as the resistor 12. In this case, an Ag-based thick film material is used as the upper surface electrode 13. Further, in some cases, the resistor 12 is covered with precoat glass. Further, the resistor 12 may be formed so as not to straddle the vertical division portion 21a, and at this time, the formation order of the upper surface electrode 13 and the resistor 12 may be reversed. Further, the upper surface electrode 13 may be formed of two layers.

次に、図３（ａ）に示すように、上面電極１３の端部と抵抗体１２の一部を連続して覆うようにエポキシ樹脂などからなる第２の保護膜１７を形成する。この第２の保護膜１７は縦分割部２１ａを跨ぐように各領域で一対設け、抵抗体１２の一部が露出するように互いに間隔をあけて形成する。このとき、プリコートガラスを形成する場合は、抵抗体１２を覆うプリコートガラスを第２の保護膜１７で覆うようにし、上面電極１３を２層で形成する場合は、最上層の上面電極１３を第２の保護膜１７で覆うようにする。   Next, as shown in FIG. 3A, a second protective film 17 made of an epoxy resin or the like is formed so as to continuously cover the end portion of the upper surface electrode 13 and a part of the resistor 12. A pair of the second protective films 17 are provided in each region so as to straddle the vertical division portion 21a, and are formed at intervals so that a part of the resistor 12 is exposed. At this time, when the precoat glass is formed, the precoat glass covering the resistor 12 is covered with the second protective film 17, and when the upper surface electrode 13 is formed with two layers, the uppermost surface electrode 13 is formed with the first layer. 2 is covered with a protective film 17.

さらに、第２の保護膜１７は、上面電極１３の端部および側部を覆い、かつ、縦分割部２１ａを跨ぐ部分にはロ字状の切欠部１８を形成する。この切欠部１８によって上面電極１３の一部が露出している。そして、この切欠部１８は縦方向には露出せず、周囲を第２の保護膜１７で囲まれている。上記のように縦分割部２１ａを跨ぐように切欠部１８を１つ形成すれば、縦分割部２１ａを跨いた２つのチップ抵抗器に切欠部１８を形成することができる。   Further, the second protective film 17 covers the end portion and the side portion of the upper surface electrode 13 and forms a square-shaped cutout portion 18 in a portion straddling the vertical division portion 21a. A part of the upper surface electrode 13 is exposed by the notch 18. The notch 18 is not exposed in the vertical direction and is surrounded by the second protective film 17. If one cutout 18 is formed so as to straddle the vertical division 21a as described above, the cutout 18 can be formed in two chip resistors straddling the vertical division 21a.

次に、図３（ｂ）に示すように、露出した抵抗体１２を、その一方の側面から他の側面に向かうようにレーザで切削することによりトリミング溝１９を形成して抵抗値を調整（トリミング）する。   Next, as shown in FIG. 3B, the trimming groove 19 is formed by cutting the exposed resistor 12 with a laser so as to go from one side surface to the other side surface, thereby adjusting the resistance value ( Trim).

このとき、抵抗値の測定は、図３（ｃ）に示すように、抵抗値測定用のプローブ２０を、一対の上面電極１３における第２の保護膜１７の端部１７ａ（切欠部１８の内面）に当接させながら第２の保護膜１７の端部１７ａに向かって（抵抗体１２側）に押し付けて行う。なお、図３（ｃ）は図３（ｂ）のＡ−Ａ線断面図である。   At this time, as shown in FIG. 3C, the resistance value is measured by using the resistance measurement probe 20 with the end portion 17a of the second protective film 17 on the pair of upper surface electrodes 13 (the inner surface of the notch portion 18). ) Is pressed against the end portion 17a of the second protective film 17 (on the resistor 12 side). FIG. 3C is a cross-sectional view taken along line AA in FIG.

次に、図４（ａ）、図４（ｂ）に示すように、切欠部１８を覆わないようにし、かつ第２の保護膜１７、抵抗体１２およびトリミング溝１９を覆うようにガラスまたはエポキシ樹脂ペーストをスクリーン印刷する。その後、硬化、焼成することにより第１の保護膜１４を形成する。このとき、第１の保護膜１４は横分割部２１ｂを跨ぐように帯状に形成してもよい。   Next, as shown in FIGS. 4A and 4B, glass or epoxy is used so as not to cover the notch 18 and to cover the second protective film 17, the resistor 12, and the trimming groove 19. Resin paste is screen printed. Then, the 1st protective film 14 is formed by hardening and baking. At this time, the first protective film 14 may be formed in a strip shape so as to straddle the laterally divided portion 21b.

ここで、切欠部１８の全部が第１の保護膜１４で覆われていないため、切欠部１８における上面電極１３が露出し、かつ第２の保護膜１７の端部１７ａが第１の保護膜１４の端部１４ａより各領域の絶縁基板１１の端面１１ａ側に位置することになる。すなわち、上面視で第１の保護膜１４は第２の保護膜１７から絶縁基板１１の両端面１１ａ方向へははみ出さないようにする。なお、図４（ｂ）は図４（ａ）のＢ−Ｂ線断面図である。   Here, since the entire notch 18 is not covered with the first protective film 14, the upper surface electrode 13 in the notch 18 is exposed, and the end 17 a of the second protective film 17 is the first protective film. 14 is located on the side of the end surface 11a of the insulating substrate 11 in each region from the end portion 14a. That is, the first protective film 14 does not protrude from the second protective film 17 toward the both end faces 11a of the insulating substrate 11 when viewed from above. FIG. 4B is a cross-sectional view taken along line BB in FIG.

次に、図４（ｃ）に示すように、一対の上面電極１３と電気的に接続されるように絶縁基板１１の両端面１１ａにＡｇを印刷、塗布、またはスパッタして一対の端面電極１５を設け、かつシート状の絶縁基板２１を縦分割部２１ａ、横分割部２１ｂで分割し、複数の個片状のチップ抵抗器を得る。このとき、切欠部１８は端面電極１５で埋められる。   Next, as shown in FIG. 4C, Ag is printed, applied, or sputtered on both end surfaces 11 a of the insulating substrate 11 so as to be electrically connected to the pair of upper surface electrodes 13. And the sheet-like insulating substrate 21 is divided by the vertical division part 21a and the horizontal division part 21b to obtain a plurality of individual chip resistors. At this time, the notch 18 is filled with the end face electrode 15.

最後に、図５に示すように、一対の端面電極１５の表面に、Ｎｉめっき層を形成し、さらにこのＮｉめっき層を覆うようにＳｎめっき層を形成することによりめっき層１６を構成して、チップ抵抗器の完成品が得られる。   Finally, as shown in FIG. 5, a plating layer 16 is formed by forming a Ni plating layer on the surface of the pair of end face electrodes 15 and further forming a Sn plating layer so as to cover the Ni plating layer. A finished chip resistor is obtained.

その後、出荷前、あるいはユーザでの受入の際の検査時に、完成品としての抵抗値を測定する。このとき、一対の上面電極１３を覆うめっき層１６にプローブ２０を当接させて行う。   Thereafter, the resistance value of the finished product is measured before shipment or at the time of inspection at the time of acceptance by the user. At this time, the probe 20 is brought into contact with the plating layer 16 covering the pair of upper surface electrodes 13.

上記したように本発明の一実施の形態においては、第２の保護膜１７を一対の上面電極１３の一部の上面から抵抗体１２の上面にかけて連続して形成し、かつその端部１７ａを第１の保護膜１４の端部１４ａより絶縁基板１１の端面１１ａ側に位置させ、さらに、抵抗値を調整する工程において、プローブ２０を第２の保護膜１７の端部１７ａに当接させながら第２の保護膜１７の端部１７ａに向かって押し付けるようにしているため、トリミングの際のプローブ２０の当接位置が安定し、これにより、トリミングの際のプローブ２０の当接位置と完成後に抵抗値を測定するときのプローブ２０の当接位置とを合わせることができるため、トリミング時の測定抵抗値と完成後の測定抵抗値とを一致させることが可能になり、抵抗値精度を向上させることができるという効果が得られるものである。   As described above, in the embodiment of the present invention, the second protective film 17 is continuously formed from the upper surface of a part of the pair of upper surface electrodes 13 to the upper surface of the resistor 12, and the end portion 17a is formed. In the step of adjusting the resistance value, the probe 20 is brought into contact with the end portion 17a of the second protective film 17 while being positioned closer to the end surface 11a of the insulating substrate 11 than the end portion 14a of the first protective film 14. Since the pressing is performed toward the end portion 17a of the second protective film 17, the contact position of the probe 20 at the time of trimming is stabilized, and thereby the contact position of the probe 20 at the time of trimming and after completion. Since the contact position of the probe 20 when measuring the resistance value can be matched, it becomes possible to match the measured resistance value at the time of trimming with the measured resistance value after completion, thereby improving the resistance value accuracy. In which there is an advantage that it is possible to.

すなわち、トリミングの際のプローブ２０の当接位置を第２の保護膜１７の端部１７ａで確定させる。さらに、第２の保護膜１７の端部１７ａを第１の保護膜１４の端部１４ａより絶縁基板１１の端面１１ａ側に位置させているため、第１の保護膜１４の形状や位置がばらついても、上面電極１３を第１の保護膜１４が覆うことはなく、これにより、完成後に抵抗値を測定するときのプローブ２０の当接位置を、確定されたトリミングの際のプローブ２０の当接位置に合わせることができる。なお、めっき層１６は抵抗値が低いのでその抵抗値はほとんど無視できる。   That is, the contact position of the probe 20 at the time of trimming is determined by the end portion 17 a of the second protective film 17. Furthermore, since the end portion 17a of the second protective film 17 is positioned closer to the end surface 11a side of the insulating substrate 11 than the end portion 14a of the first protective film 14, the shape and position of the first protective film 14 vary. However, the upper surface electrode 13 is not covered with the first protective film 14, so that the contact position of the probe 20 when the resistance value is measured after completion is determined by the contact of the probe 20 at the time of the fixed trimming. It can be adjusted to the close position. Since the plating layer 16 has a low resistance value, the resistance value is almost negligible.

逆に、第１の保護膜１４の端部１４ａを第２の保護膜１７の端部１７ａより絶縁基板１１の端面１１ａ側に位置させれば、第１の保護膜１４の形状や位置がばらつくと、上面電極１３を第１の保護膜１４が覆うことなり、かつその覆う面積もばらつき、これにより、完成後に抵抗値を測定するときのプローブ２０の当接位置を、確定されたトリミングの際のプローブ２０の当接位置に合わせることができなくなる。   Conversely, if the end portion 14a of the first protective film 14 is positioned closer to the end surface 11a side of the insulating substrate 11 than the end portion 17a of the second protective film 17, the shape and position of the first protective film 14 vary. Then, the upper surface electrode 13 is covered with the first protective film 14 and the area covered by the first electrode 14 also varies, whereby the contact position of the probe 20 when the resistance value is measured after completion is determined when the trimming is performed. It becomes impossible to match the contact position of the probe 20.

さらに、第２の保護膜１７には縦方向には露出しないロ字状の切欠部１８を形成しているため、トリミングの際、あるいは完成後に抵抗値を測定する際のプローブ２０を当接させ易くなる。   In addition, since the second protective film 17 is formed with a square-shaped notch 18 that is not exposed in the vertical direction, a probe 20 for measuring the resistance value after trimming or after completion is brought into contact with the second protective film 17. It becomes easy.

特に、切欠部１８の横方向の幅を、各領域においてプローブの幅と略同じ幅になるように狭くすれば、トリミングの際、完成後に抵抗値を測定する際のプローブ２０を当接位置がほぼ決まってしまうため、トリミングの際のプローブ２０の当接位置と完成後に抵抗値を測定するときのプローブの当接位置とをより一致させ易くなる。   In particular, if the lateral width of the notch 18 is narrowed so as to be substantially the same as the width of the probe in each region, the contact position of the probe 20 when measuring the resistance value after completion is obtained during trimming. Since it is almost determined, it becomes easier to match the contact position of the probe 20 at the time of trimming with the contact position of the probe when the resistance value is measured after completion.

また、縦分割部２１ａを跨ぐように切欠部１８を形成しているため、縦分割部２１ａにおける第２の保護膜１７の量を減らすことができ、これにより、分割の際にバリが発生して形状不良となるのを防止できる。   In addition, since the cutout portion 18 is formed so as to straddle the vertical division portion 21a, the amount of the second protective film 17 in the vertical division portion 21a can be reduced, thereby generating burrs during division. It is possible to prevent the shape from becoming defective.

なお、電圧測定用と電流通電用の４端子のプローブで抵抗値測定ができるように、切欠部１８を２つに分割してもよい。   Note that the notch 18 may be divided into two parts so that the resistance value can be measured with a four-terminal probe for voltage measurement and current application.

本発明に係るチップ抵抗器の製造方法は、抵抗値精度を向上させることができるという効果を有するものであり、特に、各種電子機器に使用される低い抵抗値のチップ抵抗器等において有用となるものである。   The method of manufacturing a chip resistor according to the present invention has an effect that the resistance value accuracy can be improved, and is particularly useful in a chip resistor having a low resistance value used in various electronic devices. Is.

１１ 絶縁基板
１１ａ 絶縁基板の端面
１２ 抵抗体
１３ 上面電極
１４ 第１の保護膜
１４ａ 第１の保護膜の端部
１５ 端面電極
１６ めっき層
１７ 第２の保護膜
１７ａ 第２の保護膜の端部
１９ トリミング溝
２０ プローブ DESCRIPTION OF SYMBOLS 11 Insulating substrate 11a End surface of insulating substrate 12 Resistor 13 Upper surface electrode 14 1st protective film 14a End part of 1st protective film 15 End surface electrode 16 Plating layer 17 2nd protective film 17a End part of 2nd protective film 19 Trimming groove 20 Probe

Claims (1)

絶縁基板の上面において抵抗体を形成するとともに、前記抵抗体の両端部に一対の上面電極を形成する工程と、前記一対の上面電極に抵抗値測定用のプローブを当接させて抵抗値を測定しながら前記抵抗体にトリミング溝を形成して抵抗値を調整する工程と、前記抵抗体を覆うように第１の保護膜を形成する工程と、前記絶縁基板の両端面に前記一対の上面電極と接続される端面電極を形成する工程と、前記端面電極の表面にめっきすることによりめっき層を形成する工程とを備え、前記一対の上面電極の一部の上面から前記抵抗体の
上面にかけて連続するように形成され、その端部が前記第１の保護膜の端部より前記絶縁基板の端面側に位置する樹脂で形成された一対の第２の保護膜を設け、前記一対の第２の保護膜を前記抵抗体の一部が露出するように互いに間隔をあけて形成し、前記抵抗値を調整する工程において、前記一対の第２の保護膜間に露出した前記抵抗体をレーザで切削し、前記プローブを前記一対の第２の保護膜の端部に当接させながら前記一対の第２の保護膜の端部に向かって押し付けるようにしたチップ抵抗器の製造方法。
A step of forming a resistor on the upper surface of the insulating substrate and forming a pair of upper surface electrodes on both ends of the resistor, and measuring a resistance value by contacting a probe for measuring a resistance value to the pair of upper surface electrodes Forming a trimming groove in the resistor while adjusting the resistance value, forming a first protective film so as to cover the resistor, and the pair of upper surface electrodes on both end surfaces of the insulating substrate And forming a plating layer by plating the surface of the end surface electrode, and continuously from the upper surface of a part of the pair of upper surface electrodes to the upper surface of the resistor. A pair of second protective films formed of resin whose end portions are located closer to the end face side of the insulating substrate than the end portions of the first protective film, and the pair of second protective films are provided . Part of the resistor is on the protective film Formed spaced from one another so as to leave, in the above step of adjusting the resistance value, said exposed between the pair of the second protective film cutting the resistor with a laser, the second of the probe of the pair A method of manufacturing a chip resistor, wherein the chip resistors are pressed against the end portions of the pair of second protective films while being in contact with the end portions of the protective film.
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